JPH07245378A - Semiconductor device - Google Patents

Abstract

(57) [Abstract] [Purpose] Regarding a semiconductor device, a dielectric film between electrode plates in a capacitor is thinned to increase the capacitance, and moreover, leakage current does not flow during standby. Constitution: An inverter composed of a p-channel transistor Q1 and an n-channel transistor Q2 having a gate electrode 7 which is interposed between a V _CC side wiring 8 and a V _SS side wiring 9 and connected in common, and one pole of a capacitor An electrode 11 which functions as a plate is connected to the V _CC side wiring 8, and an n-well 2 which functions as the other electrode plate is connected to a connection point of the transistor Q1 and the transistor Q2 which are the output points of the inverter. Equipped with.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a MOS (metal oxide semiconductor) with reduced standby current.
The present invention relates to a semiconductor device having a capacitor). Currently, capacitors are being built in semiconductor devices for the purpose of stabilizing power supplies, for example.

In such a capacitor, the insulating film (dielectric film) between the electrode plates is formed as thin as possible for the purpose of increasing the capacitance, but the thinner the film, the more leaky the insulating film. The standby current increases, so this problem must be resolved.

[0003]

2. Description of the Related Art Generally, it is accepted that it becomes leaky if the dielectric film between the electrode plates in a capacitor is made thin, and until now, mainly, a dielectric material having a high breakdown voltage has been demanded. I was enthusiastic.

Up to now, no effective technique has been known for compensating an increase in standby current due to a leaky dielectric film in a capacitor built in a semiconductor chip.

[0005]

As described above, with respect to the increase in standby current due to the leaky dielectric film in the capacitor, at present, other than thickening the dielectric film at the expense of capacitance. There is no means.

According to the present invention, the dielectric film between the electrode plates of the capacitor is thinned to increase the capacity, and moreover, leakage current does not flow during standby.

[0007]

In the present invention, it is fundamental to make the both electrode plates of the capacitor have the same potential during standby so that no current flows.

From the foregoing, in the semiconductor device according to the present invention, (1) between the positive side level point (for example, V _CC side wiring 8) and the ground side level point (for example, V _SS side wiring 9). A p-channel transistor (for example, p-channel transistor) which is interposed and whose gates are commonly connected (for example, connected by the gate electrode 7)
An inverter including a transistor Q1) and an n-channel transistor (for example, an n-channel transistor Q2), and one plate (for example, the electrode 11 serving as one plate of a capacitor) at the positive side level point and the other. The electrode plate (for example, n-well 2) is provided with capacitors respectively connected to the output points of the inverter (for example, connection points of the transistor Q1 and the transistor Q2), or

(2) Positive side level point (for example, V _CC side wiring 2
8) and a p-channel transistor (for example, p-channel transistor Q1) which is interposed between the ground side level point (for example, V _SS side wiring 29) and whose gates are commonly connected (for example, connected by the gate electrode 27) And n-channel transistors (eg n-channel transistor Q
2) and the one electrode plate (for example, the electrode 31 which functions as one electrode plate of the capacitor) at the output point (for example, the connection point of the transistor Q1 and the transistor Q2) of the inverter and the other electrode plate (for example, the electrode 31). For example, the n-well 22) comprises capacitors respectively connected to the ground-side level points, or

(3) In the above (1), the p-channel transistor in the inverter is turned on and the n-channel transistor is turned on by a standby signal (for example, an "H" level signal) input to the commonly connected gates. Is turned off, or

(4) In the above (2), the p-channel transistor in the inverter is turned off and the n-channel transistor is turned off by the standby signal (for example, "L" level signal) input to the commonly connected gates. Is turned on.

[0012]

By adopting the above-mentioned means, the potentials of the bipolar plates of the capacitor are the same during standby, so leakage current does not flow even if the dielectric film is leaky, so an increase in standby current is suppressed. be able to.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a principal part explanatory view showing a semiconductor device for explaining a first embodiment according to the present invention.

In the figure, (A) is a plan view of a main part, (B) is an equivalent circuit, 1 is a Si semiconductor substrate, 2 is an n-well, 3 is an n-well, 4 is an n ⁺⁺ -electrode contact region. 5 is the p ⁺ -region in the p-channel potential control transistor, 6
Is an n ⁺ -region in the n-channel potential control transistor, 7 is a gate electrode common to the p-channel and n-channel potential control transistors, and 7A is an input terminal in the p-channel and n-channel potential control transistors. , 8 is a wiring on the V _CC side, 9 is a wiring on the V _SS side, 11 is an electrode which functions as one electrode plate of the capacitor, 11A is an electrode contact window, 12 is wiring, 12A is a wiring contact window, Q
Reference numeral 1 is a p-channel transistor, Q2 is an n-channel transistor, C is a capacitor portion, and Q is a potential control transistor portion.

In the illustrated example, one electrode plate in the capacitor portion C is the electrode 11, and the other electrode plate is the n-well 2.
It has become. An insulating film, which is a dielectric film, is of course interposed between them, but it is omitted for simplification, and a large number of electrode contact windows are formed on the insulating film.

When an "H" level signal is input to the input terminal 7A, the transistor Q1 is turned off, the transistor Q2 is turned on, and the electrode 11 which is one of the plates of the capacitor is at the V _CC potential. In addition, since the n-well 2 which is the other electrode plate of the capacitor is at the V _SS potential, the capacitor portion C acts as the original function of the capacitor.

However, when an "L" level signal is input to the input terminal 7A, the transistor Q1 is turned on and the transistor Q2 is turned off, so that the electrode 11 which is one of the plates of the capacitor is, of course, at the V _CC potential. In addition, since the n-well 2 which is the other electrode plate of the capacitor has the V _CC potential, both electrode plates of the capacitor portion C have the same potential, and the original function of the capacitor does not occur.

If the "L" level of the signal input to the input terminal 7A is used as the standby signal of the semiconductor device,
At the same time as the standby, the current does not flow through the capacitor portion C, so that the leak current does not increase even if the dielectric film is thin.

FIG. 2 is a principal part explanatory view showing a semiconductor device for explaining a second embodiment according to the present invention.

In the figure, (A) is a plane of a main part, (B) is an equivalent circuit, 21 is a Si semiconductor substrate, 22 is an n-well,
23 is an n-well, 24 is an n ⁺⁺ -electrode contact region,
25 is p ^{+ in the} p-channel potential control transistor
-Region, 26 is an n ⁺ -region in an n-channel potential control transistor, 27 is a gate electrode common to p-channel and n-channel potential control transistors, 27A is a p-channel and n-channel potential control transistor Input terminal, 28 is V _CC side wiring, 29 is V _SS side wiring, 31 is an electrode that functions as one electrode plate of the capacitor, 32 is wiring, 32A is a wiring contact window, Q1 is p
A channel transistor, Q2 is an n-channel transistor, C is a capacitor portion, and Q is a potential control transistor portion.

In the illustrated example, one electrode plate in the capacitor portion C is the electrode 31 and the other electrode plate is the n-well 2.
It is 2. An insulating film, which is a dielectric film, is interposed between them, but it is omitted for simplification, and a large number of electrode contact windows are formed in the insulating film. Is represented.

When an "L" level signal is input to the input terminal 27A, the transistor Q1 turns on and
The transistor Q2 is turned off, the electrode 31 which is one of the plates of the capacitor is at the V _CC potential, and the n-well 22 which is the other plate of the capacitor is at the V _SS potential. The part C has the original function of the capacitor.

However, when a "H" level signal is input to the input terminal 7A, the transistor Q1 is turned off and the transistor Q2 is turned on, so that the electrode 11 which is one of the plates of the capacitor is at the V _SS potential. Further, since the n-well 2 which is the other electrode plate of the capacitor is also at the V _SS potential, the capacitor portion C has the same potential at both electrode plates and does not have the original function of the capacitor.

If the "H" level of the signal input to the input terminal 7A is used as the standby signal of the semiconductor device,
At the same time as the standby, the current does not flow through the capacitor portion C, so that the leak current does not increase even if the dielectric film is thin.

[0025]

In the semiconductor device according to the present invention, the p-channel transistor and the n-channel transistor, which are interposed between the positive-side level point and the ground-side level point and have their gates commonly connected, and n.
An inverter composed of a channel transistor, one plate connected to the positive side level point (or the output point of the inverter), and the other plate connected to the output point of the inverter (or the ground side level point). And a condenser.

By adopting the above-mentioned configuration, since the potentials of the bipolar plates of the capacitor are the same in the standby state, even if the dielectric film is leaky, the leak current does not flow, so that the increase of the standby current is suppressed. be able to.

[Brief description of drawings]

FIG. 1 is a principal part explanatory view showing a semiconductor device for explaining a first embodiment according to the present invention.

FIG. 2 is a principal part explanatory view showing a semiconductor device for explaining a second embodiment according to the present invention.

[Explanation of reference symbols] 1 Si semiconductor substrate 2 n-well 3 n-well 4 n ⁺⁺ -Electrode contact region 5 p ⁺ -in a p-channel potential control transistor
Region 6 n ⁺ − in n-channel potential control transistor
Region 7 Gate electrode common to each potential control transistor 7A Input terminal in each potential control transistor 8 V _CC side wiring 9 V _SS side wiring 11 Electrode that plays a role of one plate of capacitor 11A Electrode contact window 12 Wiring 12A Wiring contact window Q1 P-channel transistor Q2 N-channel transistor C Capacitor part Q Potential control transistor part

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI technical display location H01L 27/092

Claims (4)

[Claims] 1. An inverter composed of a p-channel transistor and an n-channel transistor, which is interposed between a positive-side level point and a ground-side level point and whose gates are commonly connected, and one plate is the positive-side level. And a capacitor connected to the output point of the inverter at each of the points and the other electrode plate. 2. An inverter composed of a p-channel transistor and an n-channel transistor, which is interposed between a positive-side level point and a ground-side level point and has a gate connected in common, and one of the plates is an output of the inverter. And a capacitor connected to the ground-side level point and the other electrode plate to the ground point. 3. A semiconductor device according to claim 1, wherein a p-channel transistor and an n-channel transistor in the inverter are turned on and an n-channel transistor is turned off by a standby signal input to the commonly connected gates. 4. The semiconductor device according to claim 2, wherein a p-channel transistor and an n-channel transistor in the inverter are turned off and a n-channel transistor is turned on by a standby signal input to the commonly connected gates.