JPH07193263A - Solar cell manufacturing method - Google Patents
Solar cell manufacturing methodInfo
- Publication number
- JPH07193263A JPH07193263A JP5330381A JP33038193A JPH07193263A JP H07193263 A JPH07193263 A JP H07193263A JP 5330381 A JP5330381 A JP 5330381A JP 33038193 A JP33038193 A JP 33038193A JP H07193263 A JPH07193263 A JP H07193263A
- Authority
- JP
- Japan
- Prior art keywords
- back surface
- light
- layer
- forming
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title description 7
- 239000000758 substrate Substances 0.000 claims abstract description 43
- 239000004065 semiconductor Substances 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 5
- 229910052751 metal Inorganic materials 0.000 claims description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 9
- 229910052710 silicon Inorganic materials 0.000 abstract description 9
- 239000010703 silicon Substances 0.000 abstract description 9
- 230000015572 biosynthetic process Effects 0.000 abstract description 7
- 238000010304 firing Methods 0.000 abstract description 3
- 230000003287 optical effect Effects 0.000 abstract 1
- 210000004027 cell Anatomy 0.000 description 26
- 238000000034 method Methods 0.000 description 24
- 239000010408 film Substances 0.000 description 23
- 229910045601 alloy Inorganic materials 0.000 description 11
- 239000000956 alloy Substances 0.000 description 11
- 238000009792 diffusion process Methods 0.000 description 9
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 7
- 230000035945 sensitivity Effects 0.000 description 7
- 230000003595 spectral effect Effects 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 6
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 6
- 239000010949 copper Substances 0.000 description 6
- 229910000838 Al alloy Inorganic materials 0.000 description 5
- 229910004298 SiO 2 Inorganic materials 0.000 description 5
- 239000010409 thin film Substances 0.000 description 5
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 4
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 4
- 229910000676 Si alloy Inorganic materials 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 229910010413 TiO 2 Inorganic materials 0.000 description 3
- 238000005275 alloying Methods 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 238000003672 processing method Methods 0.000 description 3
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 239000011259 mixed solution Substances 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 238000003892 spreading Methods 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- QZPSXPBJTPJTSZ-UHFFFAOYSA-N aqua regia Chemical compound Cl.O[N+]([O-])=O QZPSXPBJTPJTSZ-UHFFFAOYSA-N 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- RLOWWWKZYUNIDI-UHFFFAOYSA-N phosphinic chloride Chemical compound ClP=O RLOWWWKZYUNIDI-UHFFFAOYSA-N 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- VXUYXOFXAQZZMF-UHFFFAOYSA-N titanium(IV) isopropoxide Chemical compound CC(C)O[Ti](OC(C)C)(OC(C)C)OC(C)C VXUYXOFXAQZZMF-UHFFFAOYSA-N 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/70—Surface textures, e.g. pyramid structures
- H10F77/703—Surface textures, e.g. pyramid structures of the semiconductor bodies, e.g. textured active layers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/52—PV systems with concentrators
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
Landscapes
- Photovoltaic Devices (AREA)
Abstract
(57)【要約】
【目的】 シリコン基板の光閉込め構造の形成と低温で
のBSF層の形成を1つの工程で行なう。
【構成】 受光面側にPN接合が形成されたシリコン基
板6の裏面へ、絶縁膜を形成し、この絶縁膜に複数の開
口部を形成し、この開口部を含む裏面全面にAlペース
トを印刷し焼成することにより、シリコン基板6の裏面
に微細な凹凸構造と凹凸壁面に沿ったBSF層11を同
時に低温で形成する。
(57) [Summary] [Objective] The formation of the optical confinement structure of the silicon substrate and the formation of the BSF layer at low temperature are performed in one step. [Structure] An insulating film is formed on the back surface of a silicon substrate 6 having a PN junction formed on the light-receiving surface side, a plurality of openings are formed in this insulating film, and an Al paste is printed on the entire back surface including the openings. Then, by firing, the fine uneven structure and the BSF layer 11 along the uneven wall surface are simultaneously formed on the back surface of the silicon substrate 6 at a low temperature.
Description
【0001】[0001]
【産業上の利用分野】本発明は、太陽電池の製造方法、
特に、その光閉込め構造と半導体基板裏面の高濃度層の
形成方法に係わるものである。FIELD OF THE INVENTION The present invention relates to a method for manufacturing a solar cell,
In particular, it relates to the light confinement structure and the method for forming the high concentration layer on the back surface of the semiconductor substrate.
【0002】[0002]
【従来の技術】太陽電池の高効率化を図るための重要技
術として、基板の光閉込め構造の形成および裏面電界層
(BSF層)の形成が挙げられる。2. Description of the Related Art Formation of a light confining structure for a substrate and formation of a back surface field layer (BSF layer) are mentioned as important techniques for improving the efficiency of a solar cell.
【0003】まず、光閉込め構造の必要性と作製方法に
ついて説明する。たとえば、結晶シリコン太陽電池にお
いて、高効率化を考えたときセル表面に入射する光を有
効利用することが重要である。このため、太陽電池表面
に反射防止膜を形成したり、微細なピラミッドあるいは
溝を形成して反射を減らしたり、裏面にも微細なピラミ
ッドあるいは溝を形成して裏面に到達した光を斜めに基
板内部に反射させたり、あるいは高反射率金属を裏面電
極に用いて基板内に反射する光を増加させるようにす
る、などのいわゆる光閉込めが行なわれている。First, the necessity of a light confining structure and a manufacturing method will be described. For example, in a crystalline silicon solar cell, it is important to effectively use the light incident on the cell surface when considering high efficiency. For this reason, an antireflection film is formed on the surface of the solar cell, a fine pyramid or groove is formed to reduce reflection, and a fine pyramid or groove is also formed on the back surface so that the light reaching the back surface can be obliquely transmitted to the substrate. So-called light confinement is performed such as internally reflecting the light, or using a high-reflectance metal for the back electrode to increase the light reflected in the substrate.
【0004】光閉込めを考えた場合、図2に示されるよ
うに、表面および裏面の構造としては、たとえばシリコ
ン基板20の表面の多数の溝21に直交する裏面の溝2
2を多数形成する構造が理論的に最もよいといわれてい
る。In consideration of light confinement, as shown in FIG. 2, the structure of the front surface and the back surface is, for example, a groove 2 on the back surface orthogonal to a large number of grooves 21 on the surface of the silicon substrate 20.
It is theoretically said that the structure forming a large number of 2 is the best.
【0005】このような光閉込め構造を得る方法として
は、単結晶基板ではSiO2 膜をマスクとして用いたア
ルカリ水溶液による異方性エッチング加工法や、ダイサ
ーなどによる機械的加工法が、多結晶基板ではダイサー
などによる機械的加工法が提案されている。As a method of obtaining such a light confining structure, an anisotropic etching processing method using an alkaline aqueous solution using a SiO 2 film as a mask for a single crystal substrate, or a mechanical processing method using a dicer is a polycrystalline method. For the substrate, a mechanical processing method using a dicer or the like has been proposed.
【0006】次に、BSF層について説明する。BSF
層は、基板の裏面近傍で発生したキャリアを高電界によ
り受光面の接合層側へ押し戻し、裏面でのキャリアの再
結合による損失を防ぐものである。Next, the BSF layer will be described. BSF
The layer pushes back the carriers generated in the vicinity of the back surface of the substrate to the bonding layer side of the light receiving surface by the high electric field, and prevents the loss due to the recombination of carriers on the back surface.
【0007】通常、BSF層はP型半導体基板の場合、
ボロンを不純物として1000℃程度の高温で裏面に熱
拡散する方法、あるいはAlペーストを裏面に印刷した
後、740℃程度の熱処理によりアロイ化する方法を用
いて、基板と同じ導電型を有し、かつ基板より高濃度な
不純物を含むP+ 層を形成している。Usually, in the case of a P-type semiconductor substrate, the BSF layer is
It has the same conductivity type as the substrate by using a method of thermally diffusing on the back surface at a high temperature of about 1000 ° C. using boron as an impurity, or a method of printing an Al paste on the back surface and alloying by heat treatment at about 740 ° C., In addition, a P + layer containing impurities having a higher concentration than the substrate is formed.
【0008】[0008]
【発明が解決しようとする課題】高効率化を目的とした
太陽電池は、前述のような技術を導入している。A solar cell aiming at high efficiency has introduced the above-mentioned technique.
【0009】しかしながら、基板の光閉込め構造の形成
とBSF層の形成という工程は本質的に別のものであ
り、現状の太陽電池の製造方法においては、それぞれ独
立した工程で形成しなければならない。However, the steps of forming the light confining structure of the substrate and the step of forming the BSF layer are essentially different from each other, and in the current method of manufacturing a solar cell, they must be formed in independent steps. .
【0010】また、裏面に微細な溝を形成した後にBS
F層を形成する場合、ボロン拡散法では、受光面側にボ
ロンの拡散を防止するための拡散マスクとなる十分な厚
みを持ったSiO2 膜を形成する必要があること、また
拡散温度も1000℃程度の高温となりライフタイムな
どの基板特性の低下を招きセル特性を低下させるといっ
た問題がある。Alアロイ法では、740℃程度の低温
でBSF層を形成できるが、溝の上からペーストを印刷
し焼成した場合、溝の凹凸形状がアロイ化により変形し
適用できないという問題がある。Also, after forming fine grooves on the back surface, BS
When forming the F layer, in the boron diffusion method, it is necessary to form a SiO 2 film having a sufficient thickness as a diffusion mask for preventing the diffusion of boron on the light receiving surface side, and the diffusion temperature is 1000. There is a problem that a high temperature of about ℃ results in deterioration of substrate characteristics such as lifetime and deterioration of cell characteristics. In the Al alloy method, the BSF layer can be formed at a low temperature of about 740 ° C., but when the paste is printed on the groove and baked, the uneven shape of the groove is deformed by alloying and cannot be applied.
【0011】本発明の目的は、半導体基板の光閉込め構
造の形成と低温でのBSF層の形成を1つの工程で行な
う方法を提供することにある。An object of the present invention is to provide a method of forming a light confining structure of a semiconductor substrate and forming a BSF layer at a low temperature in one step.
【0012】[0012]
【課題を解決するための手段】本発明の太陽電池の製造
方法においては、半導体基板の受光面側にPN接合を形
成し、その裏面にSiN絶縁膜あるいはTiO2 絶縁膜
のような絶縁膜を形成し、この絶縁膜に複数の開口部を
形成し、この開口部を含む裏面全面にたとえばAlペー
ストを印刷し、焼成することにより、半導体基板裏面に
微細な凹凸構造と凹凸壁面に沿ったBSF層を同時に低
温で形成する。According to the method of manufacturing a solar cell of the present invention, a PN junction is formed on the light receiving surface side of a semiconductor substrate, and an insulating film such as a SiN insulating film or a TiO 2 insulating film is formed on the back surface of the PN junction. By forming a plurality of openings in the insulating film, printing an Al paste, for example, on the entire back surface including the openings and baking the same to form a fine concavo-convex structure on the back surface of the semiconductor substrate and the BSF along the concavo-convex wall surface. The layers are simultaneously formed at low temperature.
【0013】[0013]
【作用】本発明の作用の原理について説明する。The principle of operation of the present invention will be described.
【0014】図3は、シリコン基板の裏面にAlペース
トを印刷し740℃で焼成した後、基板を斜め研磨しA
lの拡散状況を拡がり抵抗法で測定した結果のグラフで
ある。これより、基板表面から約7μmの深さのところ
までAl/Siのアロイ層が形成され、その下にAlが
濃度勾配を持って分布している拡散層があることがわか
る。これは通常の太陽電池のBSF層形成時に起こって
いる反応である。次に、Al/Siアロイ層の機能につ
いて調べるため、同一セルを用いアロイ層の除去前後の
分光感度特性を比較した。アロイ層除去後の面にはAl
を蒸着した。その結果、図4に示すように両者の特性は
ほぼ一致しており、BSF効果はAlの拡散層によるも
のであり、アロイ層は電極として働いていることがわか
る。In FIG. 3, after printing the Al paste on the back surface of the silicon substrate and baking it at 740 ° C., the substrate was obliquely polished to A
It is a graph of the result of having measured the spreading | diffusion state of 1 by the spreading resistance method. From this, it can be seen that an Al / Si alloy layer is formed up to a depth of about 7 μm from the substrate surface, and there is a diffusion layer below which Al is distributed with a concentration gradient. This is a reaction that occurs during the formation of the BSF layer of a normal solar cell. Next, in order to investigate the function of the Al / Si alloy layer, the spectral sensitivity characteristics before and after the removal of the alloy layer were compared using the same cell. Al on the surface after the alloy layer is removed
Was vapor-deposited. As a result, as shown in FIG. 4, the characteristics of both are almost the same, and it is understood that the BSF effect is due to the Al diffusion layer and the alloy layer functions as an electrode.
【0015】図5(a),(b),(c)は、シリコン
基板6の裏面をSiN膜1で覆い開口部2,2…を設け
た後、Alペーストを印刷・焼成した場合の各工程の断
面図である。(a)はSiN膜1に20μm幅の開口部
2を120μm間隔で設けた後、Alペースト3を印刷
した状態,(b)は740℃で焼成した状態,(c)は
Al/Siアロイ層を除去した後の断面を示している。
これより、開口部からのアロイ化は等方的に進行してお
り、幅が約120μmで、深さが約60μmの窪み4が
形成され、この窪み4の壁面に沿ってBSF層5が形成
されることがわかる。5 (a), 5 (b) and 5 (c) show the case where the back surface of the silicon substrate 6 is covered with the SiN film 1 and the openings 2, 2, ... It is sectional drawing of a process. (A) shows a state in which openings 2 having a width of 20 μm are provided in the SiN film 1 at intervals of 120 μm, and then an Al paste 3 is printed, (b) shows a state of firing at 740 ° C., (c) shows an Al / Si alloy layer. The cross section after removing is shown.
As a result, the alloying from the opening progresses isotropically, and the recess 4 having a width of about 120 μm and a depth of about 60 μm is formed, and the BSF layer 5 is formed along the wall surface of the recess 4. I understand that it will be done.
【0016】図5(c)に示す裏面の微細な窪みは、S
iN膜上の開口部パターンをライン状とすることで、図
2のような微細グルーブ構造とすることができる。The fine recesses on the back surface shown in FIG.
By making the opening pattern on the iN film linear, a fine groove structure as shown in FIG. 2 can be obtained.
【0017】図6(a)および(b)は、それぞれシリ
コン基板6の裏面が平らな構造とグルーブが形成されて
いる構造の場合に、入射光が裏面でどのように反射され
るかを示す断面図である。反射された光は平らな場合よ
りもグルーブ構造の場合のほうが基板内をより長い距離
進むのでそれだけ多く光電変換に寄与する。すなわち光
を閉込める働きが向上する。FIGS. 6A and 6B show how incident light is reflected by the back surface in the case where the back surface of the silicon substrate 6 is flat and the structure in which the groove is formed, respectively. FIG. The reflected light travels a longer distance in the substrate in the case of the groove structure than in the case of being flat, and thus contributes more to the photoelectric conversion. That is, the function of confining light is improved.
【0018】本発明の方法によれば、Alペーストの焼
成は740℃で行なわれるから、基板の光閉込め構造の
形成と、BSF層の形成が低温で同時に行なわれている
ことがわかる。According to the method of the present invention, since the Al paste is fired at 740 ° C., it can be seen that the formation of the light confining structure of the substrate and the formation of the BSF layer are simultaneously performed at a low temperature.
【0019】[0019]
【実施例】本発明は多結晶シリコン基板または単結晶シ
リコン基板いずれにも応用できる。The present invention can be applied to either a polycrystalline silicon substrate or a single crystal silicon substrate.
【0020】まず第1の実施例について説明する。図1
は多結晶シリコン基板を用い、本発明の方法により形成
した太陽電池の一例の斜視図である。シリコン基板6は
100mm角,250μm厚のP型キャスト多結晶シリ
コン基板であり、まず受光面側の溝加工を行なった。ダ
イサーにより、25μm厚のブレードを用い、深さ70
μmの溝14,14…を70μmのピッチで形成した。
この後、弗酸(HF)と硝酸(HNO3 )の混合液によ
るエッチング、および水酸化ナトリウム(NaOH)と
イソプロピルアルコール(IPA)を含む水溶液による
エッチングを行ない、基板表面のダメージ層を除去し
た。これにより受光面は微細な溝を多数持つ低反射な表
面構造となる。First, the first embodiment will be described. Figure 1
FIG. 3 is a perspective view of an example of a solar cell formed by the method of the present invention using a polycrystalline silicon substrate. The silicon substrate 6 is a P-type cast polycrystalline silicon substrate having a 100 mm square and a thickness of 250 μm. First, grooves on the light-receiving surface side were processed. With a dicer, a blade with a thickness of 25 μm and a depth of 70
The grooves 14, 14 ... Of μm were formed at a pitch of 70 μm.
After that, etching with a mixed solution of hydrofluoric acid (HF) and nitric acid (HNO 3 ) and etching with an aqueous solution containing sodium hydroxide (NaOH) and isopropyl alcohol (IPA) were performed to remove the damaged layer on the substrate surface. As a result, the light-receiving surface has a low-reflection surface structure having many fine grooves.
【0021】次に、POCl3 による燐を不純物とした
熱拡散(850℃)を行ない、受光面にN+ 層7を形成
した後、熱酸化法(800℃)によりパッシベーション
層となる薄い(厚さ約15nm)SiO2 膜8を形成し
た。続いてチタン酸イソプロピールを原料とした常圧C
VD法により反射防止膜となるTiO2 膜9(厚さ約5
5mm)を形成した。Then, thermal diffusion (850 ° C.) using phosphorus as an impurity with POCl 3 is performed to form an N + layer 7 on the light-receiving surface, and then a thin (thickness) layer (thickness) is formed by a thermal oxidation method (800 ° C.). A SiO 2 film 8 having a thickness of about 15 nm was formed. Then, normal pressure C using isopropyl titanate as a raw material
The TiO 2 film 9 (having a thickness of about 5
5 mm) was formed.
【0022】次に、基板裏面に残っているN+ 層を弗酸
と硝酸の混合液でエッチング除去し、裏面に原料ガスと
してSiH4 ,NH3 ,N2 を用いたプラズマCVD法
によりSiN膜(厚さ200〜250nm)を形成した
後、この膜を幅20μm、ピッチ130μmのライン状
に開口処理した。このラインの方向は、前記受光面側に
形成した溝14と直交する方向とした。なお、SiN膜
の形成には以下の条件を用いた。原料ガスとして、Si
H4 、NH3 、N2 の流量をそれぞれ10sccm、15
sccm、50sccmとして、基板温度を350℃、圧力を
0.75Torr、RFパワーを100Wとして形成し
た。Next, the N + layer remaining on the back surface of the substrate is removed by etching with a mixed solution of hydrofluoric acid and nitric acid, and a SiN film is formed on the back surface by plasma CVD using SiH 4 , NH 3 and N 2 as source gases. After forming (thickness: 200 to 250 nm), this film was subjected to opening treatment in a line shape having a width of 20 μm and a pitch of 130 μm. The direction of this line was a direction orthogonal to the groove 14 formed on the light receiving surface side. The following conditions were used for forming the SiN film. Si as a source gas
The flow rates of H 4 , NH 3 and N 2 are 10 sccm and 15 respectively.
As sccm, 50 sccm, the substrate temperature 350 ° C., to form a pressure 0.75 Torr, the RF power as 100W.
【0023】次に、裏面の全面にAlペーストをスクリ
ーン印刷し、N2 /O2 雰囲気中で740℃で焼成し
た。これにより、裏面の溝10、BSF層11、裏面電
極12が同時に形成される。Next, an Al paste was screen-printed on the entire back surface and baked at 740 ° C. in an N 2 / O 2 atmosphere. As a result, the groove 10 on the back surface, the BSF layer 11, and the back surface electrode 12 are simultaneously formed.
【0024】次に、受光面電極13となるAgペースト
を表面にスクリーン印刷し、N2 /O2 雰囲気中で58
0℃で焼成した後、はんだコートを行ない太陽電池を完
成する。Next, an Ag paste to be the light-receiving surface electrode 13 is screen-printed on the surface, and then 58 in an N 2 / O 2 atmosphere.
After firing at 0 ° C., solder coating is performed to complete the solar cell.
【0025】以上のプロセスにおいては、ボロンの拡散
時のような1000℃といった高温は使用せず、それに
よるライフタイムなどの低下はない。In the above process, a high temperature of 1000 ° C., which is different from the diffusion of boron, is not used, and the lifetime is not reduced.
【0026】図7(a)は本実施例による裏面に微細な
溝を形成した光閉込め構造と、形成しない構造において
表面から光を入射したときの反射率を示すグラフであ
る。本実施例による裏面に微細な溝を形成した光閉込め
構造は、形成しない構造に比べて、長波長側で反射率が
低く、裏面に到達した長波長光を基板内部に閉込める効
果があることがわかる。この結果、図7(b)に示すよ
うにセルの長波長領域での分光感度は向上し、短絡電流
が増加する。FIG. 7A is a graph showing the reflectance when light is incident from the front surface in the light confining structure in which fine grooves are formed on the back surface according to the present embodiment and the structure in which it is not formed. The light confining structure in which fine grooves are formed on the back surface according to the present embodiment has a lower reflectance on the long wavelength side than the structure not forming the groove, and has the effect of confining the long wavelength light reaching the back surface inside the substrate. I understand. As a result, as shown in FIG. 7B, the spectral sensitivity in the long wavelength region of the cell is improved and the short circuit current is increased.
【0027】次に第2の実施例について説明する。P型
単結晶シリコン基板(100mm角,250μm厚)を
用いて、第1の実施例と同様な方法により、微細な溝を
多数持つ低反射な表面構造の受光面を得る。Next, a second embodiment will be described. A P-type single crystal silicon substrate (100 mm square, 250 μm thick) is used to obtain a light-receiving surface having a large number of fine grooves and a low-reflection surface structure by the same method as in the first embodiment.
【0028】次に、第1の実施例と同様な方法によりN
+ 層およびSiO2 膜を形成し、続いてプラズマCVD
法により反射防止膜となるSiN膜(厚さ約85nm)
を形成した。Next, by the same method as in the first embodiment, N
+ Layer and SiO 2 film are formed, followed by plasma CVD
SiN film (thickness: about 85 nm) to be an antireflection film by the method
Was formed.
【0029】次に、基板裏面に残っているN+ 層を第1
の実施例と同様にして除去し、裏面にチタン酸イソプロ
ピールを原料とした常圧CVD法により、580℃でT
iO 2 膜(厚さ約55nm)を形成した後、この膜を第
1の実施例と同様にライン状に開口処理した。このライ
ンの方向は、前記受光面側に形成した溝と直交する方向
である。Next, the N remaining on the back surface of the substrate+Layer first
And remove it on the back
By atmospheric pressure CVD method using peel as a raw material, T at 580 ° C
iO 2After forming a film (thickness about 55 nm), this film is
In the same manner as in Example 1, opening treatment was performed in a line shape. This rye
Direction is the direction orthogonal to the groove formed on the light-receiving surface side.
Is.
【0030】次に、裏面の全面にAlペーストをスクリ
ーン印刷し、第1の実施例と同様に焼成すると、裏面の
溝構造、BSF層、裏面電極が同時に形成される。Next, an Al paste is screen-printed on the entire back surface and baked in the same manner as in the first embodiment, so that the groove structure on the back surface, the BSF layer, and the back surface electrode are simultaneously formed.
【0031】次に、受光面電極を第1の実施例と同様に
して形成する。次に、裏面のAl/Siアロイ層を塩酸
で除去し、その後にできた凹凸面に、めっき法により銅
の薄膜を形成して裏面電極とし太陽電池を完成した。Next, the light-receiving surface electrode is formed in the same manner as in the first embodiment. Next, the Al / Si alloy layer on the back surface was removed with hydrochloric acid, and a copper thin film was formed on the uneven surface formed thereafter by a plating method to form a back surface electrode to complete a solar cell.
【0032】図8は、第2の実施例による、裏面に微細
な溝を形成し、アロイ層を除去して銅の薄膜を形成した
セルとアロイ層をそのまま電極としたセルの分光感度を
示すグラフである。本実施例による銅の薄膜を形成した
セルは、アロイ層をそのまま電極としたセルに比べ、長
波長領域での分光感度が高く、銅のような反射率の高い
金属を電極とすることによって、さらに光閉込め効果が
向上することがわかる。FIG. 8 shows the spectral sensitivities of a cell according to the second embodiment in which a fine groove is formed on the back surface and the alloy layer is removed to form a copper thin film, and a cell in which the alloy layer is used as an electrode as it is. It is a graph. The cell formed with the copper thin film according to the present embodiment has a higher spectral sensitivity in the long wavelength region than the cell in which the alloy layer is used as an electrode as it is, and by using a highly reflective metal such as copper as the electrode, It can be seen that the light confinement effect is further improved.
【0033】なお、本実施例では裏面電極として銅を用
いたが、他に、高反射金属として金,銀なども使用可能
であり、薄膜形成方法についても、めっき法の他に蒸着
法がある。また、アロイ層の除去には塩酸以外にも王
水、弗酸などを使うことができる。Although copper is used as the back electrode in this embodiment, gold, silver, etc. can also be used as the highly reflective metal, and the thin film forming method includes a vapor deposition method other than the plating method. . In addition to hydrochloric acid, aqua regia, hydrofluoric acid or the like can be used to remove the alloy layer.
【0034】[0034]
【発明の効果】本発明によれば、光閉込め効果の高い裏
面溝構造がBSF層と同時に低温で形成されるため、セ
ルの特性が向上し、また、セルの製造工程が簡略化され
るので製造コストの低減にも効果がある。According to the present invention, since the back groove structure having a high light confinement effect is formed at a low temperature at the same time as the BSF layer, the cell characteristics are improved and the cell manufacturing process is simplified. Therefore, it is also effective in reducing the manufacturing cost.
【図1】本発明により製造した太陽電池の一例の斜視図
である。FIG. 1 is a perspective view of an example of a solar cell manufactured according to the present invention.
【図2】光閉込め構造を示す斜視図である。FIG. 2 is a perspective view showing a light confining structure.
【図3】Alペーストを印刷・焼成したときのキャリア
濃度分布を示すグラフである。FIG. 3 is a graph showing a carrier concentration distribution when an Al paste is printed and fired.
【図4】アロイ層を残したセルとアロイ層を除去した後
Alを蒸着したセルとの分光感度を示すグラフである。FIG. 4 is a graph showing the spectral sensitivities of a cell in which an alloy layer remains and a cell in which Al is evaporated after the alloy layer is removed.
【図5】(a)〜(c)はそれぞれ本発明の原理説明の
ための各工程の断面図である。5A to 5C are cross-sectional views of respective steps for explaining the principle of the present invention.
【図6】(a)および(b)はそれぞれ裏面が平らな場
合と溝を形成した場合との入射光の反射状態を示す図で
ある。6 (a) and 6 (b) are diagrams showing incident light reflection states when the back surface is flat and when a groove is formed.
【図7】(a)は裏面の微細な溝の有無による反射率の
違いを示すグラフであり、(b)は裏面の微細な溝の有
無による分光感度の違いを示すグラフである。FIG. 7A is a graph showing the difference in reflectance depending on the presence or absence of fine grooves on the back surface, and FIG. 7B is a graph showing the difference in spectral sensitivity depending on the presence or absence of fine grooves on the back surface.
【図8】アロイ層を残したセルとアロイ層を除去した後
銅薄膜を形成したセルとの分光感度を示すグラフであ
る。FIG. 8 is a graph showing spectral sensitivities of a cell in which an alloy layer is left and a cell in which a copper thin film is formed after removing the alloy layer.
1 SiN膜 2 開口部 3 Alペースト 4 窪み 5 BSF層 6 シリコン基板 7 N+ 層 8 SiO2 膜 9 TiO2 膜 10 溝 11 BSF層 12 裏面電極 13 受光面電極 14 溝1 SiN Film 2 Opening 3 Al Paste 4 Dimple 5 BSF Layer 6 Silicon Substrate 7 N + Layer 8 SiO 2 Film 9 TiO 2 Film 10 Groove 11 BSF Layer 12 Backside Electrode 13 Light-Receiving Surface Electrode 14 Groove
───────────────────────────────────────────────────── フロントページの続き (72)発明者 西田 誠 大阪府大阪市阿倍野区長池町22番22号 シ ャープ株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Makoto Nishida 22-22 Nagaike-cho, Abeno-ku, Osaka City, Osaka Prefecture
Claims (1)
と、 前記基板裏面に絶縁膜を形成する工程と、 前記絶縁膜に開口部を形成する工程と、 前記開口部を含む絶縁膜上に、半導体基板中に拡散した
とき半導体基板と同じ導電型の高濃度層を形成する性質
を有する金属を含む導電性ペーストを印刷する工程と、 前記ペーストを熱処理し開口部周辺に拡散した金属によ
り半導体基板と同じ導電型の微細な凹凸壁面を有する高
濃度層を形成する工程と、 を有することを特徴とする太陽電池の製造方法。1. A step of forming a PN junction on a semiconductor substrate, a step of forming an insulating film on the back surface of the substrate, a step of forming an opening in the insulating film, and a step of forming an insulating film on the insulating film including the opening. A step of printing a conductive paste containing a metal having a property of forming a high-concentration layer of the same conductivity type as that of the semiconductor substrate when diffused in the semiconductor substrate; and a semiconductor substrate made of metal diffused around the opening by heat-treating the paste. And a step of forming a high-concentration layer having a fine uneven wall surface of the same conductivity type as described above.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP33038193A JP3301663B2 (en) | 1993-12-27 | 1993-12-27 | Solar cell manufacturing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP33038193A JP3301663B2 (en) | 1993-12-27 | 1993-12-27 | Solar cell manufacturing method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH07193263A true JPH07193263A (en) | 1995-07-28 |
JP3301663B2 JP3301663B2 (en) | 2002-07-15 |
Family
ID=18231969
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP33038193A Expired - Fee Related JP3301663B2 (en) | 1993-12-27 | 1993-12-27 | Solar cell manufacturing method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3301663B2 (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
ES2149126A1 (en) * | 1999-01-11 | 2000-10-16 | Univ Pais Vasco | Solar cell manufacture, comprises intercalating etched silicon substrate with boron and phosphorus and coating with silver paste by silkscreen printing |
JP2005327871A (en) * | 2004-05-13 | 2005-11-24 | Shin Etsu Handotai Co Ltd | Solar battery and its manufacturing method |
JP2012142568A (en) * | 2010-12-17 | 2012-07-26 | Semiconductor Energy Lab Co Ltd | Photoelectric conversion element |
WO2013125036A1 (en) * | 2012-02-24 | 2013-08-29 | 三菱電機株式会社 | Photovoltaic element, method for manufacturing same, and photovoltaic module |
JP2013191714A (en) * | 2012-03-14 | 2013-09-26 | Semiconductor Energy Lab Co Ltd | Photoelectric conversion device |
JP2015135990A (en) * | 2015-04-14 | 2015-07-27 | パナソニックIpマネジメント株式会社 | silicon substrate |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2013014860A1 (en) * | 2011-07-26 | 2013-01-31 | パナソニック株式会社 | Plasma processing device and plasma processing method |
-
1993
- 1993-12-27 JP JP33038193A patent/JP3301663B2/en not_active Expired - Fee Related
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
ES2149126A1 (en) * | 1999-01-11 | 2000-10-16 | Univ Pais Vasco | Solar cell manufacture, comprises intercalating etched silicon substrate with boron and phosphorus and coating with silver paste by silkscreen printing |
JP2005327871A (en) * | 2004-05-13 | 2005-11-24 | Shin Etsu Handotai Co Ltd | Solar battery and its manufacturing method |
JP2012142568A (en) * | 2010-12-17 | 2012-07-26 | Semiconductor Energy Lab Co Ltd | Photoelectric conversion element |
WO2013125036A1 (en) * | 2012-02-24 | 2013-08-29 | 三菱電機株式会社 | Photovoltaic element, method for manufacturing same, and photovoltaic module |
JPWO2013125036A1 (en) * | 2012-02-24 | 2015-07-30 | 三菱電機株式会社 | Photovoltaic element |
JP2013191714A (en) * | 2012-03-14 | 2013-09-26 | Semiconductor Energy Lab Co Ltd | Photoelectric conversion device |
JP2015135990A (en) * | 2015-04-14 | 2015-07-27 | パナソニックIpマネジメント株式会社 | silicon substrate |
Also Published As
Publication number | Publication date |
---|---|
JP3301663B2 (en) | 2002-07-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10424685B2 (en) | Method for manufacturing solar cell having electrodes including metal seed layer and conductive layer | |
AU2006237110B2 (en) | Rear contact solar cell and method for making same | |
JP5277485B2 (en) | Manufacturing method of solar cell | |
FR2906405A1 (en) | METHOD OF MAKING DOPED REGIONS IN A SUBSTRATE AND PHOTOVOLTAIC CELL | |
US20170194519A1 (en) | Solar cell element | |
JP2989373B2 (en) | Method for manufacturing photoelectric conversion device | |
JP4656996B2 (en) | Solar cell | |
JP3301663B2 (en) | Solar cell manufacturing method | |
US11101392B2 (en) | Solar cell element and method for manufacturing solar cell element | |
JP2011228529A (en) | Solar battery cell and manufacturing method thereof | |
KR101122054B1 (en) | Method for making of back contact in solar cell | |
JP2866982B2 (en) | Solar cell element | |
JP2958203B2 (en) | Method of manufacturing solar cell element | |
KR100366350B1 (en) | Solar cell and method for manufacturing the same | |
JPH11307792A (en) | Solar cell element | |
JP2005260157A (en) | Solar cell and solar cell module | |
JP2015106624A (en) | Method for manufacturing solar cell | |
JP2009295913A (en) | Solar cell and method of manufacturing the same | |
KR101321538B1 (en) | Bulk silicon solar cell and method for producing same | |
JP2010258167A (en) | Method of manufacturing solar cell | |
JP2006339499A (en) | Method for manufacturing solar battery | |
JPWO2011132340A1 (en) | Method for manufacturing low-reflection substrate and method for manufacturing photovoltaic device | |
JPH05315629A (en) | Manufacture of solar cell | |
WO2009150741A1 (en) | Photovoltaic device manufacturing method | |
JPH09116178A (en) | Photoelectric transfer element, and its manufacture |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20020409 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080426 Year of fee payment: 6 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090426 Year of fee payment: 7 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090426 Year of fee payment: 7 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100426 Year of fee payment: 8 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100426 Year of fee payment: 8 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110426 Year of fee payment: 9 |
|
LAPS | Cancellation because of no payment of annual fees |