JPH0713436Y2 - Inverter device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to an inverter device for supplying high-frequency power to a load circuit by alternately turning on and off two switching elements connected in series.

[Prior Art] FIG. 8 is a circuit diagram of a conventional inverter device, and FIG. 9 is an operation waveform diagram thereof. A series circuit of switching elements Q ₁ and Q ₂ is connected in parallel with the power supply E, and switching element Q ₂
A load circuit Z is connected in parallel with. The load circuit Z comprises a resonant circuit consisting of the choke L ₀ and capacitor C _0, the voltage developed across the capacitor C ₀ is applied to the load l. OS
C is an oscillating circuit that generates oscillation outputs V _A and V _B that alternately repeat “High” level and “Low” level. The drive circuit A is a drive circuit for the switching element Q ₁ and includes a transistor T
_r5 through T _r9 and a resistor R ₃ to R _5. The drive circuit B is a drive circuit for the switching element Q ₂ and includes transistors T _{r10 to} T _r14.
And resistors R _{7 to} R ₉ . The drive circuit A has a transistor
The oscillation output V _A of the oscillation circuit OSC is supplied via the level shift circuit C including T _{r1 to} T _r4 , the resistor R _6, and the resistor R ₁₀ . The oscillation output V _B of the oscillation circuit OSC is supplied to the drive circuit B via the resistor R ₁₁ .

The level shift circuit C described above inputs the voltage signal of the oscillation output V _A to the first current mirror circuit composed of the transistors T _r1 and T _r2 via the resistor R ₁₀ to convert the voltage signal into a current signal, and converts this current signal. The voltage is transmitted to the resistor R ₆ via the second current mirror circuit composed of the transistors T _r3 and T _r4 , and is converted into the voltage signal V _R by the resistor R ₆ . Power for the upper circuit including a driving circuit A, the capacitor C ₁ is charged through the resistor R ₁
The power of the lower circuit including the drive circuit B is supplied by the capacitor C ₂ charged through the resistor R ₂ .
The change in the voltage V ₂ due to the switching of the switching elements Q ₁ and Q ₂ is applied between the collector and the emitter of the transistor T _r2 via the power supply capacitor C ₁ and the transistor T _r3. The signal is transmitted stably.

At time t ₀ in FIG. 9, when the oscillation output V _A becomes the “High” level, the base current is supplied to the transistors T _r1 and T _r2 via the resistor R ₁₀ , and the current flows between the collector and the emitter of the transistor T _r2. Flows. This current is a transistor
It flows through T _r3 and T _r4 , is transmitted to the collector of the transistor T _r4 , is converted into the voltage signal V _R by the resistor R _6, and is converted into the voltage signal V _R.
Becomes "High" level. This allows the transistor
T _r5 and T _r6 are turned on, transistors T _r7 and T _r9 are turned off, transistor T _r8 is turned on, voltage V ₉ becomes “High” level, and an on signal is supplied to switching element Q ₁ .
At this time, the current I ₁ of the switching element Q ₁ is flowing in the negative direction. This is because the oscillation frequency of the oscillation circuit OSC is set higher than the resonance frequency of the load circuit Z including the capacitor C ₀ and the choke L ₀ , and the current phase is delayed. At the time of switching the elements Q ₁ and Q ₂ , first, the currents I ₁ and I ₂ flow from the negative direction, so that the switching loss of the switching elements Q ₁ and Q ₂ can be reduced.

When the oscillation output V _A becomes “Low” level at time t ₁ , the collector current of the transistor Tr 2 _stops flowing, the voltage signal V _R also becomes “Low” level, and the voltage V ₉ becomes “Low” level.
Switching element Q ₁ turns off. At this time, choke L ₀
The current that has been flowing to the switching element Q ₂ tries to continue flowing, and flows as a negative current to the switching element Q ₂ . At the same time, the oscillation output V _B becomes “High” level, the transistors T _r12 and T _r13 are turned on through the resistor R ₁₁ , and the transistor T _r11 and
T _r14 is turned off, transistor T _r10 is turned on, output voltage V ₁₁ is set to “High” level, and switching element Q ₂
An ON signal is supplied to, and a current I ₂ flows.

Again the switching element Q ₂ is turned off at time t _2, the switching element Q ₁ is turned on, in this repetition, and supplies high-frequency power to the load circuit Z. The voltage V ₂ is shown in Fig. 9 (h).
As shown in, when the current I ₁ is in the negative direction, the load circuit Z
Since it becomes a regenerative current to the DC power supply E, it rises slightly above the level V _E of the DC power supply E. Further, when the current I ₂ is in the negative direction, the voltage is generated by the inductance component of the load circuit Z.
V ₂ has a lower potential than the zero level.

[Problems to be Solved by the Invention] In the above-mentioned conventional technique, the oscillator circuit OSC, the drive circuits A and B, and the level shift circuit C are integrated into a junction separation type semiconductor integrated circuit having a structure in which a withstand voltage is provided by a PN junction. In this case, there is a problem that the inverter device malfunctions. Less than,
This point will be described.

As shown in FIG. 10, on the P-type substrate 1, N
The type epitaxial layer 2 is formed, and is separated by the P type diffusion layer 3 to form each element in the separated N type epitaxial layer 2. Isolation of the breakdown voltage is performed with P type substrate 1 and N
The p-type substrate 1 is normally connected to a reference potential on the circuit by pn junction between the p-type epitaxial layers 2. In the circuit of FIG. 8, the voltage V _{0 at} the negative end of the DC power source E becomes the reference potential. If the P-type substrate 1 is at the lowest potential in terms of circuit operation, it can be separated from the N-type epitaxial layer 2 by the reverse characteristic of the PN junction, and each element is also separated by the P-type diffusion layer 3 for driving. Circuits that operate at different potentials, such as circuits A and B, can be configured on the same chip. An N ⁺ diffusion layer 4 is provided below the N type epitaxial layer 2.

FIG. 10 illustrates the structure of the NPN transistor and the PNP transistor. In the NPN transistor, the N ⁺ diffusion layer 7 is provided in the N type epitaxial layer 2 to serve as a collector region, and the base region made of the P type diffusion layer 5 is provided to form the P region.
The type diffusion layer 5 is provided with an emitter region made of an N ⁺ diffusion layer 6. In the PNP transistor, the N ⁺ diffusion layer 8 is provided in the N type epitaxial layer 2 as a base region, and the collector region including the P type diffusion layer 9 and the emitter region including the P type diffusion layer 10 are provided. is there.

When the circuit shown in FIG. 8 is configured in such a semiconductor integrated circuit, so-called parasitic diodes D _{1 to} D ₆ which are formed between the drive circuit A and the transistors T _r3 and T _r4 and the reference potential V ₀ are included. The circuit is shown in FIG. Further, in order to form a circuit by connecting each element inside the semiconductor integrated circuit, as shown in FIG. 12, an insulating layer 11 made of a film of silicon oxide or the like is provided on the element, and an aluminum layer is formed thereon. The wirings 12 to 15 made of a film or the like will be formed. The wirings 12 to 15 and the element are similarly connected by a contact made of an aluminum film or the like. If the wirings 12 to 15 cannot be carried out in one plane, the wiring is carried out by performing two-layer wiring or the like. In this case, as shown in FIG. 12, it is general that the capacitance component C _X becomes large by shortening the inter-wiring distance or arranging the wirings in parallel over a long distance.

When the circuit shown in FIG. 11 is operated in such a state,
The operation waveform of each part is as shown in FIG. When the oscillation output V _A becomes "High" level at time t ₀ , the switching element Q ₁ is turned on and the voltage V ₂ becomes high level as in the circuit of FIG. Current I ₁ flows, and at time t _{1, the} oscillation output V _A becomes “Lo
At the w "level, the switching element Q ₁ is turned off, and the current flowing in the choke L ₀ tries to continue flowing, and flows as a negative current to the switching element Q _2. At this time,
The drive circuit B has a higher potential than the drive circuit A, and the voltage V ₂ drops instantaneously. At this time, the drive circuit A
Inside the, because the voltage V _R is "Low" level, the transistor T _r5, T _r6 is turned off, the transistor T _r7, T _r9 is turned on by the bias resistor R _4, R _3. Therefore, the current due to the choke L ₀ is likely to be shunted via the parasitic diodes D ₂ and D ₅ . Then, when the shunt current from the diode D ₂ tries to flow in, the voltage V ₇ rises. As shown in FIG. 12, when close to the wire 14 to be applied in the wiring 15 and the voltage V _R the applied voltage V _7, the capacitance for component C _X is large, increasing the voltage V ₇ and the voltage V ₉ Then, a current flows through the resistor R ₆ via the capacitance component C _X , and the voltage V _R easily rises. In such a state, at time t ₁₂ , the voltage V _R rises, the transistor T _r6 turns on, the voltage V ₇ further rises, the transistor T _r8 turns on, and the voltage V ₉ becomes “Hig.
Therefore, the switching element Q ₁ is turned on and the voltage V ₂ becomes a positive voltage with respect to the reference potential V _0. At this time, the input signal V _{11 of the} switching element Q _{2 has} already been reached.
Is at the "High" level, switching elements Q ₁ and Q ₂
Will turn on at the same time.

If such a current path via a parasitic diode exists inside the semiconductor integrated circuit, a voltage will appear in some wiring via the parasitic diode due to noise, and it is difficult to eliminate this type of malfunction. It was Therefore, it is conceivable to insert a resistor in the current path via such a parasitic diode to attenuate the current that causes malfunction. FIG. 14 is an example of a circuit in which a resistor R ₁₂ for attenuating the current is inserted. Further, FIG. 15 is a circuit diagram of its main part, and FIG. 16 is an operation waveform diagram thereof.

The operation of the circuit provided with the resistor R ₁₂ will be described below. When the oscillation output V _A becomes “High” level at time t ₀ , the switching element Q ₁ is turned on as in the circuit of FIG. At this time, the voltage signal V _R is at the “High” level, the transistors T _r5 and T _r6 are on, and the transistor T _r7 is off. The voltage V ₁₂ generated in the resistor R ₁₂ rises due to this operating current.

When the oscillation output V _A becomes “Low” level at time t ₁ , the switching element Q ₁ turns off. The current flowing in the choke L ₀ tries to continue flowing and flows in the negative direction through the switching element Q ₂ , and the voltage V ₂ becomes a negative voltage with respect to the reference potential V ₀ , and the reference potential V ₀ is the voltage V ₂ Will be higher than. At this time, since the voltage V _R, the drive circuit A becomes "Low" level, and the transistor T _r5, T _r6 is off, the transistor T _r7, T _r9 is turned on, the transistor T _r8 is off. Then, towards the reference potential V ₀ which is by becoming higher than the voltage V _2, the current tends to pass through the parasitic diode D ₂ connected to the transistor T _r7.

However, in the circuit of FIG. 14, the current flowing through the parasitic diode D ₂ is suppressed by the resistor R ₁₂ . Further, as shown in FIG. 12, the internal wiring of the semiconductor integrated circuit increases the capacitance component C _X , and
Even if the wiring of V _R and voltage V ₇ becomes close, the malfunction that occurs in the past will not occur. This is the path that flows from both ends of the load circuit Z via the diode D _2, to become the resistance R ₁₂ to the emitter side of the transistor T _r6 is connected, when the voltage V ₇ rises, the capacity Voltage V _R due to component C _X
Even if the influence appears, the resistor R ₁₂ acts as an emitter resistor, which prevents the transistor T _{r6 from} being completely activated.

That is, at time t ₁₂ , the transistors T _r5 and T _r6 are turned off and the transistor T _r7 is turned on, so that the voltage V ₁₂ is applied to the resistor R ₁₂ , and therefore, the increase in the voltage V _R causes the transistor T _r5 to rise. Even if T _r6 tries to turn on, the resistance R ₁₂
Does not turn on completely due to the presence of
V ₆ hardly decreases. Thus, transistor T _r7 is not turned off, the voltage V ₇ does not increase greatly. Thus, no transistor T _r8 is turned on, the voltage V ₉ does not lead to turn on the switching element Q _1.

Thus, by inserting the resistor R ₁₂ , even if the switching element Q ₁ is turned off and the reference potential V ₀ becomes higher than the voltage V ₂ , the load current that tries to shunt from the parasitic diode D _2. Since erroneous operation due to is eliminated, the oscillation operation of the inverter device is stabilized.

However, as shown in FIG. 16, at time t ₁₂ , the value of the voltage V _R decreases but does not completely disappear, and when the influence of the capacitor C _X is large, the transistor T _r6
There is a possibility that the voltage will reach a voltage sufficient to turn on, which may cause damage due to malfunction.

The present invention has been made in view of the above circumstances, and an object thereof is to provide an inverter device capable of eliminating a malfunction of a circuit due to a parasitic diode and enabling a stable operation.

[Means for Solving the Problems] In the present invention, in order to solve the above problems, the first
As shown, two series circuits of the main switching element Q _1, Q ₂ in parallel with the first DC power supply E is connected in parallel with one of the main switching element Q _2, at least an inductance component (choke L ₀ ) Is connected, and the drive circuits A and B of the main switching elements Q ₁ and Q ₂ are formed on a junction separation type semiconductor integrated circuit that has a PN junction to withstand voltage. A and B are composed of an output switching element (transistors T _{r8 to} T _r11 ) for directly supplying a drive current to the main switching elements Q ₁ and Q ₂ , and a front stage section for supplying a control signal to the output switching element. The drive circuit A on the high potential side when viewed from the P-type region in the PN junction has a second DC power source (capacitor) whose one end is connected to the load circuit Z.
C ₁ ), and a resistor is provided between the connection point between the output switching element and the second DC power source in the drive circuit A on the high potential side and the front stage of the drive circuit A on the high potential side.
R ₁₂ is inserted so that the voltage drop across the resistor R ₁₂ reduces the input voltage V _R of the drive circuit A on the high potential side.

[Operation] The operation of the present invention will be described below with reference to the circuit of FIG. PN
Of the junction-separated drive circuits A and B, the drive circuit A on the high potential side as seen from the P-type region connected to the reference potential V ₀ is fed from the capacitor C ₁ whose one end is connected to the load circuit Z. Therefore, the current flowing through the element at the front stage of the drive circuit A is
It flows to the connection point between the capacitor C ₁ and the load circuit Z. When the main switching element Q ₁ is turned off, the potential V _{0 in} the P-type region becomes higher than the potential V _{2 at} the connection point between the capacitor C ₁ and the load circuit Z, and the front stage of the drive circuit A is connected via the PN junction. Although a current tends to flow through the element of the section, this current is suppressed by the resistor R _12, so that the occurrence of malfunction is reduced.

Further, in the present invention, when the switching element Q ₁ is turned off and the potential V ₂ becomes lower than the potential V ₀ , the voltage drop of the resistor R ₁₂ that suppresses the current that the parasitic diode turns on and tries to flow. As a result, the input voltage V _R of the drive circuit A is lowered, so that the rise of the voltage V _R , which causes a malfunction, can be limited, and a stable operation can be obtained.

[Embodiment] FIG. 1 is a circuit diagram of a first embodiment of the present invention, and FIG. 2 is an operation waveform diagram thereof. The circuit configuration of this embodiment will be described below. A switching element is provided at both ends of the DC power source E.
A series circuit of Q _1, Q ₂ are connected. Switching element
Q ₁ and Q ₂ are composed of, for example, transistors whose diodes are connected in anti-parallel. The switching elements Q ₁ and Q ₂ are on / off driven by the outputs V ₉ and V ₁₁ of the drive circuits A and B, respectively. A choke L ₀ is placed across the switching element Q _2.
A parallel circuit of the load 1 and the capacitor C ₀ is connected via. As the load 1, for example, a discharge lamp is used.

The series circuit of the resistor R ₁ and the capacitor C ₁ connected to both ends of the switching element Q ₁ is the power circuit of the upper circuit, and the series circuit of the resistor R ₂ and the capacitor C ₂ connected to both ends of the DC power source E is the lower circuit. It is a power circuit of the side circuit. The oscillator circuit OSC, which is fed by the capacitor C _2, outputs two oscillation outputs V _A and V _B. The oscillation output V _B is input to the drive circuit B and the oscillation output
V _A is input to the drive circuit A via the level shift circuit C. The level shift circuit C is made of a transistor T _r1 through T _r4 and the resistor R _6, R _10, and performs signal transmission without using an insulating element of transformer or the like. The oscillation output V _A of the oscillation circuit OSC is supplied to the transistor T _r1 via the resistor R ₁₀ . The transistors T _r1 and T _{r2 form} a current mirror circuit, and the same current as that flowing through the transistor T _r1 also flows through the transistor T _r2 . Current flowing through the transistor T _r2 is supplied to the current mirror circuit consisting of transistors T _r3, T _r4, the same current as the current flowing through the transistor T _r3 flows to the transistor T _r4. The transistor T _r4 has a resistor R ₆ connected in series and is connected across the capacitor C ₁ .

The voltage V _R generated in the resistor R ₆ is applied to the bases of the transistors T _r5 and T _r6 in the drive circuit A and the resistor R ₁₂ . The emitters of the transistors T _r5 , T _r6 , T _r7 are connected to the negative terminal of the capacitor C ₁ via the resistor R ₁₂ , and the collector is a resistor.
It is connected to the positive terminal of capacitor C ₁ via R ₃ , R ₄ , and R ₅ . The collector of the transistor T _{r5 is} the base of the transistor T _r9 , and the collector of the transistor T _r6 is the transistor T _r9.
the base of _r7, the collector of the transistor T _r7 is connected to the bases of the transistors T _r8. The collector of the transistor T _r8 is connected to the positive end of the capacitor C ₁ , and the emitter of the transistor T _r9 is connected to the negative end of the capacitor C ₁ . The emitter of the transistor T _r8 is commonly connected to the collector of the transistor T _r9 , and the drive signal is supplied to the switching element Q ₁ from the connection point.

On the other hand, the oscillation output V _B of the oscillator circuit OSC is applied to the bases of the transistors T _r12 and T _r13 in the drive circuit B via the resistor R ₁₁ . The emitters of the transistors T _r12 , T _r13 , T _r14 are connected to the negative end of the capacitor C ₂ , and the collectors are connected to the positive end of the capacitor C ₂ via resistors R ₉ , R ₈ , R ₇ . The collector of transistor T _r12 is transistor T
the base of the _r11, the collector of the transistor T _r13 is the base of the transistor T _r14, the collector of the transistor T _r14 are respectively connected to the base of the transistor T _r10.
The collector of the transistor T _r10 is connected to the positive terminal of the capacitor C ₂ , and the emitter of the transistor T _r11 is the capacitor C ₂
Is connected to the negative electrode end of. The emitter of the transistor T _r10 is commonly connected to the collector of the transistor T _r11 and supplies a drive signal to the switching element Q ₂ from the connection point.

In this embodiment, in the drive circuit A, the switching element
Transistors T _r8 and T _r9 that supply on / off current directly to Q ₁
And the transistors T _{r5 to} T _r7 and resistors R _{3 to} R _{5 in the previous} stage.
A resistor R ₁₂ is inserted between the minus lines of the power supply of the circuit consisting of. In addition, the resistor R ₆ is a transistor
It is connected between the bases of T _r5 and T _r6 and the capacitor C ₁ side of the resistor R ₁₂ .

According to the present invention, as shown in FIG. 2, when the current is suppressed by the resistor R ₁₂ while the parasitic diode is turned on, the voltage drop (transistor T ₁₂ ) generated across the resistor R ₁₂ is reduced. _r5 , T _r6 emitter side is plus),
It is subtracted from the voltage V _R generated in the resistor R ₆ , and the voltage is applied between the base and emitter of the transistors T _r5 and T _r6 . For this reason, the base-emitter voltage V _R, the time t ₁₂
, The transistor T _r5 and T _r6 are not activated at almost no positive side. Therefore, the potential V ₆ is less likely to decrease, the potential V ₇ is less likely to increase, and the switching element Q ₁
It will not be turned on due to a malfunction immediately after turning off.

FIG. 3 shows the essential circuit of the second embodiment of the present invention. In this embodiment, the resistor R ₁₂ is replaced with the first resistor R ₁₂ ′ and the second resistor R ₁₂ ′.
It is divided into R ₁₂ ″, and a part of the voltage drop due to the resistor R ₁₂ is used for lowering the base-emitter voltage V _R ′ of the transistors T _r5 and T _r6 .
Without using all ₁₂ voltage drops, transistor T
The same effect can be obtained by lowering the voltage V _R ′ to a level at which _r5 and T _r6 are not activated.

FIG. 4 is a circuit diagram of essential parts of a third embodiment of the present invention. In this embodiment, the resistor R ₆ is connected in the same manner as the conventional example shown in FIG. 14, and the voltage drop of the resistor R ₁₂ is transmitted to the bases of the transistors T _r5 and T _r6 by the resistor R ₁₃ . It is a thing. Also in this embodiment, since the input voltage V _R of the drive circuit A is lowered by the voltage drop of the resistor R ₁₂ , the same effect can be obtained.

FIG. 5 is a circuit diagram of essential parts of a fourth embodiment of the present invention. In this embodiment, a constant voltage element Z _D such as a Zener diode is connected instead of the resistor R ₁₃ in the circuit of FIG. The input voltage V _R of the drive circuit A is the transistor T
_r5, does not rise above the base-emitter voltage of T _r6, by setting the voltage limit of the constant voltage element Z _D a (Zener voltage) to substantially the same voltage value and the voltage V _R at this time, the resistance
When the voltage drop of R ₁₂ occurs, the voltage V _R can be lowered, and the same effect can be obtained.

FIG. 6 is a circuit diagram of essential parts of a fifth embodiment of the present invention. This embodiment utilizes the forward voltage drop of the diode D ₁₀ instead of the Zener diode Z _{D in} the circuit of FIG. 5, and adds a diode D ₁₁ depending on the degree to which the voltage V _R is desired to be lowered. Etc. to obtain the optimum operation,
The same effect can be obtained.

FIG. 7 is a circuit diagram of essential parts of a sixth embodiment of the present invention. NPN
_-Type transistor T _r8 and PNP-type transistor T _r9 are connected so as to form a complementary operation type emitter follower, and their bases are commonly connected to each other.
It is connected to the collector of T _r7 and the emitters are connected in common to supply a drive signal to the switching element Q ₁ . The collector of the transistor T _r8 is the capacitor C
_To the positive terminal of ₁ , the collector of the transistor T _r9 is a capacitor
Each is connected to the negative terminal of C ₁ . Transistor
The emitters of T _r6 and T _r7 are connected to the capacitor C ₁ via the resistor R _12.
, And the collector is connected to the positive terminal of the capacitor C ₁ via resistors R ₄ and R ₅ . Transistor T
The collector of _r6 to the base of the transistor T _r7, the collector of the transistor T _r7 is connected to the base of the transistor T _r8, T _r9. The configuration of the signal transmission circuit including the transistors T _r3 , T _r4 and the resistor R ₆ is the same as that of the circuit of FIG.
The voltage V _R generated in the resistor R ₆ is applied to the base of the transistor T _r6 in the drive circuit A. Even with such a configuration, the same effect can be obtained by inserting the resistor R ₁₂ and connecting the resistor R ₆ to the capacitor C ₁ side. The capacitor C ₃ is a power supply capacitor to the transistor T _r6 side of the circuit operation of the resistance R ₁₂ more stable.

[Advantages of the Invention] As described above, the present invention is an inverter device that supplies high frequency power to a load circuit including an inductance component by alternately turning on and off two main switching elements connected in series. When the drive circuit of is formed on a junction-separated semiconductor integrated circuit that has a withstand voltage at a PN junction, an output switching element and a load circuit in the drive circuit on the high potential side as viewed from the P-type region of the PN junction are formed. Since a resistor is inserted between the connection point of and the preceding stage in the drive circuit on the high potential side, it is possible to suppress a part of the load current due to the inductance component from flowing through the PN junction, As a result, it is possible to prevent malfunction of the circuit and provide an inverter device with high reliability. Further, in the present invention, since the rise of the input voltage in the drive circuit on the high potential side is reduced by the voltage drop due to the resistance, when the switching element on the high potential side is turned off, the high potential side There is an effect that it is possible to reliably prevent an ON phenomenon due to a malfunction of the switching element on the high potential side due to an increase in the input voltage of the drive circuit, and to realize a more stable inverter device.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a first embodiment of the present invention, FIG. 2 is an operation waveform diagram of the same as above, FIG. 3 is a circuit diagram of essential parts of a second embodiment of the present invention, and FIG. FIG. 5 is a circuit diagram of an essential part of the third embodiment, FIG. 5 is a circuit diagram of an essential part of the fourth embodiment of the present invention, FIG. 6 is a circuit diagram of an essential part of the fifth embodiment of the present invention, and FIG. FIG. 8 is a circuit diagram of a conventional example, FIG. 9 is an operation waveform diagram of the same, FIG. 10 is a sectional view of a junction-separated semiconductor integrated circuit, and FIG. 11 is parasitic. An equivalent circuit diagram of a conventional example including a diode, FIG. 12 is a sectional view showing a state of wiring on a semiconductor integrated circuit, FIG. 13 is an operation waveform diagram at the time of malfunction of the conventional example, and FIG. 14 is another conventional example. Circuit diagram, Fig. 15
Fig. 16 is an operation waveform diagram of the above. A and B are drive circuits, C is a level shift circuit, D _{1 to} D ₆ are parasitic diodes, E is a DC power supply, L ₀ is a choke, l is a load,
Q ₁ and Q ₂ are switching elements, R _{1 to} R ₁₃ are resistors, and T _{r1 to} T _r14
Transistors, Z is a load circuit, C ₁ -C ₃ are capacitors.

Claims (1)

[Scope of utility model registration request] A series circuit of two main switching elements is connected in parallel with a first DC power source, a load circuit containing at least an inductance component is connected in parallel with one main switching element, and each main switching element is connected. Drive circuits are configured on a junction-separated semiconductor integrated circuit that has a PN junction to withstand voltage, and each drive circuit connects an output switching element that supplies a drive current directly to the main switching element and the output switching element. The drive circuit on the high potential side when viewed from the P-type region in the PN junction is supplied from a second DC power source whose one end is connected to the load circuit, and the high potential side is provided. A resistor is inserted between the connection point between the output switching element and the second DC power source in the drive circuit of the above and the preceding stage portion of the drive circuit on the high potential side. An inverter device characterized in that a voltage drop is configured to reduce an input voltage of a drive circuit on the high potential side.