JPH069227B2 - Method for manufacturing semiconductor substrate - Google Patents
Method for manufacturing semiconductor substrateInfo
- Publication number
- JPH069227B2 JPH069227B2 JP62051306A JP5130687A JPH069227B2 JP H069227 B2 JPH069227 B2 JP H069227B2 JP 62051306 A JP62051306 A JP 62051306A JP 5130687 A JP5130687 A JP 5130687A JP H069227 B2 JPH069227 B2 JP H069227B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- single crystal
- semiconductor substrate
- oxygen
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000758 substrate Substances 0.000 title claims description 20
- 239000004065 semiconductor Substances 0.000 title claims description 8
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 238000000034 method Methods 0.000 title description 10
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 13
- 239000001301 oxygen Substances 0.000 claims description 9
- 229910052760 oxygen Inorganic materials 0.000 claims description 9
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 7
- 238000010438 heat treatment Methods 0.000 claims description 5
- 150000002500 ions Chemical class 0.000 claims description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 12
- 229910004298 SiO 2 Inorganic materials 0.000 description 11
- 229910052710 silicon Inorganic materials 0.000 description 10
- 239000010703 silicon Substances 0.000 description 10
- 238000005468 ion implantation Methods 0.000 description 6
- 125000004430 oxygen atom Chemical group O* 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 3
- 229910001873 dinitrogen Inorganic materials 0.000 description 3
- 238000002513 implantation Methods 0.000 description 3
- -1 oxygen ion Chemical class 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 230000005465 channeling Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 125000004429 atom Chemical group 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
Landscapes
- Element Separation (AREA)
- Recrystallisation Techniques (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体基板の製造方法に関し、特に大規模集
積回路に用いられる絶縁体膜上に単結晶シリコン層を有
する半導体基板の製造方法に関する。Description: TECHNICAL FIELD The present invention relates to a method for manufacturing a semiconductor substrate, and more particularly to a method for manufacturing a semiconductor substrate having a single crystal silicon layer on an insulating film used in a large scale integrated circuit. .
大規模集積回路は、各種コンピュータや家庭電化製品等
の広い分野に用いられており、その性能は著しく向上し
て来ているが、集積度が向上するにつれて、ラッチ・ア
ップ、ソフト・エラー等の信頼性に関わる問題や、消費
電力、動作速度等の性能に関わる問題が生じ始めてい
る。Large-scale integrated circuits are used in a wide range of fields such as various computers and home appliances, and their performance has improved remarkably. However, as the degree of integration increases, latch-up, soft error, etc. Problems related to reliability and performance related problems such as power consumption and operating speed have begun to occur.
これらの問題を解決するための１つの手法として、二酸
化ケイ素（ＳｉＯ２）の上に形成した単結晶シリコン層
に半導体装置を形成する技術が試みられている。As one method for solving these problems, a technique of forming a semiconductor device on a single crystal silicon layer formed on silicon dioxide (SiO 2 ) has been attempted.
ＳｉＯ2膜の上に単結晶シリコン層を形成する技術の例
としては、“イオン注入技術”を用いて、通常の単結晶
シリコン基板の内部へ、高濃度の酸素原子を導入して埋
め込みＳｉＯ2層を形成するＳＯＩ（Silico on Insulat
or）技術（例えばB.Y.MaOetal.Appl.Phys.Lett、48(12),
24 Mauch 1986,p.794）がある。As an example of a technique for forming a single crystal silicon layer on a SiO 2 film, an “ion implantation technique” is used to introduce a high concentration of oxygen atoms into a normal single crystal silicon substrate to embed SiO 2 film. SOI (Silico on Insulat) forming a layer
or) technology (eg BYMaOetal.Appl.Phys.Lett, 48 (12),
24 Mauch 1986, p.794).
上述した従来のＳＯＩ技術では、酸素イオン注入工程に
おいて、いわゆる「チャネリング現象」を生じる原子が
多数あるため、形成される埋め込みＳｉＯ2膜の厚さ
や、このＳｉＯ2膜の上に形成される単結晶シリコン層
の厚さが、シリコン基板全面にわたって均一ではなくな
ってしまう。その結果、この基板の上に作成された集積
回路の特性が均一でなくなってしまう、という欠点があ
る。In the above-described conventional SOI technology, since there are many atoms that cause a so-called “channeling phenomenon” in the oxygen ion implantation step, the thickness of the embedded SiO 2 film to be formed and the single crystal formed on this SiO 2 film. The thickness of the silicon layer is not uniform over the entire surface of the silicon substrate. As a result, there is a drawback that the characteristics of the integrated circuit formed on this substrate are not uniform.
本発明の半導体基板の製造方法は、単結晶シリコン基板
に酸素以外の元素からなるイオンを注入して半導体基板
内部に非晶質領域を形成する工程と、その後酸素からな
るイオンを注入する工程とを有している。A method for manufacturing a semiconductor substrate of the present invention comprises a step of implanting ions of an element other than oxygen into a single crystal silicon substrate to form an amorphous region inside the semiconductor substrate, and a step of implanting ions of oxygen thereafter. have.
次に、本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第１図(a)〜(c)は、本発明の第１の実施例の縦断面図で
ある。1 (a) to 1 (c) are longitudinal sectional views of a first embodiment of the present invention.
第１図(a)に示すように通常の高品質単結晶シリコン基
板１０１に対し、表面に垂直な方向から７゜傾けた角度
から、注入エネルギー200kev，ドース量１×１０15Ｓｉ
+／cm2，基板温度８０ｋの条件で、シリコン原子１０２
をイオン注入する事によって、シリコン表面に約2000Å
の単結晶層１０３を残し、その下に約4000Åの非晶質シ
リコン層１０４を形成する。As shown in FIG. 1 (a), with respect to a normal high-quality single crystal silicon substrate 101, an implantation energy of 200 kev and a dose of 1 × 10 15 Si from an angle inclined by 7 ° from a direction perpendicular to the surface.
+ / Cm 2 and a substrate temperature of 80 k, silicon atoms 102
2000 Å on the silicon surface by implanting
The single crystal layer 103 is left, and an amorphous silicon layer 104 of about 4000 Å is formed thereunder.
次に、第１図(b)に示すように注入エネルギー150kev,ド
ース量2.5×１０18Ｏ+／cm2，基板温度をほぼ５５０℃
に保った条件で、酸素原子１０５をイオン注入する事に
よって、埋め込みＳｉＯ2層１０６を形成する。シリコ
ン原子１０２及び酸素原子１０５のイオン注入によって
生じた注入損傷を回復させ、また埋め込みＳｉＯ2層の
形成に不要な過剰酸素を外部拡散させるために１０-5To
rr以下の圧力の真空中で、1280℃で４時間の熱処理を行
なうことによって、第１図(c)に示すように均一な厚さ
の表面単結晶シリコン層１０９と埋め込みＳｉＯ2層１
０６を得る。Next, as shown in FIG. 1 (b), the implantation energy is 150 kev, the dose is 2.5 × 10 18 O + / cm 2 , and the substrate temperature is approximately 550 ° C.
The embedded SiO 2 layer 106 is formed by ion-implanting oxygen atoms 105 under the condition of being kept at. In order to recover the implantation damage caused by the ion implantation of the silicon atoms 102 and the oxygen atoms 105, and to outdiffuse excess oxygen unnecessary for forming the embedded SiO 2 layer, 10 −5 To
By performing a heat treatment at 1280 ° C. for 4 hours in a vacuum at a pressure of rr or less, the surface single crystal silicon layer 109 having a uniform thickness and the embedded SiO 2 layer 1 are formed as shown in FIG.
I get 06.
第２図は、本発明の第２の実施例の縦断面図である。FIG. 2 is a vertical sectional view of the second embodiment of the present invention.
まず、第１の実施例の場合と同様にシリコン原子１０
２、酸素原子１０５をイオン注入する（第２図(a)，
(b)）。First, as in the case of the first embodiment, silicon atoms 10
2. Ion implantation of oxygen atoms 105 (Fig. 2 (a),
(b)).
次に、第２図(c)に示すように、注入損傷１０７，１０
８を回復し、埋め込みＳｉＯ2層１０６の形成に不要な
温剰酸素原子を外部拡散させるために窒素ガス中で熱処
理を行なう際に、シリコン基板が窒素ガスにより窒化さ
れるのを防ぐために常圧気相成長法によって厚さ3000Å
程度の酸化膜209を形成する。Next, as shown in FIG. 2 (c), injection damage 107, 10
In order to prevent the silicon substrate from being nitrided by nitrogen gas when performing heat treatment in nitrogen gas for recovering No. 8 and externally diffusing warm oxygen atoms unnecessary for forming the embedded SiO 2 layer 106, atmospheric pressure gas is used. 3000 Å by phase growth method
An oxide film 209 is formed to some extent.
次に、第２図(d)に示すように、窒素ガス中、1280℃
と、４時間の熱処理を行なうことによって、均一な厚さ
の単結晶シリコン層１０９と埋め込みＳｉＯ2層１０６
を得る。Next, as shown in FIG. 2 (d), at 1280 ° C in nitrogen gas.
By performing heat treatment for 4 hours, the single crystal silicon layer 109 and the embedded SiO 2 layer 106 having a uniform thickness are formed.
To get
この第２の実施例に示す方法によれば、通常の電気炉を
用いて熱処理を行なうことができるため、量産性の点で
利点がある。According to the method shown in the second embodiment, the heat treatment can be carried out by using an ordinary electric furnace, which is advantageous in terms of mass productivity.
以上説明したように、本発明は、酸素イオン注入工程に
先立って、シリコンイオン注入を用いて、あらかじめシ
リコン基板内部にシリコンの非晶質層を形成しておくこ
とによって、酸素イオンのチャネリング現象を抑制でき
るため、シリコン基板全面にわたって、厚さが均一であ
り、かつ結晶性の高い表面単結晶シリコン層と、均一な
厚さの埋め込みＳｉＯ2層及び良好な酸化膜／シリコン
界面を形成する事が可能になり、この基板上に作成され
る集積回路の特性を均一化できる効果がある。As described above, according to the present invention, the oxygen ion channeling phenomenon is prevented by forming an amorphous layer of silicon in advance inside the silicon substrate by using silicon ion implantation prior to the oxygen ion implantation step. Since it can be suppressed, a surface single crystal silicon layer having a uniform thickness and high crystallinity, a buried SiO 2 layer having a uniform thickness, and a good oxide film / silicon interface can be formed over the entire surface of the silicon substrate. This makes it possible to make the characteristics of the integrated circuit formed on this substrate uniform.
第１図(a)〜(c)は本発明の第１の実施例の縦断面図、第
２図(a)〜(d)は本発明の第２の実施例の縦断面図であ
る。 １０１……単結晶シリコン基板、１０２……シリコンイ
オン、１０３……表面単結晶シリコン層、１０４……非
晶質シリコン層、１０５……酸素イオン、１０６……埋
め込み酸化膜層、107,108……注入損傷層、２０９……
酸化膜、１０９……表面単結晶シリコン層。1 (a) to (c) are vertical sectional views of a first embodiment of the present invention, and FIGS. 2 (a) to (d) are vertical sectional views of a second embodiment of the present invention. 101 ... Single crystal silicon substrate, 102 ... Silicon ion, 103 ... Surface single crystal silicon layer, 104 ... Amorphous silicon layer, 105 ... Oxygen ion, 106 ... Embedded oxide film layer, 107, 108 ... Implant Damaged layer, 209 ...
Oxide film, 109 ... Surface single crystal silicon layer.
Claims (1)
なるイオンを注入し、半導体基板内部に非晶質領域を形
成する工程と、その後酸素からなるイオンを前記非晶質
領域内に注入する工程と、前記非晶質領域を酸化膜に変
える為の熱処理工程とを有することを特徴とする半導体
基板の製造方法。1. A step of implanting ions of an element other than oxygen into a single crystal silicon substrate to form an amorphous region inside a semiconductor substrate, and thereafter implanting ions of oxygen into the amorphous region. A method of manufacturing a semiconductor substrate, comprising: a step; and a heat treatment step for changing the amorphous region into an oxide film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62051306A JPH069227B2 (en) | 1987-03-05 | 1987-03-05 | Method for manufacturing semiconductor substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62051306A JPH069227B2 (en) | 1987-03-05 | 1987-03-05 | Method for manufacturing semiconductor substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63217657A JPS63217657A (en) | 1988-09-09 |
| JPH069227B2 true JPH069227B2 (en) | 1994-02-02 |
Family
ID=12883234
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62051306A Expired - Lifetime JPH069227B2 (en) | 1987-03-05 | 1987-03-05 | Method for manufacturing semiconductor substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH069227B2 (en) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5288650A (en) * | 1991-01-25 | 1994-02-22 | Ibis Technology Corporation | Prenucleation process for simox device fabrication |
| JP2666757B2 (en) * | 1995-01-09 | 1997-10-22 | 日本電気株式会社 | Method for manufacturing SOI substrate |
| US5930643A (en) | 1997-12-22 | 1999-07-27 | International Business Machines Corporation | Defect induced buried oxide (DIBOX) for throughput SOI |
| US6486037B2 (en) | 1997-12-22 | 2002-11-26 | International Business Machines Corporation | Control of buried oxide quality in low dose SIMOX |
| US6846727B2 (en) | 2001-05-21 | 2005-01-25 | International Business Machines Corporation | Patterned SOI by oxygen implantation and annealing |
| US6541356B2 (en) | 2001-05-21 | 2003-04-01 | International Business Machines Corporation | Ultimate SIMOX |
| US6602757B2 (en) | 2001-05-21 | 2003-08-05 | International Business Machines Corporation | Self-adjusting thickness uniformity in SOI by high-temperature oxidation of SIMOX and bonded SOI |
| US20020190318A1 (en) | 2001-06-19 | 2002-12-19 | International Business Machines Corporation | Divot reduction in SIMOX layers |
| US6784072B2 (en) * | 2002-07-22 | 2004-08-31 | International Business Machines Corporation | Control of buried oxide in SIMOX |
| JP2008244261A (en) | 2007-03-28 | 2008-10-09 | Shin Etsu Handotai Co Ltd | Manufacturing method of soi substrate |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07120702B2 (en) * | 1986-06-12 | 1995-12-20 | 松下電器産業株式会社 | Method for manufacturing semiconductor device |
-
1987
- 1987-03-05 JP JP62051306A patent/JPH069227B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63217657A (en) | 1988-09-09 |
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