JPH0687669B2 - Inverter circuit abnormality detection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention is applied to a power conversion device that performs power conversion using an inverter, such as an uninterruptible power supply device, and detects an abnormality of the inverter in the device. The present invention relates to an abnormality detecting device for an inverter, which is adapted to detect the abnormality.

[Conventional technology]

FIG. 7 is a circuit diagram showing an example of a conventional inverter circuit abnormality detecting device disclosed in, for example, Japanese Patent Laid-Open No. 53-88121, in which 1 is a three-phase auxiliary pulse commutation inverter circuit, and 2 is DC power supply, 3 is a high speed circuit breaker, 4 is a current limiting reactor, 5 is a balanced capacitor, 6
Is an auxiliary thyristor arm, 7 is an insulating transformer, 8 is a rectifier, 9 is a transistor, 10 and 11 are negative circuits, 12 is an exclusive OR circuit, 13 is a monostable multivibrator, and 14 is a commutation detection circuit. FIG. 8 is a timing chart for explaining the operation of the conventional example.

Next, the operation will be described. When the three-phase auxiliary pulse commutation inverter circuit 1 operates normally, commutation occurs at the output of the isolation transformer 7 connected between the midpoint of the balancing capacitor 5 and the midpoint of the inverter auxiliary thyristor arm 6. A pulse voltage appears at the cycle, and the commutation detection circuit 14 that passes through the rectifier 8
The input waveform to is as shown in the period T ₁ of FIG. On the other hand, the commutation detection circuit 14 has a period T ₁ shown in FIG.
The commutation command pulse waveform of the inverter as shown in (1) is given from the control circuit (not shown). The transistor 9 is repeatedly turned on and off by the input from the isolation transformer 7, and its collector output has a waveform as shown in the period T ₁ of FIG. 8 (c). Is further inverted waveform by the NOT circuit 10, the period T ₁ of the Figure 8 having a commutation command pulse waveform and phase, which is illustrated as a period T ₁ in FIG. 8 (b) (d)
A waveform as shown in is obtained. Exclusive OR circuit 12
The commutation pulse waveform from the negation circuit 10 and the control circuit (b)
Is input and both inputs are “0” in the logic of “0” or “1”
The output is continuously output and the waveform shown in the period T ₁ of FIG. 8 (e) is obtained. The output of the monostable multivibrator 13 continues to output the waveform "1" shown in the period T ₁ of FIG.
As the output of 11, the waveform “0” shown in the period T ₁ of FIG.
To get On the other hand, if the commutation of the inverter becomes abnormal,
By obtaining a "1" of the waveform shown in the period T ₂ of the period T ₂ (a) ~ FIG. 8 as the output of the NOT circuit 11, as shown in waveform (g) (g) in FIG inverter rolling Detect abnormal flow.

[Problems to be Solved by the Invention]

Since the conventional abnormality detection device for the inverter circuit has a configuration in which the insulation transformer 7 is directly connected between the middle point of the balanced capacitor circuit 5 and the middle point of the auxiliary thyristor arm 6, the insulation transformer 7 is not switched. An iron core having a size having a magnetic flux capacity according to the flow cycle is required, and as many insulating transformers 7 as the number of auxiliary thyristor arms 6 to be used are required. Therefore, there is a problem that the shape of the entire inverter device becomes large and the weight becomes heavy. There is also a problem in that an unstable operation such as an erroneous detection of an abnormality confirmation operation occurs due to an operation delay of the main circuit switching element or the element drive circuit.

The present invention has been made to solve the above problems, and eliminates the need for a large-sized detection isolation transformer.
An object of the present invention is to provide an abnormality detection device for an inverter circuit, which is intended to reduce the size and weight of the entire device and prevent the occurrence of an unstable abnormality confirmation operation due to an operation delay of a main circuit switching element or an element drive circuit. It is what

[Means for Solving the Problems]

An abnormality detection device for an inverter circuit according to the present invention uses a current detection circuit and a differentiating circuit as a commutation detecting circuit of an inverter main circuit, and uses a potential change of an AC terminal occurring during commutation or arcing abnormality as a differential signal. Detect the error and compare the detected signal with the commutation command signal to detect whether or not the logic of both signals is inconsistent within a certain time period, thereby detecting the abnormality of the commutation operation of the inverter with high reliability. It is what

[Action]

The inverter circuit abnormality detection device according to the present invention detects an inverter abnormality by the following two logical judgments.

(1) When the logic for detecting the potential fluctuation of the AC terminal is established in the state where there is no signal for instructing commutation in the inverter circuit.

(2) When the logic for detecting that the detection signal indicating the potential fluctuation of the AC terminal is not generated within a certain time period after the signal for instructing commutation to the inverter circuit is established.

Further, by providing the time limit of the above item (2), the unstable abnormality detecting operation caused by the delay of the main circuit switching element and the element drive circuit is eliminated, and the stable abnormality detecting operation is performed.

Furthermore, by detecting the potential fluctuation of the AC terminal due to the commutation operation of the main circuit as a differential pulse signal, the current detection circuit that electrically insulates from the main circuit can be made smaller and lighter, and can be shared by multiple AC terminals. It is possible to realize.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. First
1 is a circuit diagram showing an embodiment of the present invention. In FIG. 1, the same components as those of FIG. 7 are designated by the same reference numerals and the description thereof will be omitted. In the figure, reference numeral 20 is a three-phase transistor inverter circuit (hereinafter referred to as a three-phase inverter circuit),
21 is a capacitor having a voltage dividing point 22; 23U, 23V, 23W is a unit inverter circuit; 24U, 24V, 24W is a midpoint of the unit inverter circuits 23U, 23V, 23W, that is, AC side terminals of the three-phase inverter circuit 20. 24 is a main circuit commutation detection circuit. The main circuit commutation detection circuit 25 is composed of a differentiation circuit 26 including a series circuit of a resistor and a capacitor, and a current detection circuit 27. The current detection circuit 27 is composed of a transformer 28, a rectifier 29, and a current-voltage conversion resistor 30. Reference numeral 31 is a commutation abnormality determination logic circuit, and this commutation abnormality determination logic circuit 31 is a NOR circuit 32 and a negation circuit 33.
And D-type flip-flops 34 and 35, and AND circuits 36a and 36b
And an OR circuit 37 and an edge detection pulse generation circuit 38. This edge detection pulse generation circuit 38
Is composed of an exclusive OR circuit 51, a capacitor 52 and a resistor 53. Reference numerals 39U, 39V, 39W denote upper and lower arms 23a, 2 in the unit inverter circuits 23U, 23V, 23W, respectively.
This is an input terminal to which a signal synchronized with the on / off command signal supplied to 3b is input. The edge detection pulse generation circuit 38 is an edge detection pulse generation circuit 38 of each phase having the same configuration.
U, 38V, 38W, the unit inverter circuit 23U, 23
The edge of each signal input to V and 23W is detected as a pulse signal, and a time limit for prohibiting the determination of the commutation abnormality of the main circuit is created. Reference numeral 40 is a differentiating circuit 26
Is one terminal of the current detection circuit 27 to which is connected,
Reference numeral 41 is an input terminal of the commutation abnormality determination logic circuit 31 to which the output terminal 42 of the current detection circuit 27 is connected. Reference numeral 48 is an output terminal of the commutation abnormality determination logic circuit 31.

Next, the operation of the abnormality detecting device for the inverter circuit according to this embodiment will be described with reference to the time chart shown in FIG.

Each unit inverter circuit 23U of the three-phase inverter circuit 20,
23V and 23W are turned on to the transistor of the upper arm 23a by the logic of "1" by the inverter commutation command signals having the phase difference of 120 degrees shown in FIGS. 2 (a), (b) and (c). On the other hand, a logic "0" is applied to the transistors of the lower arm 23b from a device driving circuit (not shown) to perform commutation of the main circuit. When commutation occurs in the main circuit in this way, the potentials of the AC terminals 24U, 24V, 24W of the unit inverter circuits 23U, 23V, 23W are inverted from the positive or negative potential of the DC power supply 2 to the opposite potentials. Moreover, a current flows through the transformer 28 through the differentiating circuit 26. A differential signal as shown in FIG. 2 (h) is generated at the output terminal 42 of the current detection circuit 27, and this differential signal is input to the input terminal 41 of the commutation abnormality determination logic circuit 31. On the other hand, the inverter commutation command signals shown in FIGS. 2 (a), (b) and (c) are input terminals 39 of the edge detection circuits 38U, 38V and 38W, respectively.
It is supplied to U, 39V, 39W respectively, and the edge detection pulse corresponding to the change of the inverter commutation command signal and the time width for prohibiting the determination of commutation abnormality are obtained. Further, at the outputs of the NOR circuit 32 and the NOT circuit 33, pulse trains having waveforms as shown in FIGS. 2 (d) and 2 (e) are obtained. The waveform shown in FIG. 2 (g) is an enlarged view of the waveform shown in FIG. 2 (e) for explaining the time axis. Also, a D-type flip-flop
The output Q of 34 is synchronized with the inverter commutation command signal at the rising edge of the signal shown in FIG.
It is set to "1" like the waveforms shown by the dotted lines in FIGS. (F) and (j), but when the commutation of the three-phase inverter circuit 20 is normally performed, the D-type flip-flop is generated by the differential signal (h).
The level of the output Q of 34 is reset to "0", and the output of the AND circuit 36a to which the signals of FIGS. 2 (d) and (f) are input holds the level of "0". Also, when the operation of the three-phase inverter circuit 20 becomes abnormal and normal commutation is not executed with respect to the inverter commutation command signal, the differential signal shown in FIG. The state shown in FIG. 2 (i) is reached, and the output Q of the D-type flip-flop 34 is not reset and continues to output the level of "1" as shown by the solid line in FIG. 2 (j). Therefore, when the signal level in FIG. 2 (d) becomes "1", the output of the AND circuit 36a becomes "1" and the output 48 of the D-type flip-flop 35 becomes "1" via the OR circuit 37. The abnormality of the inverter circuit 20 is detected. Further, when commutation or arcing abnormality occurs at a time other than the normal commutation timing and the potential of any of the AC terminals 24U24V, 24W changes, the current detection circuit 27 causes the current detection circuit 27 to move as shown in FIG.
An AND circuit 36 detects a commutation pulse signal as indicated by X.
The output of b is set to “1” as shown in the waveform of FIG. 2 (1), and the output 48 of the D-type flip-flop 35 is set to “1” via the OR circuit 37.
Thus, the abnormality of the inverter circuit 20 is detected.

In the above embodiment, the transformer 28 is used as the current detection circuit 27, but the present invention is not limited to this, and is shown in FIGS. 3 and 4 without using a magnetic circuit. As described above, the current detection circuit 43 having a different configuration including the photocoupler 44 and the buffer circuit 45 may be used. With this configuration, it is possible to further reduce the size and weight as compared with the first embodiment described above.

Further, in any of the above-described embodiments, the current detection circuit is described as not performing the detection of the current direction.
Like the other embodiment shown in FIGS. 6 and 6, the detection output 47 may be configured to have the ability to discriminate the current detection direction. Reference numerals 47a and 47b are output terminals of the current detection circuit 46, and reference numeral 49 is an OR circuit that takes the logical sum of the outputs of the buffer circuits 45a and 45b.

Furthermore, in the above embodiment, the inverter circuit is 3
The phase transistor inverter circuit 20 has been described as an example, but the same effect as that of the above embodiment can be obtained even if another method is used as the inverter method.

Furthermore, in the above embodiment, the method of using the transformer and the photocoupler as the current detection circuit is shown, but the present invention is not limited to this, and any other method can be used as long as the presence or absence of the differential current can be detected. You may make it detect an electric current using it.

Further, in the above-described embodiment, the example in which one end of the current detection circuit 27 is connected to the midpoint 22 of each of the capacitors 21a and 21b forming the balanced capacitor 21 circuit has been described, but by the commutation of the three-phase inverter circuit 20, If the configuration is such that a differential current can be obtained, the same effect as that of the above-described embodiment can be obtained even if the differential current is connected to a different connection point.

〔The invention's effect〕

As described above, according to the present invention, the commutation detection circuit that detects the commutation signal of the inverter circuit is configured by the differentiation circuit and the current detection circuit, and the output of this commutation detection circuit is changed according to the operating state of the inverter. Since the inverter abnormality detection device is configured so as to provide a commutation abnormality determination logic circuit that performs a logical operation, commutation detection of a plurality of inverter arms can be performed by a common current detection circuit, and the size and weight of the device can be reduced. Can be planned.

Further, the commutation abnormality determination logic circuit can be shared by a plurality of inverter arms, and the economical efficiency and reliability can be improved by reducing the number of parts used and the number of wirings.

Further, since the abnormality can be detected by the logic contradiction within an arbitrary time period, the operation of the main circuit switching element and the element drive circuit with respect to the commutation command will not be affected by the delay, and the reliability and the detection accuracy will be improved. This has the effect of being able to detect abnormalities in high-performance inverters.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an abnormality detecting device for an inverter circuit according to an embodiment of the present invention, FIG. 2 is a time chart showing the operating states of the main parts of FIG. 1, and FIGS. 5 is a circuit diagram of a current detection circuit showing another embodiment of the present invention in the case where the above is carried out without using a magnetic circuit.
FIG. 7 is a circuit diagram of a current detection circuit showing still another embodiment of the present invention in which the detection output of the current detection circuit has a function of discriminating the current detection direction. FIG. 7 shows a conventional inverter abnormality detection device. FIG. 8 is a circuit diagram showing an example, and FIG. 8 is a time chart showing the operation of the conventional inverter abnormality detection device shown in FIG. In the figure, 20 is a three-phase transistor inverter circuit, 21
Is a capacitor, 23 is a unit inverter circuit, 23a, 23b
Is an inverter arm, 25 is a main circuit commutation detection circuit, 26 is a differentiation circuit, 27 is a current detection circuit, and 31 is a commutation abnormality detection determination logic circuit. The same reference numerals in the drawings indicate the same or corresponding parts.

Claims (1)

[Claims] 1. An inverter circuit for mutually converting the electric power of a direct current circuit and the electric power of an alternating current circuit based on a commutation command signal, and one end of a current detection circuit is connected to a voltage dividing point of the direct current circuit, and this current is connected. A main circuit commutation detection circuit in which the other end of the detection circuit is connected to an AC terminal of the inverter circuit via a differentiation circuit, a detection signal of the main circuit commutation detection circuit, and a commutation commanding commutation to the inverter circuit. An abnormality detection device for an inverter circuit, comprising a commutation abnormality determination logic circuit that compares a command signal and detects a logic contradiction of both signals within an arbitrary time.