JPH0667151A - Display device - Google Patents

Abstract

PURPOSE:To clearly preserve a display for a long time by holding surely each pixel with a holding capacity of supplied pixel data and compensating that charge stored in a pixel capacity is loosened through a leakage current with a buffer amplifier circuit. CONSTITUTION:Each pixel is provided with the holding capacity CH as a capacitance element formed on a substrate and the pixel capacity CP as a display element provided through a liquid crystal. A data signal is inputted to one side electrode of the holding capacity CH through a switch element 1, and further, the other electrode is connected to the input of the buffer amplifier circuit 2. The switch element 1 is a circuit element whose ON/OFF is controlled by a scanning signal. Further, the output of the buffer amplifier circuit 2 is connected to one side electrode of the pixel capacity CP, and further, the other electrode of the pixel capacity CP is connected to a grounded power source line 4 through the switch element 3 whose ON/OFF is controlled by a refresh signal. Then, when the voltage of the charged pixel capacity CP is started to be attenuated by the leakage current, the attenuation is compensated by the buffer amplifier circuit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active drive type display device.

[0002]

2. Description of the Related Art An active matrix driving type liquid crystal display device is provided with a large number of scanning signal lines and data signal lines,
A picture element is provided at each intersection. As shown in FIG. 10, each picture element is composed of a switch element 31 and a picture element capacitance CP. The switch element 31 is TF here.
This TFT is composed of T (thin film transistor)
The data signal line 32 and one electrode of the picture element capacitance CP are connected to each other through the drain-source terminal of the. The gate terminal of the TFT of the switch element 31 is connected to the scanning signal line 33. The pixel capacitance CP has a structure in which liquid crystal is arranged between one electrode and the other electrode, and the other electrode is connected to the common power supply line 34. Therefore, when the scanning signal line 33 is activated, the switch element 31 is turned on, and the picture element data on the data signal line 32 is sent to the picture element capacitance CP as electric charges. And even after the switch element 31 is turned off,
An electric field is applied to the liquid crystal by the charges accumulated in the picture element capacitance CP to maintain the display.

[0003]

However, in the picture element capacitance CP, as shown in FIG. 11, there is actually a leak resistance R having a relatively small resistance value, so that the accumulated charge causes this leak. The leakage current will leak through the resistor R. Therefore, as shown in FIG. 12, when the charge corresponding to the pixel data is accumulated in the pixel capacitance CP during the writing period when the switch element 31 is turned on, during the data holding period until the next writing period, Due to this leak current, the electric charge is gradually lost and the voltage of the picture element capacitance CP is attenuated.
Then, when the voltage of the picture element capacitance CP is attenuated during the data holding period as described above, there occurs a problem that the screen visually flickers to cause flicker, which deteriorates the display quality.

In order to solve the above problem, a method of providing a sample hold circuit as shown in FIG. 13 in each picture element can be considered. That is, when the switch element 31 is turned on, the picture element data is first supplied (sampling) to the holding capacitor CH, and when the switch element 31 is turned off, the electric charge due to the picture element data is held in the holding capacitor CH. (hold). Then, the transistor 35 causes the pixel capacitance CP from the power line 36 according to the voltage of the holding capacitance CH.
Supply electric charge to. Here, as the holding capacitance CH, since it is a mere capacitance element, one having a small leak current can be used. Further, the transistor 35 has a holding capacitance C.
Since the buffer amplifier circuit is configured by the voltage follower circuit of the N-channel MOS FET that receives the voltage of H as the input and the pixel capacitance CP as the load, the holding capacitance CH is not consumed without consuming the charge of the holding capacitance CH. A positive charge according to the voltage can be supplied to the pixel capacitance CP (charging is performed until the pixel capacitance CP becomes a voltage lower than the voltage of the holding capacitance CH by the threshold voltage of the transistor 35). Therefore, in the picture element shown in FIG. 13, the supplied picture element data can be reliably held in the holding capacitor CH, and the charge based on this can be continued to be supplied to the picture element capacitor CP by the switch element 31. The voltage of the picture element capacitance CP is not attenuated during the holding period and the display quality is not deteriorated.

However, in the circuit configuration as shown in FIG. 13, since the buffer amplifier circuit formed by the transistor 35 can only operate in one direction to supply the positive charge to the pixel capacitance CP, it is more difficult than the previous pixel data. When pixel data with a small amount of charge is supplied, the pixel capacitance CP continues to hold the previous charge as it is.
Further, in the liquid crystal display device, in order to prevent deterioration of the liquid crystal, AC driving is performed in which the polarities of the charges applied to the pixel capacitance CP are alternately switched.
In that case, there is also a problem that a negative charge cannot be supplied and a practical display device cannot be obtained.

In view of the above circumstances, the present invention can maintain a clear display by compensating for the leak current of the picture element capacity during the data holding period, and furthermore, when supplying new picture element data. It is an object of the present invention to provide a practical display device that can be driven by an alternating current or the like by pulling out an electric charge having an old capacity by refreshing.

[0007]

A display device of the present invention is provided with a plurality of picture elements, and display is performed by accumulating charges in picture element capacitances according to picture element data supplied to each picture element. In the display device described above, each picture element includes a holding capacitor for holding the picture element data, and a buffer amplifier circuit that supplies electric charge to the picture element capacitor according to the voltage of the holding capacitor, and The picture element capacitance is connected to a power source for precharging or discharging through a refresh circuit whose ON / OFF is controlled by a refresh signal,
Thereby, the above object is achieved.

The display device of the present invention comprises a plurality of picture elements,
In a display device in which display is performed by accumulating electric charges in a pixel capacity according to the pixel data supplied to each pixel, each pixel holds first pixel for holding the pixel data. Depending on the capacitance, the second holding capacitance receiving the charge from the first holding capacitance through the display switching circuit whose ON / OFF is controlled by the display switching signal, and the voltage of the second holding capacitance. And a buffer amplifier circuit for supplying electric charge to the pixel capacitance, and is turned on / off by a refresh signal.
The picture element capacitance is connected to a power supply for precharging or discharging through a refresh circuit controlled to be turned off, whereby the above object is achieved.

[0009]

According to the first aspect of the invention, the picture element data supplied to each picture element is temporarily held in the holding capacity. Since the storage capacitor is a simple capacitive element, it is possible to use a capacitor having an extremely small leak current, unlike the pixel capacitance for display. Then, the buffer amplifier circuit supplies the charge corresponding to the voltage of the holding capacitor holding the pixel data to the pixel capacitor. Since the buffer amplifier circuit is an amplifier circuit with a large input impedance and a small output impedance, it supplies electric charge to the pixel capacitance according to the voltage of the holding capacitance with almost no consumption of the electric charge accumulated in the holding capacitance. Can continue to do. Therefore, each picture element can surely hold the supplied picture element data in the holding capacitor, and the buffer amplifier circuit can compensate the loss of the charge accumulated in the picture element capacitor due to the leakage current.
A clear display can be maintained for a long time.

When the refresh signal is activated and the refresh circuit is turned on, the pixel capacitance is directly connected to the power supply, so that the charge accumulated in this pixel capacitance by the buffer amplifier circuit is precharged or discharged. be able to. Therefore, when new picture element data is accumulated in the storage capacitor, precharge or discharge can be performed to supply the electric charge according to the new picture element data to the picture element capacity again. Therefore, even if the buffer amplifier circuit is a one-way circuit that only supplies positive or negative charges, if the amount of charge according to new pixel data is less than the previous level or if the pixel data is positive or negative. Even when the polarities of and are alternately supplied, the electric charge according to the new picture element data is surely supplied to the picture element capacitor.

As a result, according to the first aspect of the present invention, it is possible to surely hold the picture element data whose levels and polarities are sequentially changed, and to maintain a clear display for a long time.

However, in the case of the invention of claim 1 above,
When the writing period for accumulating the picture element data supplied to the picture element in the holding capacitor is long, it becomes impossible to quickly switch the charge accumulated in the picture element capacitor.

However, in the second aspect of the invention, the picture element data supplied to each picture element is first held in the first holding capacity. When the display switching signal is activated and the display switching circuit is turned on, electric charges are supplied from the first holding capacitor holding the pixel data to the second holding capacitor,
The buffer amplifier circuit supplies electric charge to the picture element capacitance according to the voltage of the second holding capacitance. Therefore, during the writing period during which the supplied pixel data is accumulated in the first holding capacitor, the buffer amplifier circuit keeps supplying the charges to the pixel capacitor according to the voltage of the second holding capacitor. Therefore, the display based on the previous pixel data can be continued during this period.

As a result, according to the invention of claim 2, even when the writing period for accumulating the pixel data in the first holding capacity is long, the display based on the previous pixel data is performed during this writing period. Therefore, the display of the picture element capacity can be switched quickly by the display switching signal.

In the case of the second aspect of the present invention, since charge is distributed between the first holding capacitance and the second holding capacitance, the first holding capacitance in which the pixel data is accumulated. Voltage will deteriorate. However, in order to reduce the deterioration of the voltage, the capacity of the second holding capacitor may be set sufficiently smaller than the capacity of the first holding capacitor. Further, another buffer amplifier circuit is arranged between the first holding capacitor and the second holding capacitor so that the voltage of the first holding capacitor is not consumed and the voltage of the first holding capacitor is consumed. The electric charge according to the above may be supplied to the second holding capacitor.

[0016]

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIGS. 1 to 8 show an embodiment of the present invention, and FIG. 1 is a circuit block diagram showing the configuration of picture elements,
2 is a circuit block diagram showing a modified example of the picture element of FIG. 1, FIG.
2 is a circuit block diagram showing a modified example of the picture element of FIG. 2, FIG. 4 is a circuit block diagram in which a selection circuit is added to the picture element of FIG. 3, FIG. 5 is a circuit block diagram of a liquid crystal display device, and FIG. 6 is a liquid crystal display device. FIG. 7 is a time chart showing the operation of the liquid crystal display device, and FIG. 8 is a configuration diagram showing an example of use of the liquid crystal display device.

In this embodiment, an active matrix drive type liquid crystal display device used in a liquid crystal television will be described.

Each picture element of the liquid crystal display device of this embodiment is shown in FIG.
As shown in, a sample hold circuit is provided. That is, each picture element has a holding capacitance CH as a capacitance element formed on the substrate and a picture element capacitance CP as a display element provided via the liquid crystal. A data signal is input to one electrode of the storage capacitor CH via the switch element 1. Further, one electrode of the storage capacitor CH is connected to the input of the buffer amplifier circuit 2. The switch element 1 is turned on / off by a scanning signal.
It is a circuit element whose F is controlled. Buffer amplifier circuit 2
Is connected to one electrode of the picture element capacitance CP. Further, one electrode of the picture element capacitance CP is connected to the ground power supply line 4 via the switch element 3. The switch element 3 is a circuit element whose ON / OFF is controlled by a refresh signal. The other electrodes of the holding capacitor CH and the pixel capacitor CP are connected to the common power line 5.

The buffer amplifier circuit 2 is an amplifier circuit which operates with the high voltage power supply line 6 and the ground power supply line 4 as power sources and has a large input impedance and a small output impedance. Further, if the potential of the high-voltage power supply line 6 is VEE and the potential of the ground power supply line 4 is GND, the potential VCOM of the common power supply line 5 is set to a value approximately at the center between VEE and GND. . Therefore, the buffer amplifier circuit 2 supplies a current from the high-voltage power supply line 6 so that the voltage of the picture element capacitance CP becomes a value corresponding to the voltage of the holding capacitance CH to charge the picture element capacitance CP. It will be. However, when the voltage of the picture element capacitance CP is already higher than the value corresponding to the voltage of the holding capacitance CH, the buffer amplifier circuit 2 does not operate.

In each picture element having the above construction, the switch element 1 is turned on when the scanning signal becomes active, the data signal of picture element data is supplied to the holding capacitor CH (sampling), and the switch element 1 is turned off. By returning, the holding capacitor CH holds this (hold). Therefore, the switch element 1, the holding capacitor CH and the buffer amplifier circuit 2 form a sample hold circuit. Since the holding capacitance CH is formed as a capacitance element, almost no leak current occurs. At this time, the refresh signal also becomes active once,
The voltage of the picture element capacitance CP is lowered to the GND level by the ground power supply line 4. Then, when the refresh signal returns to the inactive state, the buffer amplifier circuit 2 supplies a current from the high voltage power supply line 6 to the pixel capacitance CP to charge it until the voltage becomes a voltage corresponding to the voltage of the holding capacitance CH. At this time, since the data signal always has a voltage level between the VEE level and the GND level, the voltage of the picture element capacitance CP once lowered to the GND level is surely charged to a value according to the voltage level of the data signal. To be done.

As a result, each pixel securely holds the data signal supplied through the switch element 1 in the holding capacitor CH, so that the voltage of the pixel capacitor CP charged as described above. In the case where the leak current is about to be attenuated by the leak current, the buffer amplifier circuit 2 can compensate for this, and a clear display can be maintained for a long time. When a new data signal is supplied, the voltage of the picture element capacitance CP is once discharged through the switch element 3 and drops to the GND level. Therefore, the buffer amplifier circuit 2 is supplied from the high voltage power supply line 6. It is possible to reliably charge the voltage of the picture element capacitance CP to a value according to a new data signal only by the one-way operation of supplying the current. Therefore, it is possible to perform AC driving in which VCOM of the common power supply line 5 is set to 0 potential and the polarity of the data signal is alternately switched between positive and negative.

FIG. 2 shows a case where the sample-hold circuit of the picture element shown in FIG. 1 is of a master-slave system.

Here, instead of the sample hold circuit shown in FIG. 1, a switch element 1, a first holding capacitor CH1 and a buffer amplifier circuit 2 and a switch element 7, a second holding capacitor CH2 and a buffer amplifier circuit 8 are respectively provided. Consisting of 2
It uses a pair of sample and hold circuits. That is, the data signal is supplied to the first holding capacitor CH1 via the switch element 1, and the output of the buffer amplifier circuit 2 corresponding to the voltage of the first holding capacitor CH1 is supplied to the second holding capacitor CH1 via the switch element 7. It is adapted to be supplied to the holding capacitor CH2. Then, the output of the buffer amplifier circuit 8 corresponding to the voltage of the second holding capacitance CH2 is supplied to the pixel capacitance CP. The switch element 1 is ON / OFF controlled by the first scanning signal, and the switch element 7 is ON / OFF by the second scanning signal.
OFF is controlled. Further, one electrode of the second holding capacitor CH2 is connected to the ground power supply line 4 via the switch element 9 whose ON / OFF is controlled by the refresh signal, like the pixel capacitor CP.

In the case of the picture element structure shown in FIG.
If the writing period is long while the switch element 1 is ON, it becomes impossible to quickly switch the charge to the pixel capacitance CP. However, according to the configuration of FIG. 2, the data signal supplied to each picture element is held in the first holding capacitor CH1 by first activating the first scanning signal. Then, when the second scanning signal becomes active after the first scanning signal becomes inactive, the buffer amplifier circuit 2 charges the second holding capacitor CH2 via the switch element 7, and accordingly the picture is generated. The capacitor CP is charged by the buffer amplifier circuit 8. Therefore, during the writing period when the first scanning signal is active and the switch element 1 is ON, the voltage of the picture element capacitance CP is maintained by the second holding capacitance CH2, and during this period, based on the previous data signal. The display can continue.

As a result, according to the configuration shown in FIG. 2, even when the writing time for supplying the data signal to the picture element is long, the display based on the previous data signal is maintained during this writing period. Therefore, the charge of the pixel capacitance CP can be switched in a short time at the timing of the second scanning signal.

When the refresh signal becomes active, the switch elements 3 and 9 are turned on.
And the second holding capacitance CH2 together with the charge of the pixel capacitance CP.
Is also discharged, and charging based on a new data signal becomes possible. Moreover, in the configuration shown in FIG.
Switch element 3 is turned on when refreshing the pixel capacity CP.
Then, a through current flows from the high voltage power supply line 6 to the ground power supply line 4 via the buffer amplifier circuit 2. However, if the second holding capacitor CH2 is also discharged at the same time, this unnecessary through current will flow. Can be eliminated
It becomes possible to reduce the power consumption in the picture element.

FIG. 3 shows a concrete example of the structure of the picture element shown in FIG.

Here, the sample-and-hold circuit in the preceding stage shown in FIG. 2 is further divided into two, and the data signals of positive and negative polarities are alternately distributed and supplied to them.

That is, the data signal is the transistor Tr1.
Is supplied to one electrode of the first holding capacitor CH11 and the first holding capacitor CH12 via the transistor Tr2. Further, one electrodes of the first holding capacitor CH11 and the first holding capacitor CH12 are commonly connected to one electrode of the second holding capacitor CH2 via the transistors Tr3 and Tr4, respectively. Like this first
When the holding capacitor CH11 and the first holding capacitor CH12 are directly connected to the second holding capacitor CH2 via only the transistors Tr3 and Tr4, the first holding capacitor CH11 and the first holding capacitor CH12
Will be distributed to the second holding capacitor CH2.
Therefore, in order to avoid the influence of the voltage deterioration, the timing should be considered so that the transistors Tr1 to Tr4 are not turned on at the same time, and the first holding capacitor CH11 and the first holding capacitance
It is necessary to make the capacity of the second holding capacity CH2 sufficiently smaller than the capacity of the holding capacity CH12.

One electrode of the second storage capacitor CH2 is
It is connected to the gate terminal of the transistor Tr5, and the source terminal of this transistor Tr5 is connected to one electrode of the pixel capacitance CP. The drain terminal of this transistor Tr5 is connected to the high-voltage power supply line 6, and the pixel capacitance C
Since the other electrode of P is connected to the common power supply line 5, it constitutes a buffer amplifier circuit by a voltage follower circuit.

One electrodes of the second holding capacitor CH2 and the pixel capacitor CP are connected to the ground power supply line 4 via the transistors Tr6 and Tr7, respectively. Further, in FIG. 3, the other electrodes of the first holding capacitor CH11, the first holding capacitor CH12 and the second holding capacitor CH2 are also connected to the ground power supply line 4 so that the reference voltages of these capacitors are GND. It has a level.

In the picture element having the above structure, when the negative first scanning signal is activated, the transistor Tr1 is turned on, the data signal is supplied to the first holding capacitor CH11, and when the second negative scanning signal is activated, the transistor Tr3 is activated. Is turned on, and the charge is distributed to the second holding capacitor CH2. When the positive first scan signal becomes active, the transistor Tr2 becomes ON and the data signal becomes the first holding capacitor CH12.
When the positive second scanning signal is activated next, the transistor Tr4 is turned on and the second holding capacitor CH2 is turned on.
The charge is distributed to. The refresh signal becomes active before this, and the transistors Tr6 and Tr7 are turned on to discharge the second holding capacitance CH2 and the pixel capacitance CP. Then, according to the voltage of the second holding capacitor CH2 to which the electric charge is distributed, the transistor Tr5 is driven from the high voltage power line 6 to the pixel capacitor CP.
Supply current to the battery to charge it. The voltage of the pixel capacitance CP is lower than that of the second holding capacitance CH2 by the transistor Tr.
The pixel capacitor CP can be maintained at a voltage by being charged to a voltage lower by the threshold voltage of 5 and compensating for the charge that is reduced by the leak current thereafter.

As shown in FIG. 9, a conventional active matrix drive type liquid crystal display device has a sample hold circuit 13 on the side of a data signal line 12 for supplying a data signal to a liquid crystal panel 11 which constitutes a large number of picture elements. Was provided. Then, the serially input data signals are sequentially transferred to the sample and hold circuits 1 by the shift register 14.
When held at 3, the shift register 15 activates one scanning signal 16 and the scanning signal line 16
Data signals were supplied to all the picture elements 11a at the same time. However, as shown in FIG. 4, the transistor T whose ON / OFF is controlled by the selection signal is
If a data signal is supplied to the picture element of this embodiment via r8, the liquid crystal display device can be constructed as shown in FIG. That is, each picture element 11 as in the present embodiment.
If a sample hold circuit is provided in a, the output of the shift register 14 can be used as a selection signal and the data signal can be directly sent to each picture element 11a through the data signal line 12.

Therefore, in FIG. 6, for the liquid crystal panel 11 occupying the display portion, the scanning signal line driver 18 and the data signal line driver 19 other than the display portion are respectively provided in FIG.
Since only the shift registers 14 and 15 and the timing generating circuit 17 can be used, the liquid crystal display device can be downsized. In this case, the transistor Tr1 of each picture element shown in FIG.
~ Tr8 can be formed on the silicon semiconductor substrate arranged under the liquid crystal panel 11. Then, all of these transistors Tr1 to Tr8 are set to N as shown in FIG.
If only the channel MOS.FET is used, it is not necessary to form a P-channel wafer on the silicon semiconductor substrate, so that the circuit pattern area can be reduced.

FIG. 7 shows a timing chart of each signal when driving the liquid crystal display device of FIG. The refresh signal becomes active for each field, and the picture element capacitances CP of all picture elements are discharged all at once. In the negative field, a negative data signal on the GND side of VCOM is supplied, and the negative first scanning signal and the negative second scanning signal in FIG. 4 are sequentially activated for each pixel. In the positive field, a positive data signal on the VEE side of VCOM is supplied, and the positive first scanning signal and the positive second scanning signal are sequentially activated for each pixel.

In the liquid crystal display device shown in FIG. 5, when the address selection circuit in the normal memory circuit is used as the peripheral circuit of the liquid crystal panel 11, each picture element 11a is formed.
You will also be able to do random access to.

Further, as shown in FIG. 8, the liquid crystal display device 21 of this embodiment can be used in combination with the high speed color variable filter 22. That is, the high-speed color variable filter 22
When each of the three primary colors transmits light of wavelengths, each pixel of the liquid crystal display device 21 is refreshed and timing is controlled so that display is performed by a new data signal.
Since the image of each color can be displayed with the same picture element, the liquid crystal display device 21 having the same number of picture elements as in the related art can obtain three times the resolution.

[0039]

As is apparent from the above description, according to the display device of the present invention, it is possible to use the holding capacitor and the buffer amplifier circuit to compensate for the leak current of the picture element capacitor and maintain a clear display for a long time. Circuit can be provided.

[Brief description of drawings]

FIG. 1 is a circuit block diagram showing a configuration of a picture element according to an embodiment of the present invention.

2 is a circuit block diagram showing a modified example of the picture element of FIG. 1, showing an embodiment of the present invention. FIG.

FIG. 3 is a circuit block diagram showing a modified example of the picture element of FIG. 2, showing an embodiment of the present invention.

FIG. 4 shows an embodiment of the present invention and is a circuit block diagram in which a selection circuit is added to the picture element of FIG.

FIG. 5 is a circuit block diagram of a liquid crystal display device, showing an embodiment of the present invention.

FIG. 6 is a block diagram showing an outline of a liquid crystal display device according to an embodiment of the present invention.

FIG. 7 is a time chart showing the operation of the liquid crystal display device according to the embodiment of the present invention.

FIG. 8 is a constitutional view showing one embodiment of the present invention and showing an example of use of the liquid crystal display device.

FIG. 9 is a circuit block diagram of a liquid crystal display device, showing a conventional example.

FIG. 10 is a circuit diagram of a picture element, showing a conventional example.

FIG. 11 shows a conventional example and is an equivalent circuit diagram of a pixel capacitance.

FIG. 12 shows a conventional example and is a time chart showing a voltage of a pixel capacitance.

FIG. 13 is a circuit diagram of a pixel provided with a sample hold circuit.

[Explanation of symbols]

 2 buffer amplifier circuit 3 switch element 4 ground power line CH holding capacity CP picture element capacity

Claims (2)

[Claims] 1. A display device comprising a plurality of picture elements, wherein display is performed by accumulating charges in a picture element capacity according to picture element data supplied to each picture element, wherein each picture element is Refresh having a holding capacitor for holding the pixel data and a buffer amplifier circuit for supplying electric charge to the pixel capacitor according to the voltage of the holding capacitor, and having ON / OFF controlled by a refresh signal A display device in which the pixel capacitance is connected to a power supply for precharging or discharging through a circuit. 2. A display device comprising a plurality of picture elements, wherein display is performed by accumulating charges in picture element capacitance according to picture element data supplied to each picture element, A first holding capacitor for holding picture element data, and a second holding capacitor receiving electric charge from the first holding capacitor via a display switching circuit whose ON / OFF is controlled by a display switching signal. And a buffer amplifier circuit that supplies electric charge to the pixel capacitance according to the voltage of the second holding capacitance, and is turned on / off by a refresh signal.
A display device in which a pixel capacitance is connected to a power supply for precharging or discharging through a refresh circuit whose F is controlled.