JPH0643842A - Device for preventing furtive grance of computer - Google Patents

Abstract

(57) [Abstract] [Purpose] A video sniffing prevention device for a device which intercepts a video signal radiated from a computer body to a CRT display and snoops an image displayed on the CRT display. The purpose is to prevent snooping by making it difficult to reproduce the image even if it is intercepted. [Structure] A vertical sync signal with random jitter, a horizontal sync signal with random jitter, and a video circuit for generating a video signal in sync with each sync signal and sending the video signal to a CRT display are provided. , A monostable multivibrator type vertical deflection circuit that generates a vertical deflection sawtooth wave in synchronization with the input timing of the vertical synchronization signal, and a monostable multivibrator that generates a vertical deflection sawtooth wave in synchronization with the input timing of the horizontal synchronization signal Horizontal deflection circuit of the formula.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device which intercepts a video signal emitted from a computer body to a CRT display and steals an image displayed on the CRT display from the video signal to the image. The invention relates to an anti-theft device for a computer, which makes it difficult to reproduce and prevents theft.

[0002]

2. Description of the Related Art FIG. 9 is a block diagram showing a conventional computer system. In the figure, a computer 80
Converts the image information generated by the CPU 81 into a video signal by the video circuit 82 and sends it to the CRT display 90. The CPU 81 and the video circuit 82 operate in synchronization with the clock supplied from the clock generator 83, and send the vertical synchronizing signal V _sync and the horizontal synchronizing signal H _sync together with the video signal to the CRT display 90.

On the other hand, in the CRT display 90, the vertical deflection circuit 91 and the horizontal deflection circuit 92 generate a sawtooth wave in synchronization with the vertical synchronization signal V _sync and the horizontal synchronization signal H _sync , respectively, and supply the sawtooth wave to the deflection coil 94 of the picture tube 93. Then, the electron beam is scanned. In addition, the video signal is an amplifier 9
After being amplified in 5, it is supplied to the picture tube 93 and the intensity of the electron beam is changed to reproduce a visible image on the image receiving screen.

[0004]

By the way, since the video signal has a high frequency component, the computer 80 in particular has a high frequency component.
Between the video circuit 82 and the amplifier 95 of the CRT display 90 is easily radiated as a radio wave into the space. Therefore, it is possible to reproduce an image by a third party intercepting the radio wave and separately generating each synchronization signal to control the picture tube. This video signal is at a level where even if it is a weak radio wave that satisfies the international radio wave interference standard due to various shields, it can be snooped by the high performance of the receiver.

It is an object of the present invention to provide a computer anti-theft device which makes it difficult to reproduce an image even if a video signal is intercepted and prevents theft.

[0006]

FIG. 1 is a block diagram showing the principle configuration of the present invention. The invention according to claim 1 is
In FIG. 1 (1), a video circuit 11a for generating a vertical synchronizing signal to which random jitter is added, a horizontal synchronizing signal, and a video signal synchronized with each synchronizing signal and sending them to a CRT display 12a is provided. 1 is provided with a monostable multivibrator type vertical deflection circuit 13 that generates a vertical deflection sawtooth wave in synchronization with the input timing of the vertical synchronization signal.

According to a second aspect of the present invention, in FIG. 1 (2), a vertical synchronizing signal, a horizontal synchronizing signal added with random jitter, and a video signal synchronized with each synchronizing signal are generated to generate a CRT display 12b. Circuit 11b for sending to
In addition, the CRT display 12b is provided with a monostable multivibrator type horizontal deflection circuit 15 which generates a sawtooth wave for horizontal deflection in synchronization with the input timing of the horizontal synchronizing signal.

According to a third aspect of the present invention, in FIG. 1 (3), a vertical synchronizing signal added with random jitter, a horizontal synchronizing signal added with random jitter, and a video signal synchronized with each synchronizing signal are generated. The CRT display 1 is provided with a video circuit 11c for sending to the CRT display 12c.
2c, a monostable multivibrator type vertical deflection circuit 13 that generates a vertical deflection sawtooth wave in synchronization with the input timing of the vertical synchronization signal, and a horizontal deflection sawtooth wave that is synchronized with the input timing of the horizontal synchronization signal. A monostable multivibrator type horizontal deflection circuit 15 is provided.

[0009]

According to the present invention, random jitter is added to at least one of the vertical synchronizing signal and the horizontal synchronizing signal transmitted from the video circuit 11 to the CRT display 12. The video signal at this time is a signal synchronized with each synchronization signal. Therefore, even if this video signal is intercepted and displayed on the CRT display by using the vertical synchronizing signal and the horizontal synchronizing signal that are separately created, since the random jitter for each raster or each screen is added to the video signal,
It becomes impossible to reproduce a normal image.

As for the vertical deflection circuit and the horizontal deflection circuit of the CRT display 12 for reproducing the same, instead of the conventional one, a monostable multivibrator which generates a vertical deflection sawtooth wave synchronized with the input timing of the vertical synchronization signal is used. The normal vertical deflection circuit 13 or the monostable multivibrator type horizontal deflection circuit 15 that generates a sawtooth wave of horizontal deflection in synchronization with the input timing of the horizontal synchronizing signal can reproduce a normal image.

[0011]

FIG. 2 is a block diagram showing the construction of an embodiment of the main part of a video circuit used in a computer anti-theft device according to the present invention.

In the figure, a video information memory 20 stores video information given from a CPU (not shown), and reads corresponding video information by using output values of the vertical counter 21 and the horizontal counter 22 as addresses. The parallel / serial converter (P / S) 23 converts the video information read from the video information memory 20 into a serial data video signal and outputs it. Further, the vertical counter 21, the horizontal counter 22, and the parallel / serial converter 23 are
It operates in synchronization with the clock supplied from the clock generator 24.

Here, the feature of the present invention is that a random number generator 27 composed of a counter 25 and a random number ROM 26, and a vertical counter 21 or a horizontal counter 22 depending on the random number output from the random number generator 27. And a register 28, 29 for giving random data to the vertical synchronizing signal or the horizontal synchronizing signal.

For example, when random jitter is given only to the vertical synchronizing signal, the vertical counter 21 has a register 2
Random data is given from 8 and 0 is given from the register 29 to the horizontal counter 22. Further, when random jitter is given only to the horizontal synchronizing signal, random data is given from the register 29 to the horizontal counter 22 and 0 is given from the register 28 to the vertical counter 21. By giving such random data to each counter and randomly shifting the read start address of the video information, random jitter can be given to the vertical synchronizing signal or the horizontal synchronizing signal.

Since the random jitter added to each sync signal causes an overlap of images for each raster or each screen, a normal image is displayed even if only a video signal is intercepted unless there is a sync signal having random jitter. I can't let you do it. That is, it is possible to prevent snooping.

An embodiment of the deflection circuit corresponding to the vertical synchronizing signal or the horizontal synchronizing signal to which random jitter is added will be described below. First, an example in which a vertical deflection circuit and a horizontal deflection circuit that generate a sawtooth wave synchronized with each input timing of a vertical synchronization signal and a horizontal synchronization signal are configured by one microprocessor and a digital-analog converter (D / A). 3 shows.

In FIG. 3, the horizontal synchronizing signal H _sync is input to the input port A and the vertical synchronizing signal V _sync is input to the input port B.
The microprocessor 31 for inputting the data outputs horizontal deflection sawtooth wave data and vertical deflection sawtooth wave data according to the algorithm shown in FIG. The digital-to-analog converters 32 and 33 convert each data into analog signals and supply them to the horizontal deflection coil 36 and the vertical deflection coil 37 via the amplifiers 34 and 35, so that the vertical synchronization signal V _sync and the horizontal synchronization signal V _sync. A sawtooth wave synchronized with H _sync can be generated.

In FIG. 4, first, the sawtooth wave data N for horizontal deflection is output from the output port in synchronization with the input of the vertical synchronizing signal V _sync and further in synchronization with the input of the horizontal synchronizing signal H _sync .
The vertical deflection sawtooth wave data M is output. Here, the sawtooth wave data N for horizontal deflection is counted up from 0 to n at a cycle t = 1 / (horizontal frequency · n) seconds and output. In this embodiment, the data for the sawtooth wave of horizontal deflection is
11 bits are used, and n = 2 ¹¹ = 2048.

Next, the sawtooth wave data M for vertical deflection is set to 1
Count up and set the horizontal deflection sawtooth wave data N to 0.
After resetting, the process of counting up the sawtooth wave data N for horizontal deflection in synchronization with the input of the horizontal synchronizing signal H _sync is repeated until M exceeds m. When M exceeds m,
Reset M and N to 0 and return to the initial state. In addition,
In this embodiment, 10 bits are used for the vertical deflection sawtooth wave data, and m = 2 ¹⁰ = 1024.

A time chart showing the above operation is shown in FIG. In the figure, ΔT is random jitter added to the vertical synchronizing signal V _sync , and Δt is the horizontal synchronizing signal H.
Random jitter added to _sync . , Is
It is a vertical deflection sawtooth wave and a horizontal deflection sawtooth wave in a conventional circuit, and does not follow random jitter.
, Are sawtooth waves of vertical deflection and sawtooth waves of horizontal deflection according to the circuit of the present invention, and a phase shift occurs according to each random jitter.

By performing such processing in the microprocessor 31, a monostable multivibrator type vertical deflection circuit for generating a vertical deflection sawtooth wave synchronized with the input timing of the vertical synchronization signal and the horizontal synchronization signal input timing are provided. It is possible to realize a monostable multivibrator type horizontal deflection circuit which generates a sawtooth wave of horizontal deflection in synchronization. That is, even if random jitter is added to each of the vertical synchronization signal and the horizontal synchronization signal, the image data is processed in synchronization with each input timing, so that normal image display can be performed.

Next, a vertical deflection circuit and a horizontal deflection circuit for generating a sawtooth wave synchronized with each input timing of the vertical synchronization signal and the horizontal synchronization signal are independently provided with a microprocessor and a digital / analog converter (D / A).
FIG. 6 shows an example of the above configuration.

In FIG. 6, the microprocessor 61 for inputting the horizontal synchronizing signal H _sync to the input port is shown in FIG.
Data for a sawtooth wave of horizontal deflection is output according to the algorithm shown in. That is, the microprocessor 61 outputs the horizontal deflection sawtooth wave data N that is counted up from 0 to n at the cycle t in synchronization with the input of the horizontal synchronization signal H _sync . The microprocessor 62 which inputs the vertical synchronizing signal V _sync to the input port outputs the vertical deflection sawtooth wave data according to the algorithm shown in FIG. 7 (2). That is, the microprocessor 62 outputs the vertical deflection sawtooth wave data M that is counted up from 0 to m in the cycle T = 1 / (vertical frequency · m) seconds in synchronization with the input of the vertical synchronization signal V _sync .

Similarly, the digital / analog converters 32 and 33 convert the respective data into analog signals and supply them to the horizontal deflection coil 36 and the vertical deflection coil 37 via the amplifiers 34 and 35, respectively, so that It is possible to generate a sawtooth wave in synchronization with the synchronization signal H _sync and the vertical synchronization signal V _sync .

A time chart showing the above operation is shown in FIG. In the figure, ΔT is random jitter added to the vertical synchronizing signal V _sync , and Δt is the horizontal synchronizing signal H.
Random jitter added to _sync . , Is
It is a vertical deflection sawtooth wave and a horizontal deflection sawtooth wave in a conventional circuit, and does not follow random jitter.
, Are sawtooth waves of vertical deflection and sawtooth waves of horizontal deflection according to the circuit of the present invention, and a phase shift occurs according to each random jitter. In addition, shown in FIG. 5 and FIG.
, Have the same waveform.

By the way, in the configuration of the embodiment shown in FIG. 6, when the random jitter is added to either the horizontal synchronizing signal or the vertical synchronizing signal, the deflection circuit for processing the synchronizing signal having no random jitter is the conventional one. An externally synchronized sawtooth wave oscillator of the circuit can be used. In that case, the vertical deflection sawtooth wave and the horizontal deflection sawtooth wave in the time chart shown in FIG. 8 are combined with and.

[0027]

As described above, according to the present invention, it is possible to easily prevent snooping of a video signal by adopting a configuration in which random jitter is added to at least one of the horizontal synchronizing signal and the vertical synchronizing signal. Further, in a CRT display which reproduces the image, an image can be reproduced without being affected by random jitter by including a monostable multivibrator type complete synchronous deflection circuit instead of the conventional one.

[Brief description of drawings]

FIG. 1 is a block diagram showing the principle configuration of the present invention.

FIG. 2 is a block diagram showing an embodiment configuration of a main part of a video circuit used in the device of the present invention.

FIG. 3 is a block diagram showing an embodiment configuration of a deflection circuit of a CRT display used in the device of the present invention.

FIG. 4 is a flowchart showing an operation algorithm of the microprocessor 31 shown in FIG.

5 is a time chart showing an operation example of the deflection circuit of the embodiment shown in FIG.

FIG. 6 is a block diagram showing the configuration of another embodiment of the deflection circuit of the CRT display used in the device of the present invention.

7 is a flowchart showing an operation algorithm of the microprocessors 61 and 62 shown in FIG.

8 is a time chart showing an operation example of the deflection circuit of the embodiment shown in FIG.

FIG. 9 is a block diagram showing the configuration of a conventional computer system.

[Explanation of symbols]

 11 video circuit 12 CRT display 13 vertical deflection circuit (monostable multivibrator type) 14 vertical deflection circuit 15 horizontal deflection circuit (monostable multivibrator type) 16 horizontal deflection circuit 20 video information memory 21 vertical counter 22 horizontal counter 23 parallel serial Converter (P / S) 24 Clock generator 25 Counter 26 Random number ROM 27 Random number generator 28,29 Register 31 Microprocessor 32,33 Digital-analog converter (D / A) 34,35 Amplifier 36 Horizontal deflection coil 37 Vertical Deflection coil 61,62 Microprocessor 80 Computer 81 CPU 82 Video circuit 83 Clock generator 90 CRT display 91 Vertical deflection circuit 92 Horizontal deflection circuit 93 Picture tube 94 Deflection coil 95 Amplifier

Claims (3)

[Claims] 1. A CRT display (12a) comprising a video circuit (11a) for generating a vertical synchronizing signal to which random jitter is added, a horizontal synchronizing signal, and a video signal synchronized with each synchronizing signal and sending the video signal to a CRT display. ) Is a monostable multivibrator type vertical deflection circuit (1 that generates a vertical deflection sawtooth wave in synchronization with the input timing of the vertical synchronization signal.
A computer anti-theft device which is provided with 3). 2. A CRT display (12b) comprising a video circuit (11b) for generating a vertical sync signal, a horizontal sync signal to which random jitter is added, and a video signal in sync with each sync signal and sending the video signal to a CRT display. ) Is a monostable multivibrator type horizontal deflection circuit (1 which generates a sawtooth wave for horizontal deflection in synchronization with the input timing of the horizontal synchronization signal.
5) A computer anti-theft device, characterized by comprising: 3. A video circuit (11c) for generating a vertical synchronizing signal added with random jitter, a horizontal synchronizing signal added with random jitter, and a video signal synchronized with each synchronizing signal and sending the video signal to a CRT display. The CRT display (12c) has a monostable multivibrator type vertical deflection circuit (1) that generates a vertical deflection sawtooth wave in synchronization with the input timing of the vertical synchronization signal.
3) and a monostable multivibrator type horizontal deflection circuit (15) for generating a sawtooth wave of horizontal deflection in synchronization with the input timing of the horizontal synchronizing signal, and a device for preventing snooping of a computer.