JPH0642265B2 - Module for subroutine of data flow type machine - Google Patents

Description

The present invention relates to a module for a subroutine of an electronic computer (machine) having a data flow type architecture.

[Conventional technology]

Conventionally, a module of a data flow type machine has a FIFO type memory in which the arrangement of data is not exchanged, and an extended identifier called a colored token is used to perform a subroutine operation.

FIG. 6 is a flowchart showing an operation example of a subroutine using this extended identifier. In this case, in addition to the data value, the identifier, and the destination required for the normal data flow type, the extended identifier is also placed on the data bus for transmission. In the figure, an extended identifier is set in step 61, a calculation operation of a subroutine is performed in step 62, the extended identifier is determined in step 63, and various calculations (step 64) are performed. Subroutine calculations are similarly performed in steps 65, 66 and 67.

[Problems that the company is trying to solve] The module of the conventional data flow type machine described above is
Since only the FIFO type operation is performed, it is difficult to perform a recursive operation that becomes a nested expression. If the extended identifier is used so that the subroutine can be used, there is a drawback that the amount of data bus increases.

An object of the present invention is to solve such problems and provide a subroutine module of a data flow type machine which can easily change the input / output operation of the subroutine operation, can perform the recursive operation, and can reduce the hardware. is there.

[Means for solving problems]

The module for subroutine of the data flow type machine of the present invention switches the input operation and the output operation according to the inputted variation identifier, and also has a parameter memory for outputting the parameter value and the internal identifier with the variation identifier as an address, and the parameter value. And a processing unit that processes and outputs the input numerical data, a stack memory that temporarily holds the internal identifier, a pointer memory that stores the address of the stack memory, and the internal identifier that is input as an address, respectively It is configured to include an identifier memory and a destination memory which respectively output a variator and destination data.

〔Example〕

 Next, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a partial block diagram of a data flow type machine using an embodiment of the present invention. The data flow type machine is
The module 10 is connected to the data bus 30 via the bus module connector 20. This data bus 30
Sends the variable identifier, destination data and numerical data. The module 10 is switched to the input side or the output side by the identifier.

The bus module connector 20 includes a gate 11 and a comparator 1.
2, selectors 13 to 15 are included.

Destination data from the data bus 30 is input to the comparator 12, and it is determined by the module address whether the data is input to the module. The gate 11 is controlled according to the result of this determination, and the variable identifier and the numerical data are supplied to the module 10.

The module 10 includes a processing unit 1, a parameter memory 2, an identifier memory 3, and a destination memory 4. Data is programmed in advance in the memory in this module.

The variable identifier operates as an address for the parameter memory 2, and outputs the parameter value 7 and the internal identifier 8. The internal identifier 8 causes the identifier memory 3 and the destination memory 4 to output new processed variable identifiers and destination data, respectively, and connects them to the data bus 30 via the selectors 14 and 13. The processing unit 1 processes and outputs the numerical data based on the parameter value 7, and connects it to the data bus 30 via the selector 15. In this way, the output data from the module 10 is returned to the data bus 30 through the selectors 13 to 15.

2 and 3 are block diagrams of relevant portions at the time of inputting and outputting the subroutine of this embodiment. In this embodiment, for example, the most significant bit of the variable identifier is "1",
The input side or the output side is switched by "0".

On the input side as shown in FIG. 2, the variable identifier is input to the parameter memory 2 as an address, and the parameter 7 and the internal identifier 8 are output. When the most significant bit of parameter 7 is "1", module 10 is switched for subroutine input. The internal identifier 8 is the identifier memory 3,
It operates as an address to the destination memory 4 and outputs a new variable identifier and destination data. Further, the value of the internal identifier 8 is held in the stack memory 6.

The new variable identifier operates as an address in the pointer memory 5 and causes the stack pointer 9 to be output. The stack pointer 9 is used as an address when the internal identifier 8 is input to the stack memory 6. The value of the stack pointer 9 in the stack memory 6 is incremented to "+1" after the pointer is output and prepared for the next input.

Next, on the output side as shown in FIG. 3, the variable identifier is input to the parameter memory 2 as an address, and the parameter 7 and the internal identifier 8 are output. When the most significant bit of parameter 7 is "0", module 10 is switched for subroutine output. The internal identifier 8 operates as an address in the pointer memory 5 and outputs the stack pointer 9. The stack pointer 9 operates as an address in the stack memory 6 and outputs the data of the internal identifier 8 which is input when the subroutine is input. The value of the stack pointer 9 is decremented to "-1" after the pointer output and prepared for the next input. The output of the stack memory 6 operates as an address for the identifier memory 3 and the destination memory 4 and outputs a new variable identifier and destination data.

FIG. 4 is a flow chart of a subroutine operation example using this embodiment. First, in step 41, for example, the variable identifier “001” is used as the internal identifier “001”, the destination data “subroutine module”, and the stack pointer “001 →
The input operation is performed as “002”, and the variation identifier “00
2 ", the destination data becomes an" addition module ", and a subroutine calculation such as addition is performed in step 42. When this subroutine calculation is completed, in step 43, the variable identifier is “003”, the internal identifier is “002”, the destination data is “subroutine module”, and the stack pointer is “00”.
The output operation is performed as “2 → 001”, and the variation identifier “0
04 "and destination data" multiplication module ", and the next calculation is performed in step 44. Then, step 45
At step 46, the input operation of the subroutine module is performed. At step 46, the subroutine operation is performed. At step 47, the output operation is performed, and the operation proceeds to the next operation.

FIG. 5 is a flow chart of an example of the recursive operation performed by using the subroutine module of this embodiment. Similar to the case of FIG. 4, first, in step 51, the input operation of the subroutine module is performed to select the recursive routine A, and in step 50, the recursive operation of the recursive routine (A) is started. When this recursive operation is completed, the output operation is performed in step 52 and the next operation is performed. In the recursive routine A, a determination process is first performed in step 53 to determine whether or not the input data value is 1, and if the data value is "1", the recursive operation ends. If this data value is not "1", in the addition processing of step 54, the data value is set to "-1",
The subroutine input operation in step 55 is performed, and step 5
At 6, the recursive routine A for the data value (n-1) is performed. When this recursive routine A ends, step 57
Then, the subroutine output operation is performed, and the identifier held on the output side is used to perform multiplication of "× 2" in step 58 and addition processing of "+" in step 59 to exit the recursive routine.

[Effects of the Invention] As described above, the present invention can be used to perform a subroutine operation or a recursive operation in a data flow type machine by storing a data identifier in a stack type memory. Besides, it has an advantage that the hardware quantity of the bus can be reduced because the extended identifier is unnecessary.

[Brief description of drawings]

FIG. 1 is a block diagram of a data flow type machine including an embodiment of the present invention, and FIGS. 2 and 3 are block diagrams of relevant portions when the present embodiment is an input side and an output side. FIG. 6 is a flow chart for explaining the operation of this embodiment, FIG. 5 is a flow chart of the recursive operation of this embodiment, and FIG. 6 is a flow chart of an example of a conventional data flow type machine. 1 ... Machining section, 2 ... Parameter memory, 3 ... Identifier memory, 4 ... Destination memory, 5 ... Pointer memory, 6
... stack memory, 7 ... parameter, 8 ... internal identifier, 9 ... stack pointer, 10 ... subroutine module, 11 ... gate, 12 ... comparator, 13
~ 15 ... selector, 20 ... bus module connector, 30 ... data bus, 41-47, 50-59, 6
1 to 67 ... Operation step.

Claims (1)

[Claims] 1. A parameter memory for switching between input operation and output operation according to an input variable identifier and outputting a parameter value and an internal identifier using the variable identifier as an address, and processing input numerical data based on the parameter value. Output unit, a stack memory that temporarily holds the internal identifier, a pointer memory that stores the address of the stack memory, and the internal identifier that is input as an address, and the next fluctuation variator and destination data are output. A module for a subroutine of a data flow type machine including an identifier memory and a destination memory.