JPH0638363A - Output driver circuit - Google Patents

Abstract

PURPOSE:To obtain an output driver circuit free from lowered overcurrent detecting accuracy even when drop voltage is suppressed to a low level while an overcurrent can be suppressed at the time of short-circuiting a power supply. CONSTITUTION:A constant current circuit, formed of transistors MP1, MN3 connected in series between a power supply and the earth, is provided, and voltage across source-gate of a driver transistor MN2 is fixed to the voltage lower than power source potential VDD at the time of detecting an overcurrent, to suppress the current at saturation time to a low level.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an output driver circuit, and more particularly to an output driver circuit for driving a bus line such as a LAN (Local Area Network) transmission line.

[0002]

2. Description of the Related Art FIG. 7 is a block diagram of a conventional output driver circuit with an overcurrent protection function, which is composed of a single drive transistor. In the figure, 1 is a load circuit L.
This is a driver unit for driving the bus line L1 (2) such as an AN transmission line. Reference numeral 3 is a switching unit for controlling the on / off operation of the driver unit 1, and 4 is an overcurrent for controlling the switching unit 3 to protect the driver unit 1 when an excessive current flows in the driver unit 1. It is a protection unit.

More specifically, the driver unit 1 is composed of an NMOS transistor MN5 (drive transistor) whose source is connected to the power supply voltage VDD through a terminating resistor R4, and is provided between the terminating resistor R4 and the NMOS transistor MN5. A bus line L1 (2) which is a load is connected to the output terminal T1 of the.

The switching unit 3 has one input connected to an input terminal T1 and the output of which is the NMOS.
It is constituted by a NOR gate G4 connected to the gate of the transistor MN5.

Further, the overcurrent protection unit 4 is provided with the NMO.
A resistor R2 connected to the drain of the S-transistor MN5 for converting the drain current into a voltage, and a comparator CP1 for comparing the converted drain voltage with the reference voltage input to the reference voltage input terminal T2. The output of CP1 is input to the other terminal of the NOR gate G4 of the switching section 3.

Next, the operation will be described. Input terminal T1
When "H" is input to, since the output of the NOR gate G4 is "L", the transistor MN5 is off,
Since no current flows through the output terminal T3, the bus line L1
Goes to "H" level by the terminating resistor R4. Hereinafter, such a state where the drive transistor is non-conductive is referred to as the driver circuit is off.

On the other hand, when the input terminal T1 becomes "L", the transistor MN5 is turned on (driver circuit is turned on), current flows through the output terminal T3, and a predetermined voltage drop is generated by the resistor R2. At this time, since the output voltage of the transistor MN5 input to the comparison input terminal of the comparator CP1 is set to be lower than the voltage applied to the reference voltage input terminal T2, the "L" level from the comparator CP1 changes. Therefore, "L" is input to both NOR gate G4, and its output is "H".
Then, the transistor MN5 is maintained in the ON state. As a result, the current supplied to the bus line L1 flows to the driver circuit side, and the bus line L1 receives the voltage drop by the driver circuit and becomes "L" level.

At this time, normally, the current due to the termination resistor R4 of the bus line L1 flows through the transistor MN5 and the resistor R
The voltage drop due to 2 does not exceed the reference voltage of the comparator CP2, but for some reason the output terminal T
When 3 or the bus line L1 is short-circuited with the power supply voltage VDD, a larger current than usual flows through the transistor MN5, and the voltage detected by the resistor R2 is the comparator CP2.
Exceeds the reference voltage of and the output of comparator CP2 is "H".
Since it is inverted to and "H" is input to the NOR gate G4,
The output of the NOR gate G4 becomes "L", turning off the transistor MN5. In this way, the transistor MN
Protects the output driver circuit from damage due to excessive current flowing through it.

[0009]

The conventional output driver circuit is constructed as described above, and the overcurrent is detected by the magnitude of the voltage drop of the resistor. Therefore, when the driver circuit is integrated, the power source is When a short circuit occurs, a large current as shown by the dotted line in Fig. 3 flows through the aluminum wiring from the power supply voltage VDD to the drive transistor, so the aluminum wiring is broken and becomes inoperable, and the reliability due to electromigration is high. However, there is a problem in that

Further, when driving a bus line in which the change in potential level during driving is small, it is necessary to reduce the voltage drop by the driver circuit. Therefore, the resistance used for detecting the overcurrent is reduced. Although it is necessary to make the value as small as a few Ω or less, it is difficult to manufacture such a resistor with high accuracy, and therefore there is the problem that the accuracy of overcurrent detection decreases due to variations in the resistance value. It was

The present invention has been made in view of the above problems, and provides an output driver circuit capable of suppressing an overcurrent when a power source is short-circuited and easily detecting the overcurrent with high accuracy. The purpose is to

[0012]

An output driver circuit with an overcurrent protection function according to the present invention detects an output voltage of a drive transistor, and when a current exceeding a reference value flows in the drive transistor, the drive transistor is driven. First control means for fixing the source-gate voltage of the transistor to regulate the current flowing through the drive transistor, and second control means for turning off the drive transistor in response to a change in the output voltage of the drive transistor. It is provided with an overcurrent protection unit including control means.

[0013]

According to the present invention, when the output voltage of the drive transistor is higher than a certain value, the gate voltage of the drive transistor is fixed to a constant value by the first control means, and the current corresponding to the saturation current is suppressed to a low level. It is possible to reduce the current flowing through the drive transistor when an overcurrent occurs such as when the power supply is short-circuited.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. Example 1. 1 is a block diagram of an output driver circuit according to a first embodiment of the present invention, in which the same reference numerals as those in FIG. 7 indicate the same or corresponding portions, and G1 is a switching unit 3
It is a NAND gate forming 0. MN4 is an NMO connected between the drain of transistor MN2 and ground.
It is an S transistor, and the output of the NAND gate G1 is inputted to its gate through an inverter G2. These transistors, MN4 and MN2.
, The terminating resistor R4, the power supply voltage VDD, and the inverter G2 constitute a driver section 10. Also, MP1, M
N3 is a PMOS and NM connected in series between the power supply and ground
This is an OS transistor, and the output of the NAND gate G1 is input to the gate of the PMOS transistor MP1. A node N2, which is a common connection point of these transistors connected in series, is connected to the comparison voltage input terminal of the comparator CP1 and the gate of the transistor MN2 of the driver section 10. The gate of the transistor MN3 is connected to the common connection point of the transistors MN2 and MN4 of the driver section 10. In this way, the overcurrent protection circuit section 40 including the transistor MP1, the transistor MN3, and the comparator CP1 is configured.

Next, the function of each of the above components will be described. In FIG. 1, when the input terminal T1 is "H", the output driver circuit is turned on. That is, in the normal state, the comparator CP1 outputs "H" level, so the NAND gate G1 outputs "L", and the transistors MP1 and MN4 are turned on. As a result, the gate capacitance of the transistor MN2 is charged via the transistor MP1 and the transistor MN2 is turned on. At this time, when the output voltage V0 of the output terminal T3 is low, the voltage V2 of the node N2 is almost equal to the power supply voltage VDD because the transistor MN3 is in the off state, and the gate voltage of the transistor MN3 is almost equal to the output voltage V0. Become.

When the output voltage V0 exceeds a certain value V0 ', the transistor MN3 turns on and the transistor M
A current I1 determined by P1 flows. This current I1 is a constant current, and the gate voltage of the transistor MN3 is also constant. In addition, the voltage V2 of the node N2 is also the transistor MP.
Since 1 and the on resistance of the transistor MN3 make a constant voltage, the output current I0 becomes constant regardless of the output voltage V0. As described above, the transistor MN3 and the transistor MP1 function as a constant current circuit. The output voltage V0 'at which the transistor MN3 turns on can be expressed by the following equation.

V0 '= √ (2 · I1 / β3) + Vt3 (β3: conductance of transistor MN3, Vt:
(Threshold voltage of transistor MN3)

Therefore, the voltage V0 at which the output current I0 becomes constant regardless of the output voltage V0 can be lowered to about the threshold value V0 'of the transistor MN3, and the node N2
Voltage V2 becomes lower than the power supply voltage VDD (Fig. 2 (a)).
). Further, as shown in FIG. 3, it is possible to reduce the current at the time of saturation as compared with the conventional driver circuit which is configured by using a single transistor.

The operation will be described below. Since a non-saturated area is used in a LAN transmission line or the like, overcurrent detection is performed by utilizing the change in the voltage V2 of the node N2. At this time, the reference voltage VR input to the reference voltage input terminal T2 of the comparator CP1 is set to a voltage near the center between the power supply voltage VDD and the voltage V2 when the transistor MN3 is turned on.

When the driver circuit is turned on, normally the bus line L
A current flowing through the terminating resistor R4 of 1, the on resistance of the transistor MN2, and the on resistance of the transistor MN4 flows, and the voltage appearing at the output terminal T3 is lower than the on voltage V0 'of the transistor MN3. The voltage V2 is the power supply voltage VDD, and the reference voltage VR
Therefore, the output of the comparator CP1 is "H".

By the way, when the output terminal T3 or the bus line 2 is short-circuited to the power supply VDD or the like for some reason and a voltage higher than the voltage V0 'at which the transistor MN3 is turned on is applied, the transistor MN3 is turned on and the node N2. Since the voltage V2 of the node N3 drops and becomes lower than the reference voltage VR, the voltage V3 of the node N3 which is the output of the comparator CP1 becomes "L" (FIG. 2 (b)). At this time, the gate voltage of the transistor MN2 (the voltage V2 of the node N2)
Becomes a constant voltage lower than the power supply voltage VDD, the output current I0 becomes constant regardless of the output voltage V0.

Further, the output of the comparator CP1 is inputted to the other input of the NAND gate G1, and the voltage V1 of the node N1 which is the output of the NAND gate G1 becomes "H" regardless of the input voltage of the input terminal T1. The transistor MP1 turns off, the transistor MN2 turns off, and the driver circuit turns off (see FIGS. 2 (c) and 2 (d)).

As described above, according to this embodiment, the constant current circuit composed of the transistor MP1 and the transistor MN3 is provided, and the voltage of the output terminal T3 is applied to the gate of the transistor MN3 constituting the circuit via the transistor MN2. As a result, a current equal to or higher than a predetermined value is applied to the transistor M.
When it flows to N2, the constant current circuit operates and the gate voltage of the transistor MN2 is fixed to a value lower than the power supply voltage VDD, so that the current flowing through the transistor MN2 at the time of saturation becomes small, and from the power supply voltage VDD to the transistor MN2. It is possible to reduce disconnection of the metal wiring and deterioration of the metal wiring due to electromigration.

Further, since the change in the voltage when the overcurrent flows is detected by the on / off operation of the transistor, when driving a load that requires a small voltage drop, the resistance is different from the conventional one. Compared with the case of detecting an overcurrent by using a resistor having a low value, a small voltage drop and a large change in the detection voltage can be performed, so that highly accurate detection can be easily performed.

In the above embodiment, the output of the comparator is used to invert the output of the NAND gate G1 when the overcurrent is detected. However, as shown in FIG. The combined inverters GI1 and GI2 may be used, and the same effect as that of the above embodiment can be obtained by detecting the overcurrent by the inverter by utilizing the change in the voltage corresponding to the node N2.

The configuration of the switching unit 30 is also NAN.
In addition to the D gate, the transistor M receives a change in voltage.
Other configurations may be used as long as they have a logical function of turning off P1.

Example 2. Next, a second embodiment of the present invention will be described based on FIG. In the above embodiment, the bus line L1
Shows a current sink type in which the voltage is pulled up to the power supply voltage and the voltage drops when the output driver circuit is turned on. In this embodiment, the bus line L1 is pulled down to the ground,
The present invention is applied to a current force type output driver circuit whose voltage rises when the output driver circuit is turned on.

In FIG. 5, MP4 and MP2 are drive transistors which are connected in series between the power supply voltage VDD and the output terminal T3 and which constitute the driver section 11. Further, the output terminal T3 is connected to the bus line L1 and is also connected to the ground via the resistor R4 to be pulled down. Further, the transistor MP3 of the overcurrent protection unit 41 detects the voltage of the output terminal T3, and when this is above a predetermined value, the potential between the source and gate of the transistor MP2 is fixed to protect the driver transistors MP4 and MP2 from overcurrent. Play a role. Also, MN1
Is an NMOS transistor that constitutes the switching unit 31 together with the NAND gate G1 and the inverters G2 and G3.

Next, the functions of the above components will be described. In FIG. 5, when the input terminal T1 is "H", the output driver circuit is turned on. That is, the node N1 is "H"
Then, the transistor MN1 is turned on and the potential V2 of the node N2 becomes the ground potential VSS, whereby the transistors MP2 and MP4 are turned on. At this time, the gate voltage of the transistor MP3 is almost equal to the output voltage V0 of the output terminal T3.

Then, the output voltage V0 of the output terminal T3
When the voltage is less than the predetermined value V0 ', the transistor MP3 is turned on, and the current I1 determined by the transistor MN1 flows. This current I1 is a constant current, and the transistor M
The gate voltage of P3 also becomes constant. Further, the voltage V2 of the node N2 also becomes a constant voltage due to the on-resistances of the transistors MN1 and MP3, so that the output current I0 flowing through the transistor MP2 becomes constant regardless of the output voltage V0 of the output terminal T3. The output voltage V0 'at which the transistor MP3 turns on can be expressed by the following equation.

V 0 '= VDD-√ (2 · I 1 / β3) + VT 3 (β 3: Conductance of transistor MP 3, Vt:
(Threshold voltage of transistor MN3)

In this way, when the overcurrent occurs, the transistor M
The voltage V0 at which the output current I0 flowing through P2 is constant can be lowered to about the threshold value V0 'of the transistor MP3, and the voltage V2 at the node N2 becomes higher than the ground potential VSS (Fig. 6 (a)). Similar to the above embodiment, the current at saturation can be made smaller than that of a single transistor.

The operation will be described below. Since a non-saturated region is used in a LAN transmission line or the like, overcurrent detection is performed by utilizing this change in the voltage V2 of the node N2. At this time, the reference voltage VR input to the reference input voltage terminal of the comparator CP1 is set to the ground potential VSS and the transistor MP.
Set to a voltage near the center of the voltage V2 when 3 is turned on.

When the driver circuit is turned on, normally, a full current flows due to the termination resistance R4 of the bus line L1 and the on resistances of the transistors MP2 and MP4, and the output terminal T3.
Is the on-voltage V0 'of the transistor MP3.
Therefore, the output of the comparator CP1 is "L" because the transistor MP3 is off and the voltage V2 of the node N2 is the ground potential VSS and lower than the reference voltage VR.

By the way, when the output terminal T3 or the bus line 2 is short-circuited to the ground or the like for some reason and a voltage lower than the voltage V0 'at which the transistor MP3 is turned on is applied, the transistor MP3 is turned on and the node N2 is turned on.
The voltage V2 at the node N3, which is the output of the comparator CP1, becomes "H" because the voltage V2 at the node N3 rises and becomes higher than the reference voltage VR (FIG. 6 (b)). This comparator C
The output of P1 is passed through the inverter G3 to the NAND gate G
It is input to 1, so regardless of the input voltage, NAN
The output of the D gate G1 becomes "H" and the output of the driver circuit is turned off (FIGS. 6 (c) and 6 (d)).

By doing so, the same effect as that of the above-described embodiment can be obtained. Further, also in the second embodiment, as in the case of the first embodiment, instead of the comparator, an inverter having a matched threshold value at the time of inverter inversion may be used.

[0037]

As described above, according to the output driver circuit of the present invention, when the output of the drive transistor exceeds a certain value, the gate voltage of the drive transistor is fixed to a constant value by using the constant current circuit. Since the current flowing through the transistor at saturation is small, the output can be turned off at a small saturation current, and the current flowing through the drive transistor at the time of power supply or ground short is small or almost non-existent. It is difficult to achieve the above, and there is an effect that improvement in reliability can be expected.

Further, as compared with the prior art in which the occurrence of overcurrent is detected by utilizing the voltage drop due to the resistance, in the present invention, since the voltage change is detected by using the transistor, the load with a small voltage change width during driving is loaded. However, there is an effect that the overcurrent can be detected accurately and easily.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an output driver circuit according to a first embodiment of the present invention.

FIG. 2 is a diagram showing voltages and currents at respective nodes for explaining the operation of the output driver circuit.

FIG. 3 is a diagram showing voltage and current when the present invention and the conventional output driver circuit are saturated.

FIG. 4 is a diagram showing a modification of the above embodiment.

FIG. 5 is a configuration diagram of an output driver circuit according to a second embodiment of the present invention.

FIG. 6 is a diagram showing voltage and current at each node for explaining the operation of the output driver circuit.

FIG. 7 is a diagram showing a configuration of a conventional output driver circuit.

[Explanation of symbols]

 2 load circuit 10 driver unit 11 driver unit 30 switching unit 31 switching unit 40 overcurrent protection unit 41 overcurrent protection unit T1 input terminal T2 reference voltage input terminal T3 output terminal G1 NAND gate G2 inverter G3 inverter G4 NOR gate CP1 comparator MP1 PMOS Transistor MP2 PMOS transistor MN1 NMOS transistor MN2 NMOS transistor MN3 NMOS transistor MN4 NMOS transistor MN5 NMOS transistor N1 node N2 node N3 node L1 bus line R4 terminating resistor

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[Procedure amendment]

[Submission date] October 5, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0017

[Correction method] Change

[Correction content]

V0 '= √ (2 · I1 / β3) + Vt3 (β3: conductance of transistor MN3, Vt
3 : threshold voltage of transistor MN3)

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0018

[Correction method] Change

[Correction content]

[0018] Therefore, the voltage V0 output current I0 becomes constant regardless of the output voltage V0, can be lowered to about the threshold V t3 of the transistor MN3, the node N2
Voltage V2 becomes lower than the power supply voltage VDD (Fig. 2 (a)).
). Further, as shown in FIG. 3, it is possible to reduce the current at the time of saturation as compared with the conventional driver circuit which is configured by using a single transistor.

[Procedure 3]

[Document name to be amended] Statement

[Correction target item name] 0031

[Correction method] Change

[Correction content]

V 0 '= VDD-√ (2 · I 1 / β3) + VT 3 (β 3: Conductance of transistor MP 3, Vt
3 : threshold voltage of transistor MN3)

[Procedure amendment 4]

[Document name to be amended] Statement

[Name of item to be corrected] 0032

[Correction method] Change

[Correction content]

In this way, when the overcurrent occurs, the transistor M
The voltage V0 output current I0 flowing through the P2 is constant can be lowered to about the threshold V t3 of the transistor MP3, the voltage V2 of the node N2 becomes higher than the ground potential VSS (FIG. 6 (a)), Similar to the above embodiment, the current at saturation can be made smaller than that of a single transistor.

Claims (3)

[Claims] 1. A drive transistor for driving a load circuit, a switching unit for controlling conduction / non-conduction of the drive transistor, and a current flowing through the drive transistor is detected, and when the value is a predetermined value or more, the switching unit. In the output driver circuit including an overcurrent protection unit for controlling the drive transistor to be non-conductive, the overcurrent protection unit detects the output voltage of the drive transistor and detects a current exceeding a reference value. A first control means for fixing a source-gate voltage of the drive transistor to regulate a current flowing through the drive transistor when the current flows to the drive transistor; and a change in the output voltage of the drive transistor,
An output driver circuit, comprising: a second control unit that makes the drive transistor non-conductive by controlling the switching unit. 2. The output driver circuit according to claim 1, wherein the driver section drives a load circuit pulled up to a power supply side, and the first control means is provided between the power supply and ground. The output voltage of the drive transistor is applied to the gate of the transistor connected to the ground side of the transistor, and the drive transistor is turned on by a constant current flowing through the transistor when an overcurrent occurs. An output driver circuit, which is a constant current circuit that fixes the gate-source of the device to a potential lower than the power supply potential. 3. The output driver circuit according to claim 1, wherein the driver section drives a load circuit pulled down to the ground side, and the first control means is provided between the power supply and the ground. An output voltage of the drive transistor is applied to the gate of the transistor having two transistors connected in series, and the output voltage of the drive transistor is applied to the gate of the transistor connected to the power supply side of the transistor. An output driver circuit, which is a constant current circuit that fixes a gate-source to a potential higher than a ground potential.