JPH06268094A - Hybrid integrated circuit - Google Patents
Hybrid integrated circuitInfo
- Publication number
- JPH06268094A JPH06268094A JP5232593A JP5232593A JPH06268094A JP H06268094 A JPH06268094 A JP H06268094A JP 5232593 A JP5232593 A JP 5232593A JP 5232593 A JP5232593 A JP 5232593A JP H06268094 A JPH06268094 A JP H06268094A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- external lead
- hybrid integrated
- lead terminal
- fixed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 42
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 42
- 239000010703 silicon Substances 0.000 claims abstract description 42
- 239000011347 resin Substances 0.000 claims abstract description 36
- 229920005989 resin Polymers 0.000 claims abstract description 36
- 239000000463 material Substances 0.000 claims abstract description 30
- 239000011248 coating agent Substances 0.000 claims abstract description 18
- 238000000576 coating method Methods 0.000 claims abstract description 18
- 238000002347 injection Methods 0.000 claims abstract description 15
- 239000007924 injection Substances 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims description 51
- 229910052751 metal Inorganic materials 0.000 claims description 24
- 239000002184 metal Substances 0.000 claims description 24
- 229920001187 thermosetting polymer Polymers 0.000 claims description 16
- 230000002093 peripheral effect Effects 0.000 claims description 7
- 238000007789 sealing Methods 0.000 claims 2
- 238000009413 insulation Methods 0.000 abstract description 4
- 239000000853 adhesive Substances 0.000 description 7
- 230000001070 adhesive effect Effects 0.000 description 7
- 239000003822 epoxy resin Substances 0.000 description 7
- 229920000647 polyepoxide Polymers 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- 239000011889 copper foil Substances 0.000 description 6
- 230000017525 heat dissipation Effects 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 238000007731 hot pressing Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 239000011152 fibreglass Substances 0.000 description 2
- 238000001746 injection moulding Methods 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000009719 polyimide resin Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 239000010407 anodic oxide Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 231100000989 no adverse effect Toxicity 0.000 description 1
- 239000004745 nonwoven fabric Substances 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は混成集積回路に関し、特
にシリコンゲル充填型の混成集積回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit, and more particularly to a silicon gel-filled hybrid integrated circuit.
【０００２】[0002]
【従来の技術】図３を参照して従来の混成集積回路を説
明する。従来の混成集積回路は、図３に示すように、略
箱形状のケース材（６０）、外部リード（８０）、集積
回路素子（８２）等を固着、搭載する第１の絶縁金属基
板（７０）、主として、絶縁性向上のために使用される
第２の絶縁金属基板（９０）から構成される。2. Description of the Related Art A conventional hybrid integrated circuit will be described with reference to FIG. As shown in FIG. 3, a conventional hybrid integrated circuit has a first insulating metal substrate (70) on which a substantially box-shaped case material (60), external leads (80), integrated circuit elements (82) and the like are fixed and mounted. ), Primarily of a second insulating metal substrate (90) used to improve insulation.
【０００３】ケース材（６０）は第１の絶縁金属基板
（７０）の周辺部に当接する壁（６２）を備える。外部
リードが導出される方向に形成される壁（６２）の１つ
には、図３に示すように、シリコンゲル導入孔（６４）
が形成される。また、通常、ケース材（６０）の長手方
向端部に段部が形成され、この段部に、混成集積回路装
置を図示しない放熱板に結合するネジのための孔（図示
しない）が形成される。このケース材（６０）は、例え
ばファイバグラス・レインホースＰＥＴ（ＦＲＰＥＴ）
を射出成形して得られる。The case member (60) has a wall (62) that abuts the peripheral portion of the first insulating metal substrate (70). As shown in FIG. 3, the silicon gel introducing hole (64) is formed in one of the walls (62) formed in the direction in which the external lead is led out.
Is formed. Further, usually, a step portion is formed at the longitudinal end portion of the case member (60), and a hole (not shown) for a screw for coupling the hybrid integrated circuit device to a heat sink (not shown) is formed in the step portion. It This case material (60) is, for example, fiberglass rain hose PET (FRPET).
Is obtained by injection molding.
【０００４】第１および第２の絶縁金属基板（７０）
（９０）には放熱特性および加工性を考慮して略２ｍｍ
厚のアルミニウムが使用され、絶縁性の向上のためにそ
の表面が陽極酸化処理される。外部リード用パッド（７
４）、ダイボンドパッド（７６）、ワイアボンディング
パッド（７８）および導電路（図示しない）は、ポリイ
ミド樹脂等の接着性を有する熱硬化性絶縁樹脂と略３５
μｍ厚の銅箔とのクラッド材を温度１５０℃〜１７０
℃、１平方センチメートル当り５０〜１００ｋｇの圧力
で第１の絶縁金属基板（７０）にホットプレスした後、
その銅箔をホトエッチングする等して所定パターンに形
成される。なお、前記熱硬化性絶縁樹脂はこのホットプ
レス工程で完全硬化して略３５μｍ厚の絶縁層（７２）
となる。First and second insulating metal substrates (70)
(90) is approximately 2 mm considering heat dissipation characteristics and workability
Thick aluminum is used and its surface is anodized for improved insulation. External lead pad (7
4), the die bond pad (76), the wire bonding pad (78) and the conductive path (not shown) are made of a thermosetting insulating resin having adhesiveness such as polyimide resin, and are approximately 35 mm thick.
The clad material with the copper foil of μm temperature is 150 ℃ ~ 170
After hot pressing to the first insulating metal substrate (70) at a temperature of 50 to 100 kg per square centimeter,
The copper foil is photo-etched to form a predetermined pattern. In addition, the thermosetting insulating resin is completely cured in this hot pressing process to form an insulating layer (72) having a thickness of about 35 μm.
Becomes
【０００５】集積回路素子（８２）等の半導体素子およ
びその他の回路素子にはチップ部品が使用され、集積回
路素子（８２）は銀ペースト等により第１の絶縁金属基
板（７０）のダイボンドパッド（７６）に固着され、チ
ップコンデンサあるいはチップ抵抗、外部リード（８
０）等の異型部品は所定のパッドに半田固着される。こ
の第１の絶縁金属基板（７０）の周辺部は、エポキシ含
浸ポリエステル不繊布を接着シートとして、ケース材
（６０）の壁（６２）に加熱圧着（１２５℃、８時間）
され、搭載回路素子が封止される。Chip components are used for semiconductor elements such as the integrated circuit element (82) and other circuit elements, and the integrated circuit element (82) is made of silver paste or the like to form a die bond pad () on the first insulating metal substrate (70). 76) fixed to the chip capacitor or chip resistor, external lead (8
Atypical parts such as 0) are soldered and fixed to predetermined pads. The peripheral portion of the first insulating metal substrate (70) is thermocompression-bonded (125 ° C., 8 hours) to the wall (62) of the case material (60) using an epoxy impregnated polyester non-woven fabric as an adhesive sheet.
Then, the mounted circuit element is sealed.
【０００６】図３を参照すると、耐候性等の向上のため
に充填されるシリコンゲル（９４）は図示しないポンプ
等により、ゾル状態で壁（６２）の充填孔（６４）を介
して回路素子搭載部に注入され、注入後に熱処理してゲ
ル化される。そして、この後に、外部リード（８０）が
固着された領域にエポキシ樹脂等の熱硬化性樹脂（９
６）が充填され、これを硬化（１２５℃、２〜８時間）
して、外部リード（８０）の固着部が補強される。Referring to FIG. 3, the silicon gel (94) filled for improving the weather resistance is in a sol state by a pump or the like (not shown) in a sol state through the filling hole (64) of the wall (62) to form a circuit element. It is injected into the mounting portion, and after the injection, it is heat treated to be gelled. Then, after this, a thermosetting resin (9) such as an epoxy resin is attached to the region where the external lead (80) is fixed.
6) is filled and cured (125 ° C, 2-8 hours)
Then, the fixed portion of the external lead (80) is reinforced.
【０００７】[0007]
【発明が解決しようとする課題】本発明は特に信頼性が
要求され、特殊なヒートサイクル試験が行われるシリコ
ンゲル充填型の混成集積回路装置に発生することがある
外部リード（８０）のためのパッド（７４）の剥離の原
因の解明の過程で成されたものである。即ち、発明者の
研究により、樹脂製のケース材（６０）で封止した混成
集積回路をヒートサイクル試験すると、図３の矢印で示
すように、ケース材（６０）の端部が上方に湾曲するこ
とが知られた。また、熱硬化性樹脂（９６）と第１の絶
縁金属基板（７０）との固着が完全である場合にはこの
湾曲は僅少であることも知られた。SUMMARY OF THE INVENTION The present invention is for external leads (80) that are particularly reliable and may occur in silicon gel filled hybrid integrated circuit devices that are subject to special heat cycle tests. This was done in the process of elucidating the cause of the peeling of the pad (74). That is, according to the research of the inventor, when the hybrid integrated circuit sealed with the resin case material (60) was subjected to the heat cycle test, the end portion of the case material (60) was curved upward as shown by the arrow in FIG. It was known to do. It was also known that this curvature is slight when the thermosetting resin (96) and the first insulating metal substrate (70) are completely fixed to each other.
【０００８】そして、外部リード（８０）固着領域に充
填されるエポキシ樹脂等の熱硬化性樹脂（９６）とケー
ス材（６０）との接着強度が極めて高いに対し、シリコ
ンゲル（９４）と他の材料の接着強度が低いため、外部
リード（８０）固着部にシリコンゲル（９４）が付着す
る場合には、ケース材（６０）の湾曲に応じて、熱硬化
性樹脂（９６）および外部リード（８０）が第１の絶縁
金属基板（７０）から持ち上げられ、やがて、パッド
（７４）の剥離に至ることが解明された。The adhesive strength between the case material (60) and the thermosetting resin (96) such as epoxy resin filled in the area where the outer leads (80) are fixed is extremely high, whereas the silicone gel (94) and others are very strong. When the silicon gel (94) adheres to the external lead (80) fixing part, the thermosetting resin (96) and the external lead are adhered to each other according to the curvature of the case material (60) because the adhesive strength of the material is low. It was elucidated that (80) was lifted from the first insulating metal substrate (70), and eventually the pad (74) was peeled off.
【０００９】なお、外部リード（８０）固着部にシリコ
ンゲル（９４）が付着する理由は、従来の混成集積回路
では、シリコンゾルを注入する注入孔と外部リードが同
一面に配置されるためである。すなわち、ゾル状態のシ
リコンを外部リード（８０）の固着部から注入するた
め、注入パイプの外壁を濡らすシリコンゾルが外部リー
ド（８０）固着部に付着するためである。また、注入す
るシリコンゾルの流動性が高いため、図３に示すよう
に、外部リード（８０）のための電極パターンを浸透し
て、外部リード（８０）固着部をシリコンゾルで濡らす
ためであり、さらにまた、シリコンゾルを高圧注入する
場合に飛散するシリコンゾルが外部リード（８０）固着
部に付着するためである。The reason why the silicon gel (94) adheres to the fixed portion of the external lead (80) is that the injection hole for injecting the silicon sol and the external lead are arranged on the same surface in the conventional hybrid integrated circuit. is there. That is, since sol-state silicon is injected from the fixed portion of the external lead (80), silicon sol that wets the outer wall of the injection pipe adheres to the external lead (80) fixed portion. Further, since the injected silicon sol has a high fluidity, as shown in FIG. 3, it penetrates the electrode pattern for the external lead (80) and wets the fixed part of the external lead (80) with the silicon sol. Furthermore, this is because the silicon sol that scatters when the silicon sol is injected at a high pressure adheres to the external lead (80) fixing portion.
【００１０】この発明は上述した課題に鑑みて為された
ものであり、この発明の目的は、過酷なヒートサイクル
が加えられる場合であっても、パッドの剥離を生じない
高信頼性のシリコンゲル充填型の混成集積回路を提供す
ることである。The present invention has been made in view of the above-mentioned problems, and an object of the present invention is a highly reliable silicon gel which does not cause peeling of a pad even when a severe heat cycle is applied. It is to provide a filling type hybrid integrated circuit.
【００１１】[0011]
【課題を解決するための手段】上述した課題を解決し、
目的を達成するため、この発明に係わる混成集積回路
は、絶縁金属基板上に所望形状の導電路が形成され、そ
の導電路の所望位置に回路素子および外部リード端子が
固着され、基板に回路素子を密封するケース材が固着さ
れ、密封空間内にシリコンゲルが充填された混成集積回
路の外部リード端子はシリコンゲルを充填する注入孔と
同一面より導出され、外部リード端子固着部分を熱硬化
性の被覆樹脂層で被覆したことを特徴としている。[Means for Solving the Problems]
In order to achieve the object, the hybrid integrated circuit according to the present invention is such that a conductive path having a desired shape is formed on an insulating metal substrate, a circuit element and an external lead terminal are fixed to a desired position of the conductive path, and the circuit element is mounted on the substrate. The external lead terminals of the hybrid integrated circuit, in which the case material that seals the silicon gel is fixed and the sealed space is filled with silicon gel, is led out from the same surface as the injection hole that fills the silicon gel, and the external lead terminal fixed part is thermoset It is characterized by being coated with the coating resin layer of.
【００１２】[0012]
【作用】以上のように構成される混成集積回路において
は、シリコンゲル注入孔と同一面により導出された外部
リード端子固着部分を熱硬化性樹脂の被覆樹脂層で被覆
することにより、シリコンゾルの注入時にゾルが飛散し
たとしてもリード端子固着部分は熱硬化性樹脂によって
被覆保護されているためにシリコンゲルによるリード端
子の固着部の剥離を防止することができる。In the hybrid integrated circuit configured as described above, by coating the external lead terminal fixing portion led out on the same plane as the silicon gel injection hole with the coating resin layer of the thermosetting resin, the silicon sol Even if the sol is scattered during the injection, since the lead terminal fixing portion is covered and protected by the thermosetting resin, it is possible to prevent the fixing portion of the lead terminal from being peeled off by the silicon gel.
【００１３】[0013]
【実施例】以下に、図１〜図２に示した一実施例に基づ
いて本発明の混成集積回路を説明する。図１は本発明の
混成集積回路を示す断面図であり、図２は本発明を示す
平面図である。DESCRIPTION OF THE PREFERRED EMBODIMENTS A hybrid integrated circuit according to the present invention will be described below based on an embodiment shown in FIGS. 1 is a sectional view showing a hybrid integrated circuit of the present invention, and FIG. 2 is a plan view showing the present invention.
【００１４】本発明の混成集積回路は、第１の絶縁金属
基板（１０）と、第１の基板（１０）上に形成された導
電路（１２）と、その導電路（１２）上に固着された回
路素子（１４）および外部リード端子（２０）と、第１
の基板（１０）と一体化されるケース材（３０）と、リ
ード端子固着部分（２０Ａ）を被覆する被覆樹脂層（４
０）と、第１の基板（１０）とケース材（３０）の空間
に充填されるシリコンゲル（５０）と、第１の基板（１
０）と密接する第２の絶縁金属基板（５６）とから構成
される。The hybrid integrated circuit of the present invention includes a first insulating metal substrate (10), a conductive path (12) formed on the first substrate (10), and a conductive path (12) fixed to the conductive path (12). A circuit element (14) and an external lead terminal (20)
Case material (30) integrated with the substrate (10) and the coating resin layer (4) for covering the lead terminal fixing portion (20A).
0), the silicon gel (50) filled in the space between the first substrate (10) and the case material (30), and the first substrate (1).
0) and a second insulative metal substrate (56) in close contact.
【００１５】第１の絶縁金属基板（１０）には放熱特性
および加工性を考慮して略２ｍｍ厚のアルミニウム基板
が使用され、絶縁性の向上のためにこの表面が陽極酸化
処理がされている。この陽極酸化膜は必要に応じて選択
することができる。この第１の絶縁金属基板（１０）は
混成集積回路装置が略完成した時点で、数単位乃至数十
単位の混成集積回路基板から単位混成集積回路装置のサ
イズに分割プレスされる。An aluminum substrate having a thickness of about 2 mm is used as the first insulating metal substrate (10) in consideration of heat dissipation characteristics and workability, and its surface is anodized for improving the insulating property. . This anodic oxide film can be selected as needed. When the hybrid integrated circuit device is substantially completed, the first insulating metal substrate (10) is divided and pressed from several to several tens of units of the hybrid integrated circuit substrate to the size of the unit hybrid integrated circuit device.
【００１６】外部リード用パッド、ワイアボンディング
パッド、ダイボンドパッドおよびそれらのパッドを接続
するパターンを含む導電路は、ポリイミド樹脂等の接着
性を有する熱硬化性絶縁樹脂と略３５μｍ厚の銅箔との
クラッド材を温度１５０℃〜１７０℃、１平方センチメ
ートル当り５０〜１００ｋｇの圧力で第１の絶縁金属基
板（１０）にホットプレスした後、その銅箔をホトエッ
チングする等して所定パターンに形成される。なお、前
記熱硬化性絶縁樹脂はこのホットプレス工程で完全硬化
して略３５μｍ厚の絶縁層（１１）となる。A conductive path including an external lead pad, a wire bonding pad, a die bond pad, and a pattern connecting these pads is formed of a thermosetting insulating resin having adhesiveness such as polyimide resin and a copper foil having a thickness of about 35 μm. The clad material is hot-pressed onto the first insulating metal substrate (10) at a temperature of 150 ° C. to 170 ° C. and a pressure of 50 to 100 kg per square centimeter, and then the copper foil is photo-etched to form a predetermined pattern. . The thermosetting insulating resin is completely cured in this hot pressing process to form an insulating layer (11) having a thickness of about 35 μm.
【００１７】第１の基板（１０）上に銅箔を貼着した
後、銅箔を所望形状にエッチングし、上記した外部リー
ド用パッド等を含む導電路（１２）が形成される。この
実施例では、図１および図２からでは明らかにされない
が、第１の基板上にはパワー用の導電路と小信号用の導
電路とが略基板の全面にわたって形成され、外部リード
端子（２０）が固着される固着パッド（１２Ａ）は第１
の基板（１０）の周端部に延在形成されている。After adhering a copper foil on the first substrate (10), the copper foil is etched into a desired shape to form a conductive path (12) including the above-mentioned external lead pads and the like. In this embodiment, although not apparent from FIGS. 1 and 2, a power conductive path and a small signal conductive path are formed on the first substrate over substantially the entire surface of the substrate, and external lead terminals ( The fixing pad (12A) to which 20) is fixed is the first
Is formed so as to extend to the peripheral edge of the substrate (10).
【００１８】集積回路素子（１３）等の半導体素子およ
びその他の回路素子にはチップ部品が使用され、集積回
路素子（１３）は銀ペースト等によりダイボンドパッド
（１２Ｂ）に固着され、チップコンデンサ、あるいはチ
ップ抵抗等の異型部品は所定のパッドに半田固着され
る。これら回路素子は所定のパッド上にスクリーン印刷
したソルダーペーストに一時的に付着させた時、リフロ
ーして完全固着される。Chip components are used for semiconductor elements such as the integrated circuit element (13) and other circuit elements. The integrated circuit element (13) is fixed to the die bond pad (12B) with silver paste or the like, and is used as a chip capacitor or Atypical parts such as chip resistors are soldered and fixed to predetermined pads. When these circuit elements are temporarily attached to a solder paste screen-printed on a predetermined pad, they are reflowed and completely fixed.
【００１９】そして、固着パッドに外部リード端子（２
０）が半田固着される。この外部リード端子（２０）
は、リード端子（２０）の先端部に約３００〜３５０℃
に加熱された半田ごてを数秒間圧接してパッド上にあら
かじめ形成された半田を溶融させてパッド上にリード端
子（２０）が半田固着される。外部リード端子（２０）
の接続部分には、熱硬化性の被覆樹脂層（４０）が形成
される。被覆樹脂層（４０）は固着パッド（１２Ａ）の
近傍に回路素子（１３）が実装されるためにチクソ性の
高いエポキシ樹脂が用いられ、吐出ノズル等により隣接
配列されたリード端子の接続部分（２０Ａ）を連結する
ように塗布する。被覆樹脂層（４０）は上述したように
リード端子（２０）の接続部分のみを被覆すれば足りる
が、シリコンゲルによる剥離を完全に抑制するために
は、リード端子の接続部分（２０Ａ）および固着パッド
（１２Ａ）の周囲の一部分を被覆するように塗布するこ
とが好ましい。その理由は、リード端子（２０）を固着
する半田とエポキシ樹脂との接着は接着力が弱いためで
あり、被覆樹脂層（４０）はできるかぎり絶縁層（１
１）面と密接するように塗布することが好ましい。本実
施例では、上述したように、被覆樹脂層（４０）はリー
ド端子の接続部分および固着パッドを完全に被覆してい
る。また、吐出ノズルで塗布しても被覆樹脂層（４０）
のチクソ性が比較的に高いために固着パッド（１２Ａ）
の近傍に実装された回路素子（１３）表面に樹脂層（４
０）が流出し悪影響を与えることはない。The external lead terminal (2
0) is fixed by soldering. This external lead terminal (20)
Is about 300 to 350 ° C at the tip of the lead terminal (20).
The heated soldering iron is pressed for several seconds to melt the solder previously formed on the pad, so that the lead terminal (20) is soldered and fixed onto the pad. External lead terminal (20)
A thermosetting coating resin layer (40) is formed at the connection portion of. The coating resin layer (40) is made of epoxy resin having a high thixotropy because the circuit element (13) is mounted in the vicinity of the fixing pad (12A). 20A) is applied so as to be connected. As described above, the coating resin layer (40) only needs to cover the connecting portion of the lead terminal (20), but in order to completely suppress the peeling by the silicon gel, the connecting portion (20A) of the lead terminal and the fixing portion are fixed. It is preferably applied so as to cover a part of the periphery of the pad (12A). The reason is that the adhesive strength between the solder for fixing the lead terminals (20) and the epoxy resin is weak, and the covering resin layer (40) is the insulating layer (1) as much as possible.
1) It is preferable to apply so as to be in close contact with the surface. In this embodiment, as described above, the coating resin layer (40) completely covers the connecting portion of the lead terminal and the fixing pad. In addition, the coating resin layer (40) even when applied with a discharge nozzle
Adhesive pad (12A) due to its relatively high thixotropy
On the surface of the circuit element (13) mounted near the resin layer (4
0) does not flow out and have no adverse effect.
【００２０】被覆樹脂層（４０）をリード端子の接続部
分（２０Ａ）に塗布した後、第１の基板（１０）の周端
辺にケース材（３０）が固着される。ケース材（３０）
はファイバグラス・レインホースＰＥＴ（ＦＲＰＥＴ）
を射出成形により略箱状に形成され、第１の基板（１
０）の周端部領域（一点鎖点）にエポキシ樹脂を含浸さ
せた接着シートを配置してケース材（３０）を当接させ
て約１２５℃、８時間の加熱処理を行って第１の基板
（１０）とケース材（３０）とが一体化される。この加
熱処理によって前述の被覆樹脂層（４０）が同時に硬化
され、被覆樹脂層（４０）を硬化させるための専用の加
熱工程は必要としない。第１の基板（１０）とケース材
（３０）とを一体化した際、外部リード端子（２０）は
ケース材（３０）のシリコンゲル注入孔面より導出され
る。After the coating resin layer (40) is applied to the connecting portion (20A) of the lead terminal, the case material (30) is fixed to the peripheral edge of the first substrate (10). Case material (30)
Is Fiberglass Rain Horse PET (FRPET)
Is formed into a substantially box shape by injection molding, and the first substrate (1
The adhesive sheet impregnated with the epoxy resin is arranged in the peripheral end region (one-dot chain point) of 0), the case material (30) is brought into contact with the adhesive sheet, and heat treatment is performed at about 125 ° C. for 8 hours to perform the first treatment. The substrate (10) and the case material (30) are integrated. By this heat treatment, the coating resin layer (40) described above is simultaneously cured, and a dedicated heating step for curing the coating resin layer (40) is not required. When the first substrate (10) and the case material (30) are integrated, the external lead terminals (20) are led out from the silicon gel injection hole surface of the case material (30).
【００２１】そして、第１の基板（１０）とケース材
（３０）を一体化した後、第１の基板（１０）の反主面
に第２の絶縁金属基板（５６）が当接配置される。第２
の絶縁金属基板（５６）は第１の絶縁金属基板（１０）
と同一の素材であり、ケース材（３０）の放熱板に結合
するネジのための孔に対応する位置に孔（図示されな
い）が形成される。この第２の絶縁金属基板（５６）は
シリコン樹脂によってケース材（３０）および第１の基
板（１０）と結合される。そして、この接着に使用され
たシリコン樹脂（５７）が第１の絶縁金属基板（１０）
と図示しない放熱板間の絶縁性能を向上させる。第２の
基板（５６）は第１の基板（１０）よりも大きいサイズ
で形成され、第２の基板（５６）の周端部とケース材
（３０）間に空間部が形成される。Then, after the first substrate (10) and the case member (30) are integrated, the second insulating metal substrate (56) is placed in contact with the opposite main surface of the first substrate (10). It Second
The insulating metal substrate (56) is a first insulating metal substrate (10)
A hole (not shown) is formed at the position corresponding to the hole for the screw that is coupled to the heat dissipation plate of the case member (30). The second insulating metal substrate (56) is bonded to the case material (30) and the first substrate (10) by a silicon resin. Then, the silicon resin (57) used for this bonding is the first insulating metal substrate (10).
And the insulation performance between the heat sink not shown is improved. The second substrate (56) is formed with a size larger than that of the first substrate (10), and a space is formed between the peripheral end of the second substrate (56) and the case material (30).
【００２２】第１の基板（１０）とケース材（３０）で
形成された空間内には、ケース材（３０）のシリコンゲ
ル注入孔（３０Ａ）よりシリコンゾルが充填され、注入
後に熱処理してゲル化される。シリコンゾル充填時に被
覆樹脂層（４０）はゾルはい上りを防止する機能も兼用
している。そして、第２の基板（５６）とケース材（３
０）で形成された空間部にエポキシ樹脂（５８）が充填
され外部リード端子（２０）の固着部分が補強される。The space formed by the first substrate (10) and the case material (30) is filled with silicon sol through the silicon gel injection hole (30A) of the case material (30) and heat-treated after the injection. Gelled. The coating resin layer (40) also has a function of preventing the sol from rising when the silicon sol is filled. Then, the second substrate (56) and the case material (3
The space formed by 0) is filled with epoxy resin (58) to reinforce the fixed portion of the external lead terminal (20).
【００２３】ケース材（３０）の注入孔（３０Ａ）より
シリコンゾルを注入する際、シリコンゾルがリード端子
（２０）の固着部分に飛散等したとしてもリード端子
（２０）固着部分（２０Ａ）には被覆樹脂層（４０）が
形成されるために飛散等したシリコンゾルはリード端子
（２０）の固着部分（２０Ａ）には直接付着せずシリコ
ンゲルによる固着部分の剥離を防止することができる。When the silicon sol is injected from the injection hole (30A) of the case material (30), even if the silicon sol is scattered to the fixed portion of the lead terminal (20), it is still attached to the fixed portion (20A) of the lead terminal (20). Since the coating resin layer (40) is formed, the scattered silicon sol does not directly adhere to the fixed portion (20A) of the lead terminal (20) and can prevent the fixed portion from being peeled off by the silicon gel.
【００２４】上述した実施例では第１および第２の基板
（１０）（５６）を用いて説明したがこの発明は２枚の
基板のみではなく、１枚の基板であっても同様である。In the above-mentioned embodiment, the first and second substrates (10) and (56) are used for explanation, but the present invention is not limited to the case of using two substrates and the same applies to using one substrate.
【００２５】[0025]
【発明の効果】以上に詳述した如く、本発明の混成集積
回路に依れば、シリコンゲル注入孔と同一面により導出
された外部リード端子固着部分を熱硬化性樹脂の被覆樹
脂層で被覆することにより、シリコンゾルの注入時にゾ
ルが飛散したとしてもリード端子固着部分は熱硬化性樹
脂によって被覆保護されているためにシリコンゲルによ
るリード端子の固着部の剥離を防止することができる。
その結果、自動車用、あるいはエアコン等の要求される
ヒートサイクルの混成集積回路の信頼性を著しく向上す
ることができる。As described in detail above, according to the hybrid integrated circuit of the present invention, the external lead terminal fixing portion led out on the same plane as the silicon gel injection hole is covered with the thermosetting resin coating resin layer. By doing so, even if the sol is scattered during the injection of the silicon sol, since the lead terminal fixing portion is covered and protected by the thermosetting resin, it is possible to prevent peeling of the fixing portion of the lead terminal due to the silicon gel.
As a result, the reliability of the required heat cycle hybrid integrated circuit for automobiles or air conditioners can be significantly improved.
【図１】本発明の混成集積回路を示す断面図である。FIG. 1 is a cross-sectional view showing a hybrid integrated circuit of the present invention.
【図２】本発明の混成集積回路を説明するための平面図
である。FIG. 2 is a plan view for explaining the hybrid integrated circuit of the present invention.
【図３】従来の混成集積回路を示す断面図である。FIG. 3 is a cross-sectional view showing a conventional hybrid integrated circuit.
（１０） 第１の絶縁金属基板 （１１） 絶縁層 （１２） 導電路 （２０） 外部リード端子 （３０） ケース材 （４０） 被覆樹脂層 （５０） シリコンゲル （５８） エポキシ樹脂 （５６） 第２の絶縁金属基板 (10) First Insulating Metal Substrate (11) Insulating Layer (12) Conductive Path (20) External Lead Terminal (30) Case Material (40) Cover Resin Layer (50) Silicon Gel (58) Epoxy Resin (56) 2. Insulated metal substrate
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 23/28 Ｋ 8617−4Ｍ Ｅ 8617−4Ｍ 23/50 Ｇ 9272−4Ｍ Ｌ 9272−4Ｍ ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification number Office reference number FI Technical indication location H01L 23/28 K 8617-4M E 8617-4M 23/50 G 9272-4M L 9272-4M
Claims (2)
成され、その導電路の所望位置に回路素子および外部リ
ード端子が固着され、前記基板に回路素子を密封するケ
ース材が固着され、前記密封空間内にシリコンゲルが充
填された混成集積回路において、 前記外部リード端子は前記シリコンゲルを充填する注入
孔と同一面より導出され、前記外部リード端子固着部分
を熱硬化性の被覆樹脂層で被覆したことを特徴とする混
成集積回路。1. A conductive path having a desired shape is formed on an insulating metal substrate, a circuit element and an external lead terminal are fixed to a desired position of the conductive path, and a case material for sealing the circuit element is fixed to the substrate. In the hybrid integrated circuit in which the sealed space is filled with silicon gel, the external lead terminals are led out from the same surface as an injection hole for filling the silicon gel, and the external lead terminal fixing portion is covered with a thermosetting coating resin layer. A hybrid integrated circuit characterized by being coated with.
成され、その導電路の所望位置に回路素子および基板の
一周端辺に複数の外部リード端子が固着され、前記基板
に回路素子を密封するケース材が固着され、前記密封空
間内にシリコンゲルが充填された混成集積回路におい
て、 前記外部リード端子は前記シリコンゲルを充填する注入
孔と同一面より導出され、隣接する前記外部リード端子
固着部分およびそのリード端子が固着される固着パッド
を熱硬化性の被覆樹脂層で連続状となるように、被覆し
たことを特徴とする混成集積回路。2. A conductive path having a desired shape is formed on an insulating metal substrate, and a circuit element and a plurality of external lead terminals are fixed to one peripheral edge of the board at a desired position of the conductive path. In a hybrid integrated circuit in which a case material for sealing is fixed and silicon gel is filled in the sealed space, the external lead terminal is led out from the same plane as an injection hole for filling the silicon gel, and the adjacent external lead terminal is provided. A hybrid integrated circuit characterized in that a fixing portion and a fixing pad to which its lead terminal is fixed are covered with a thermosetting coating resin layer so as to be continuous.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5232593A JPH06268094A (en) | 1993-03-12 | 1993-03-12 | Hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5232593A JPH06268094A (en) | 1993-03-12 | 1993-03-12 | Hybrid integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06268094A true JPH06268094A (en) | 1994-09-22 |
Family
ID=12911644
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5232593A Pending JPH06268094A (en) | 1993-03-12 | 1993-03-12 | Hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06268094A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0962974A3 (en) * | 1998-05-28 | 2002-04-03 | Hitachi, Ltd. | Semiconductor device |
| JP2016162905A (en) * | 2015-03-03 | 2016-09-05 | 株式会社東海理化電機製作所 | Lead connection structure |
-
1993
- 1993-03-12 JP JP5232593A patent/JPH06268094A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0962974A3 (en) * | 1998-05-28 | 2002-04-03 | Hitachi, Ltd. | Semiconductor device |
| JP2016162905A (en) * | 2015-03-03 | 2016-09-05 | 株式会社東海理化電機製作所 | Lead connection structure |
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