JPH06177899A - Time division multiplex transmitter - Google Patents

Abstract

PURPOSE:To easily and quickly set the addresses, to improve the address setting reliability, and to simplify the control of a master device, the terminals, etc. CONSTITUTION:A master device 1 is connected to plural terminals 3 via a transmission line 2. Then the transmission signals consisting of the mode signals, the address signals and the control signals, etc., are transmitted to the terminals 3 from the device 1. Thus the terminals 3 are monitored and controlled. Each terminal 3 contains a switching element 4 inserted in series into the line 2, and these elements 4 are connected in a loop shape to the device 1. The transmission signals are inputted to a transmission signal transmission/reception processing part from the lines 2 set before and after the elements 4 via a selector circuit. The transmission signal transmission/reception processing part writes the address signals of the transmission signal in an address memory part as the set addresses of the terminals 3 when an address setting mode signals is received from the device 1 with the elements 4 kept open. Meanwhile the transmission signal transmission/reception processing part closes the elements 4 to receive the transmission signal of the terminal 3 of the next stage.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a time division multiplex transmission device.

[0002]

2. Description of the Related Art As a method of setting an address of a terminal of a time division multiplex transmission device, there is a method described in Japanese Patent Laid-Open No. 62-71344, for example. That is, as shown in FIG. 4, terminals 3 ₁ , 3 ₂ , ... 3 _n are connected to the base unit ₁ via a transmission line 2, and switches 4 ₁ , 4 ₂ as switching elements are connected in series to the transmission line _2. , ... 4 _n are inserted respectively.
The terminal 3 has a switch 4 as shown in the block diagram of FIG.
Connected to the transmission line 2 from before, and has a transmission signal transmission / reception processing unit 5 for receiving and reproducing transmission signals and returning signals, and for mode determination and address determination. Based on the received and reproduced transmission signal, mode determination, address determination, control signal output and monitoring input are performed. The transmission signal transmission / reception processing unit 5 is provided with a control monitoring unit 6 for returning a monitoring signal to the base unit 1, and an address memory unit 7 for writing the set address.
An address setting processing unit 8 for writing a setting address in the address memory unit 7 and a switch driving unit 9 for controlling the opening / closing of the switch 4 are provided.

These operations include all the switches 4 ₁ , 4 ₂ , ... 4 on the transmission line 2 when the addresses are collectively set.
_{If n} is in the open state, the terminal device 3 closest to the base device 1
When the address setting mode signal and the signal of the address to be set in the terminal device 3 are transmitted from the base unit 1 in a state in which the terminal device 3 is connected to the transmission line 2, the terminal device 3 that receives this signal , While inputting the address setting mode signal from the transmission signal transmission / reception processing unit 5 to the address setting processing unit 8,
An address signal is input and address data is written in the address memory unit 7. When this writing is finished,
The transmission line switch signal S ₁ is output from the address setting processing unit 8 via the OR gate 11, and this signal S ₁ drives the switch driving unit 9 to turn on the switch 4 and the transmission line 2 to the terminal device 3 of the next stage. Connect to. Similarly, the master unit 1 outputs the address setting mode signal and the address signal of the terminal unit 3 of the next stage, and the terminal unit 3 side sets the address in the same manner as described above.

By sequentially turning on the switches 4 ₁ , 4 ₂ ... 4 _n of each terminal device 3 in this manner, the addresses of the terminal devices 3 ₁ , 3 ₂ ... 3 _n can be set. .

[0005]

However, in such a conventional address setting method, when the addresses are collectively set from the base unit 1, if the base unit 1 and the corresponding terminal unit 3 are set for each station. If the settings are made while checking the data between the devices, the control software on the side of the base unit 1 becomes complicated and it takes a very long time to set all the terminals 3 ₁ , 3 ₂ ... 3 _n. , It becomes impractical, and if the address setting mode signal and the address signal are transmitted together without confirmation, the address setting is incomplete due to the failure of the terminal device 3 side, and a failure occurs. There may occur a problem that the station after the terminal device 3 is disconnected.

The present invention has been made to prevent the above-mentioned drawbacks, and an object of the present invention is to easily and easily set the address when the address of the terminal is automatically set remotely from the master unit. An object of the present invention is to provide a time-division multiplex transmission device that can be quickly performed, can improve reliability of address setting, and can easily control a master device, a terminal device, and the like.

[0007]

In order to achieve the above object, in the present invention, a master unit and a plurality of terminal units are connected via a transmission line, and are composed of a mode signal, an address signal, a control signal and the like. A transmission signal is transmitted from a master unit to a terminal device to monitor and control the terminal device, and each terminal device has a switching element inserted in series with a transmission line sent to the next stage, and the transmission line. And a control and monitoring unit that performs mode determination, address determination, control signal output, monitoring input acquisition based on a transmission signal input via a transmission signal transmission / reception processing unit, and returns the monitoring signal to the master unit. , An address memory unit for rewriting the setting address of the transmission signal, an address setting processing unit for writing the setting address to the address memory unit, and opening / closing of the switching element Provided a switching drive unit, the transmission signal transmission and reception processing section, upon reception of the address setting mode signal from the base unit while open said switching element,
In the time division multiplex transmission device for writing the address signal of the transmission signal as the set address of the terminal device in the address memory part and closing the switching element to receive the transmission signal of the terminal device at the next stage, The terminal is connected to the base unit in a loop, and each terminal is characterized in that the transmission lines before and after the switching element are connected to the transmission signal transmission / reception processing unit through the selection circuit.
Further, the closed switching element is configured to be opened by a control signal from the master unit.

[0008]

[Operation] Since the transmission signal can be transmitted from the master unit to each terminal unit from both sides of the terminal unit, there is no need to repeat the transmission and reception of signals between the individual terminal unit and the master unit, and both the master unit and the terminal unit have complicated control. You don't have to.

[0009]

FIG. 1 shows a circuit diagram of an embodiment of the present invention. The base unit 1 and the terminals 3 ₁ , 3 ₂ , ... 3 _n are connected in a loop via a transmission line 2. FIG. 2 is a block diagram of the terminal device 3 in the above circuit, which has a switch 4 as a switching element as in the conventional example, but a selection circuit 12 is provided in front of the transmission signal transmission / reception processing unit 5. The selection circuit 12 is connected to the transmission lines 2 before and after the switch 4, inputs signals from before and after the switch 4, and selects one of them. Selection circuit 12
As the operation of, the loop direction is detected for the terminal device and the address setting is enabled only once. FIG. 3 is a format diagram of a transmission signal used in this embodiment.

Then, the transmission signal selected by the selection circuit 12 is input to the transmission signal transmission / reception processing section 5 to receive and reproduce the transmission signal, and perform mode determination and address determination. The control monitoring unit 6 performs mode determination, address determination, control signal output, and monitoring input fetch based on the transmission signal received and reproduced by the transmission signal reception processing unit 5, and outputs a control switch signal S ₂ . Further, the transmission signal received and reproduced by the transmission signal reception processing unit 5 is transferred to the address setting processing unit 8
The address is written to the writable address memory unit 7 via. The switch driving unit 9 that controls the opening and closing of the switch 4 is controlled by the logical sum output of the transmission line switch signal S ₁ output from the address setting processing unit 8 and the control switch signal S ₂ output from the control monitoring unit 6, The address setting processing unit 8 uses the logical product output of the inverted signal of the logical sum output and the address setting mode signal of the transmission signal reception processing unit 5 as the setting signal.

Assuming that a switch signal is not generated in each terminal device 3, when the address setting signal is transmitted from the master device 1, the terminal device 3 which receives the address setting signal causes the selection circuit 12 to switch the switch 4 in front of the switch 4. Signal is input, the transmission signal reception processing unit 5 outputs an address setting mode signal to input to the address setting processing unit 8 via the AND gate 10 and the operation to input to the control monitoring unit 6. Be done. When this address setting mode signal is input, the address setting processing unit 8 takes in the address received by the transmission signal reception processing unit 5 and writes the address in the address memory unit 7.

When either the transmission line switch signal S ₁ or the control switch signal S ₂ is output from the address setting processing unit 8 or the control monitoring unit 6, the output of the AND gate 10 is output by the inverted signal from the OR gate 11. The operation of setting the signal to "L" and stopping the input of the address setting mode signal to the address setting processing unit 8 is performed, and the acceptance of the address setting signal in the terminal is stopped.

Here, for example, it is assumed that all the terminals on the transmission line 2 have no addresses set. Ie switch 4
_{All the terminals 1} , 4 ₂ , ... 4 _n are in the OFF state, and the terminal device 3 ₁ closest to the base unit 1 (there are two in the case of the loop type, but close to the output port of the base unit) is connected to the transmission line 2. When it is in the connected state, the master unit 1 outputs the address setting mode signal and the set address all at once to all the terminals 3. In other words, as shown in FIG. 3, "the address setting mode signal, the terminal device 3 ₁ address signal", "the address setting mode signal, the terminal device 3 ₂ address signal" ... outputs as. As the individual processing of each terminal device 3, for example, taking the terminal device 3 ₁ as an example, first, the address setting mode signal from the master device 1 and the address signal of the address to be set in the terminal device 3 ₁ are included in one frame. is to come are sent, by inputting the address signal causes input from the terminal device 3 _first transmission signal reception processing unit 5 in which has received the transmission signal an address setting mode signal to the address setting processing unit 8, the address of the address data It is written in the memory unit 7. When this writing is completed, the transmission line switch signal S ₁ is output from the address setting processing unit 8 via the OR gate 11, and the transmission line switch signal S ₁ drives the switch driving unit 9 to turn on the switch 4 _1. Transmission line 2
It was connected next to the terminal unit 3 _2, to allow reception of the transmission signal of the terminal unit 3 _2. When the switch 4 ₁ is turned on, the same data is input again through the selection circuit 12, but the address rewriting is not performed because the terminal device 3 ₁ has already completed the address setting. Frames are sequentially transmitted from the base unit 1 to the terminals 3 ₂ , ... 3 _n . Therefore, the switches 4 ₂ ... 4 _n are sequentially turned on by the same setting method as described above, and the terminals 3 ₂ ... 3 _n addresses can be set.

When the setting of the addresses of all the terminals 3 is completed, the transmission line 2 is connected in a loop by the switch 4, and from the viewpoint of the master unit 1, the signal output port to the input port form one serial transmission line. As a result, all the output data output from the master unit 1 will be returned. Therefore, by sending arbitrary data from the master unit 1 after the setting is completed and checking whether the data is returned or whether the data is correct, it is possible to confirm the completion of the address setting easily and quickly.

Further, in the present embodiment, since the transmission line 2 has a loop shape, a general merit of the loop shape, that is, the transmission line 2 or the terminal device 3 has an abnormality and is disconnected at a certain position. Even in this case, since it becomes possible to transmit data in a loop in the reverse direction from the main unit 1,
The reverse loop has an advantage that it is possible to remotely set the address of the terminal device 3 up to the failure point.

Further, in the conventional terminal device 3, the terminal device 3
There is a direction in the switch circuit of. That is, the transmission signal transmission / reception processing unit 5 side must always be set to the master station side, and if it is reversed, it will not operate at all, so it is necessary to pay close attention to the installation, and it is very difficult to use. However, this device has no directionality and has an advantage in installation that it may be connected to either one.

Further, by collectively setting the addresses, it is not necessary to repeat the signal transmission / reception between the individual terminal unit and the master unit, so that complicated control can be omitted for both the master unit and the terminal unit. There is also a merit on the manufacturer side that the software of will become simple. The closed switching element can be opened by a control signal from the master unit, and the address can be optionally reset.

[0018]

As described above, according to the present invention, the connection between the master unit and the plurality of terminals is looped, so that the addresses of the terminals are collectively set by remote control from the master unit. Since it is not necessary to set the address by switch operation etc. in each terminal at the time of enforcement, address setting becomes easy, and at the time of address setting of the above terminal, address setting of all terminals can be done. When it finishes, all the output data from the master unit is returned, so by confirming the data, the completion of the address setting of all terminals is collectively recognized and there is no disconnection of the transmission line, and it is in a normal state. That is, it has a great effect on facilitating and speeding up address setting. Furthermore, by collectively setting the addresses, it is not necessary to repeat the signal transmission / reception between the individual terminal unit and the master unit, so that complicated control can be omitted for both the master unit and the master unit. There is also an effect that becomes easy.

[Brief description of drawings]

FIG. 1 is an overall configuration diagram of a time division multiplex transmission device according to an embodiment of the present invention

FIG. 2 is a circuit configuration block diagram of the terminal device of FIG.

FIG. 3 is a format diagram of a transmission signal used in FIG.

FIG. 4 is an overall configuration diagram of a conventional time division multiplex transmission device.

FIG. 5 is a circuit block diagram of a terminal unit of a conventional time division multiplex transmission device.

[Explanation of symbols]

1 is a master unit, 2 is a transmission line, 3 is a terminal device, 4 is a switching element, 5 is a transmission signal transmission / reception processing unit, 6 is a control monitoring unit, and 7
Is an address memory unit, 8 is an address setting processing unit, 9 is a switch driving unit, 10 is an AND gate, 11 is an OR gate, and 12 is a selection circuit.

Claims (2)

[Claims] 1. A master unit and a plurality of terminals are connected via a transmission line, and a transmission signal including a mode signal, an address signal, a control signal, etc. is transmitted from the master unit to the terminal unit to monitor the terminal unit.
For controlling, each terminal has a switching element inserted in series with the transmission line sent to the next stage,
Control for performing mode determination, address determination, control signal output, monitoring input acquisition and return of the monitoring signal to the master unit based on the transmission signal connected to the transmission line and input via the transmission signal transmission / reception processing unit A monitoring unit, an address memory unit that rewritably writes the set address of the transmission signal, an address setting processing unit that writes the set address to the address memory unit, and a switching drive unit that opens and closes the switching element are provided. The transmission signal transmission / reception processing unit causes the address signal of the transmission signal to be written in the address memory unit as the setting address of the terminal when the address setting mode signal is received from the master unit in a state where the switching element is opened. Time division multiplex transmission in which the switching element is closed to receive the transmission signal of the terminal device at the next stage In the above arrangement, each of the terminals is connected in a loop with respect to the master unit, and in each terminal, the transmission lines before and after the switching element are connected to the transmission signal transmission / reception processing unit through the selection circuit. Time division multiplex transmission device. 2. The time division multiplex transmission device according to claim 1, wherein the closed switching element is configured to be opened by a control signal from the master unit.