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JPH06164453A - Automatic equalizer - Google Patents

Automatic equalizer

Info

Publication number
JPH06164453A
JPH06164453A JP33561592A JP33561592A JPH06164453A JP H06164453 A JPH06164453 A JP H06164453A JP 33561592 A JP33561592 A JP 33561592A JP 33561592 A JP33561592 A JP 33561592A JP H06164453 A JPH06164453 A JP H06164453A
Authority
JP
Japan
Prior art keywords
multiplication coefficient
signal
equalizer
variable multiplication
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP33561592A
Other languages
Japanese (ja)
Other versions
JP3151979B2 (en
Inventor
Kazuo Somiya
和男 宗宮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Machinery Ltd
Original Assignee
Murata Machinery Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Machinery Ltd filed Critical Murata Machinery Ltd
Priority to JP33561592A priority Critical patent/JP3151979B2/en
Publication of JPH06164453A publication Critical patent/JPH06164453A/en
Application granted granted Critical
Publication of JP3151979B2 publication Critical patent/JP3151979B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

PURPOSE:To provide an automatic equalizer which can converge the variable multiplication coefficient of an equalizer even by an equalizer control signal of a short time obtained in a short training state. CONSTITUTION:An input signal is demodulated by a demodulating part 2 after passing through an AGC circuit 1 and discriminated into the I and Q components through a roll-off filter part 3. The signal equalized by an automatic equalizing part 4 is demodulated at a deciding part 5. The variable multiplication coefficient of the part 4 is controlled by the error signal of an error detecting part 6. When an alternate pattern of ABAB of a segment 1 is received in a short training state, a selecting part 8 selects the signals sent from a level detecting part 7 and controls the variable multiplication coefficient of the part 4. If a low level is detected, the variable multiplication coefficient is increased an vice versa against a high detected level. As a result, the equalization control signal of a segment 2 can converge the variable multiplication coefficient even in a short time.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、自動等化器、特に、ト
ランスバーサルフィルタのように、可変乗算係数によっ
て等化特性が与えられる自動等化器に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic equalizer, and more particularly to an automatic equalizer such as a transversal filter which is provided with equalization characteristics by a variable multiplication coefficient.

【0002】[0002]

【従来の技術】CCITT勧告V.17のトレーニング
において、TCFと画信号前の2種類のトレーニングが
使われる。ロングトレーニングはTCFに使われ、4種
のセグメントから構成される。セグメント1は、ABA
Bの交互パターンをシンボル時間の数として256送信
される。ABABパターンは、信号空間ダイヤグラムで
実数部が(−6)、虚数部が(−2)のA点と実数部が
(+2)、虚数部が(−6)のB点のデータを交互に送
信するものである。セグメント2は等化器調整信号であ
り、シンボル時間の数は2976である。セグメント3
は速度情報シーケンスであり、シンボル時間の数は64
である。最後のセグメント4は、スクランブルされた”
1”が連続する信号であり、シンボル時間の数は48で
ある。
2. Description of the Related Art CCITT Recommendation V.6. In the training of 17, two types of training before TCF and image signal are used. Long training is used for TCF and consists of four types of segments. Segment 1 is ABA
256 are transmitted with the alternating pattern of B as the number of symbol times. The ABAB pattern is a signal space diagram in which the real part is (-6), the imaginary part is (-2), the A point and the real part are (+2), and the imaginary part is (-6). To do. Segment 2 is the equalizer adjustment signal and the number of symbol times is 2976. Segment 3
Is a rate information sequence and the number of symbol times is 64
Is. Last segment 4 was scrambled "
1 ″ is a continuous signal, and the number of symbol times is 48.

【0003】CCITT勧告V.17では、等化器の可
変乗算係数は、ロングトレーニングで調整して係数を確
定し、画信号前のトレーニングは、通信時間を短縮する
ため、短い手順で行なわれる。具体的には、セグメント
1は、ABABの交互パターンをシンボル時間の数とし
て256送信される。したがって、ロングトレーニング
と同じである。セグメント2の等化器調整信号は、シン
ボル時間の数が38であり、ロングトレーニングに比較
して、非常に短い時間である。セグメント3はなく、セ
グメント4は、スクランブルされた”1”が連続する信
号が、シンボル時間の数として48送信される。
CCITT Recommendation V.3 In 17, the variable multiplication coefficient of the equalizer is adjusted by long training to determine the coefficient, and the training before the image signal is performed in a short procedure in order to shorten the communication time. Specifically, segment 1 is transmitted 256 with the ABAB alternating pattern as the number of symbol times. Therefore, it is the same as long training. The equalizer adjustment signal for segment 2 has 38 symbol times, which is a very short time compared to long training. There is no segment 3, and in segment 4, a scrambled "1" sequence signal is transmitted as the number of symbol times of 48.

【0004】図2は、従来の等化器を有するファクシミ
リ受信部の要部のブロック図である。図中、1はAGC
回路、2は復調部、3はロールオフフィルタ部、4は自
動等化部、5は判別部、6は誤差検出部である。入力信
号は、AGC回路1でゲイン調整が行なわれて、復調部
2で復調され、ロールオフフィルタ部3を通して、I成
分とQ成分に弁別される。弁別された各出力信号は、自
動等化部4により回線上で生じた信号の歪が除去され
る。自動等化部4で等化された信号は、判定部5で復号
される。誤差検出部6は、自動等化部4の出力と判定部
5の出力との差を検出して、受信点と判定した信号点と
の誤差を得る。
FIG. 2 is a block diagram of a main part of a facsimile receiving section having a conventional equalizer. In the figure, 1 is AGC
The circuit, 2 is a demodulation unit, 3 is a roll-off filter unit, 4 is an automatic equalization unit, 5 is a discrimination unit, and 6 is an error detection unit. The input signal is subjected to gain adjustment in the AGC circuit 1, demodulated in the demodulation unit 2, and is discriminated into an I component and a Q component through the roll-off filter unit 3. The discriminated output signals are subjected to signal distortion generated on the line by the automatic equalization unit 4. The signal equalized by the automatic equalization unit 4 is decoded by the determination unit 5. The error detection unit 6 detects the difference between the output of the automatic equalization unit 4 and the output of the determination unit 5, and obtains the error between the reception point and the determined signal point.

【0005】自動等化部4は、トランスバーサルフィル
タなど遅延特性を有する回路や、Nビットのシフトレジ
スタが用いられ、誤差検出部6からの誤差信号によって
可変乗算係数が制御され、等化特性が決定される。
The automatic equalization unit 4 uses a circuit having a delay characteristic such as a transversal filter or an N-bit shift register, and the variable multiplication coefficient is controlled by the error signal from the error detection unit 6, so that the equalization characteristic is improved. It is determined.

【0006】トレーニング時においても、受信信号はA
GC回路でAGCがかけられる。AGCは、ロングトレ
ーニング時もショートトレーニング時も同じ受信レベル
となるように動作されているが、実際には、必ずしも同
じ受信レベルとならない。このため、ショートトレーニ
ングのセグメント2の等化器調整信号では、等化器の可
変乗算係数を収束させることができない場合がある。
Even during training, the received signal is A
AGC is applied by the GC circuit. The AGC is operated so as to have the same reception level during both long training and short training, but in reality, it does not always have the same reception level. Therefore, the equalizer adjustment signal of the segment 2 for short training may not be able to converge the variable multiplication coefficient of the equalizer.

【0007】[0007]

【発明が解決しようとする課題】本発明は、上述した事
情に鑑みてなされたもので、ショートトレーニング時に
おける短時間の等化器調整信号でも等化器の可変乗算係
数を収束させることができる自動等化器を提供すること
を目的とするものである。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned circumstances, and can converge the variable multiplication coefficient of the equalizer even with a short-time equalizer adjustment signal during short training. It is intended to provide an automatic equalizer.

【0008】[0008]

【課題を解決するための手段】本発明は、自動等化器に
おいて、トレーニング信号を受信して等化特性を調整す
る自動等化器において、ショートトレーニングにおける
所定パターンの信号レベルを検出するレベル検出手段を
設け、該レベル検出手段の出力に基づいて前記自動等化
部の可変乗算係数を調整することを特徴とするものであ
る。
SUMMARY OF THE INVENTION The present invention provides an automatic equalizer for receiving a training signal and adjusting the equalization characteristic, and detecting the signal level of a predetermined pattern in short training. Means is provided, and the variable multiplication coefficient of the automatic equalization unit is adjusted based on the output of the level detection means.

【0009】[0009]

【作用】本発明によれば、ショートトレーニングにおけ
る所定パターンの信号レベルに基づいて、あらかじめ自
動等化部の可変乗算係数を調整しておくから、短い等化
器調整信号でも等化器の可変乗算係数を収束させること
ができる。
According to the present invention, the variable multiplication coefficient of the automatic equalizer is adjusted in advance based on the signal level of the predetermined pattern in the short training. Therefore, even if the equalizer adjustment signal is short, the variable multiplier of the equalizer is adjusted. The coefficients can be converged.

【0010】[0010]

【実施例】図1は、本発明の一実施例の自動等化器を有
するファクシミリ受信部の要部のブロック図である。図
中、1はAGC回路、2は復調部、3はロールオフフィ
ルタ部、4は自動等化部、5は判別部、6は誤差検出
部、7はレベル検出部、8は選択部である。入力信号
は、AGC回路1でゲイン調整が行なわれて、復調部2
で復調され、ロールオフフィルタ部3を通して、I成分
とQ成分に弁別される。弁別された各出力信号は、自動
等化部4により回線上で生じた信号の歪が除去される。
自動等化部4で等化された信号は、判定部5で復号され
る。誤差検出部6は、自動等化部4の出力と判定部5の
出力との差を検出して、受信点と判定した信号点との誤
差を得る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram of a main part of a facsimile receiving section having an automatic equalizer according to an embodiment of the present invention. In the figure, 1 is an AGC circuit, 2 is a demodulation unit, 3 is a roll-off filter unit, 4 is an automatic equalization unit, 5 is a discrimination unit, 6 is an error detection unit, 7 is a level detection unit, and 8 is a selection unit. . The gain of the input signal is adjusted by the AGC circuit 1, and the demodulation unit 2
The signal is demodulated by and is discriminated into an I component and a Q component through the roll-off filter unit 3. The discriminated output signals are subjected to signal distortion generated on the line by the automatic equalization unit 4.
The signal equalized by the automatic equalization unit 4 is decoded by the determination unit 5. The error detection unit 6 detects the difference between the output of the automatic equalization unit 4 and the output of the determination unit 5, and obtains the error between the reception point and the determined signal point.

【0011】自動等化部4は、従来例と同様に、トラン
スバーサルフィルタなど遅延特性を有する回路や、Nビ
ットのシフトレジスタが用いられ、誤差検出部6からの
誤差信号によって可変乗算係数が制御され、等化特性が
決定される。誤差検出部6からの誤差信号により可変乗
算係数を調整する場合は、選択部8は、誤差検出部6か
らの信号を選択する。
As in the conventional example, the automatic equalizer 4 uses a circuit having a delay characteristic such as a transversal filter or an N-bit shift register, and the variable multiplication coefficient is controlled by the error signal from the error detector 6. And the equalization characteristics are determined. When adjusting the variable multiplication coefficient with the error signal from the error detection unit 6, the selection unit 8 selects the signal from the error detection unit 6.

【0012】ショートトレーニング時のセグメント1に
おいて、ABABの交互パターンを受信するときには、
選択部8は、レベル検出部7からの信号を選択して、自
動等化部4の可変乗算係数を調整する。レベルの検出
は、A,B両信号の一方あるいは双方を検出するように
してもよい。検出したレベルが小さい場合は、各可変乗
算係数(この実施例では、30タップ)を大きくし、逆
に、レベルが大きい場合は、可変乗算係数を小さくす
る。
In segment 1 during short training, when receiving the ABAB alternating pattern,
The selection unit 8 selects the signal from the level detection unit 7 and adjusts the variable multiplication coefficient of the automatic equalization unit 4. The level may be detected by detecting one or both of the A and B signals. When the detected level is low, each variable multiplication coefficient (30 taps in this embodiment) is increased, and conversely, when the level is high, the variable multiplication coefficient is decreased.

【0013】その結果、セグメント2の等化器調整信号
が、短時間であっても、可変乗算係数を収束させること
ができる。
As a result, the equalizer adjustment signal of segment 2 can converge the variable multiplication coefficient even in a short time.

【0014】[0014]

【発明の効果】以上の説明から明らかなように、本発明
によれば、パスメトリック値が大きい場合には、可変乗
算係数を大きい変化幅で変化させて収束精度を向上さ
せ、また、パスメトリック値が大きくない場合には、可
変乗算係数の変化幅を小さくすることにより、自動等化
器の可変乗算係数を最適に制御できるという効果があ
る。
As is apparent from the above description, according to the present invention, when the path metric value is large, the variable multiplication coefficient is changed with a large change width to improve the convergence accuracy, and the path metric is improved. When the value is not large, there is an effect that the variable multiplication coefficient of the automatic equalizer can be optimally controlled by reducing the change width of the variable multiplication coefficient.

【図面の簡単な説明】[Brief description of drawings]

【図1】図1は、本発明の一実施例の自動等化器を有す
るファクシミリ受信部の要部のブロック図である。
FIG. 1 is a block diagram of a main part of a facsimile receiving unit having an automatic equalizer according to an embodiment of the present invention.

【図2】図2は、従来の等化器を有するファクシミリ受
信部の要部のブロック図である。
FIG. 2 is a block diagram of a main part of a facsimile receiving unit having a conventional equalizer.

【符号の説明】[Explanation of symbols]

1 AGC回路 2 復調部 3 ロールオフフィルタ部 4 自動等化部 5 判別部 6 誤差検出部 7 レベル検出部 8 選択部 1 AGC circuit 2 demodulation unit 3 roll-off filter unit 4 automatic equalization unit 5 discrimination unit 6 error detection unit 7 level detection unit 8 selection unit

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 トレーニング信号を受信して等化特性を
調整する自動等化器において、ショートトレーニングに
おける所定パターンの信号レベルを検出するレベル検出
手段を設け、該レベル検出手段の出力に基づいて前記自
動等化部の可変乗算係数を調整することを特徴とする自
動等化器。
1. An automatic equalizer that receives a training signal and adjusts the equalization characteristic is provided with level detection means for detecting a signal level of a predetermined pattern in short training, and the level detection means is provided based on the output of the level detection means. An automatic equalizer characterized by adjusting a variable multiplication coefficient of an automatic equalizer.
JP33561592A 1992-11-20 1992-11-20 Automatic equalizer Expired - Lifetime JP3151979B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33561592A JP3151979B2 (en) 1992-11-20 1992-11-20 Automatic equalizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33561592A JP3151979B2 (en) 1992-11-20 1992-11-20 Automatic equalizer

Publications (2)

Publication Number Publication Date
JPH06164453A true JPH06164453A (en) 1994-06-10
JP3151979B2 JP3151979B2 (en) 2001-04-03

Family

ID=18290569

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33561592A Expired - Lifetime JP3151979B2 (en) 1992-11-20 1992-11-20 Automatic equalizer

Country Status (1)

Country Link
JP (1) JP3151979B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7352630B2 (en) 2019-06-19 2023-09-28 テルモ株式会社 pump equipment

Also Published As

Publication number Publication date
JP3151979B2 (en) 2001-04-03

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