[go: up one dir, main page]

JPH0590278A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH0590278A
JPH0590278A JP27614691A JP27614691A JPH0590278A JP H0590278 A JPH0590278 A JP H0590278A JP 27614691 A JP27614691 A JP 27614691A JP 27614691 A JP27614691 A JP 27614691A JP H0590278 A JPH0590278 A JP H0590278A
Authority
JP
Japan
Prior art keywords
emitter
bipolar transistor
collector
type
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27614691A
Other languages
Japanese (ja)
Inventor
誠一 ▲高▼橋
Seiichi Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP27614691A priority Critical patent/JPH0590278A/en
Publication of JPH0590278A publication Critical patent/JPH0590278A/en
Pending legal-status Critical Current

Links

Landscapes

  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To provide a bipolar transistor which is higher in current amplification factor and equal to a conventional one in breakdown strength between a collector and an emitter. CONSTITUTION:A carbon fluoride thin film layer 112 is provided to an interface between a polycrystalline silicon and a single-crystal silicon of an emitter to prevent holes from flowing into a polycrystalline silicon layer 108 to lessen a base current. Therefore, a base current is lessened, whereby a semiconductor device of this design is enhanced in current amplification factor. This semiconductor device is the same as a conventional one in base impurity profile, so that it is hardly lessened in breakdown strength between an emitter and a collector.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はバイポーラトランジスタ
に関し、特に高い電流増幅率を有するバイポーラトラン
ジスタの構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bipolar transistor, and more particularly to the structure of a bipolar transistor having a high current amplification factor.

【0002】[0002]

【従来の技術】バイポーラトランジスタはその高速性と
高駆動能力から、ディジタル、IC、リニアICを問わ
ず広く用いられる。特に多結晶半導体層をエミッタとし
て用いたバイポーラトランジスタは浅い接合を形成で
き、高速性に優れる。
2. Description of the Related Art Bipolar transistors are widely used in both digital, IC and linear ICs because of their high speed and high driving capability. In particular, a bipolar transistor using a polycrystalline semiconductor layer as an emitter can form a shallow junction and is excellent in high speed.

【0003】図2に従来の多結晶シリコンエミッタを有
するNPN型バイポーラトランジスタを示す。201は
- 型シリコン基板、202はN+ 型埋込層、203は
- 型エピタキシャル層、204はP+ 型絶縁拡散層、
205は素子間分離酸化膜、206はN+ 型コレクタ拡
散層、207はP型ベース領域、208はN+ 型多結晶
シリコンエミッタ、209はN+ 型エミッタ領域、21
0は層間絶縁膜、211は金属配線である。
FIG. 2 shows a conventional NPN type bipolar transistor having a polycrystalline silicon emitter. 201 is a P type silicon substrate, 202 is an N + type buried layer, 203 is an N type epitaxial layer, 204 is a P + type insulating diffusion layer,
Reference numeral 205 is an element isolation oxide film, 206 is an N + type collector diffusion layer, 207 is a P type base region, 208 is an N + type polycrystalline silicon emitter, 209 is an N + type emitter region, 21
Reference numeral 0 is an interlayer insulating film, and 211 is a metal wiring.

【0004】この従来のバイポーラトランジスタでは単
結晶シリコンと多結晶シリコンの界面に20Å程度のシ
リコンの自然酸化膜212が存在し、多結晶シリコン中
への正孔の注入に対してバリアとして働く。このため、
ベース電流が制限され、二重拡散型のトランジスタに比
較して高い電流増幅率(以下hFEと略す)を得ることが
できる(参考文献:PATTON et al. Physics,Technolog
y, and Modeling of Polysilicon Emitter Contacts fo
r VLSI Bipolar Transistors ; IEEE TRANSACTIONS ON
ELECTRON DEVICES, VOL. ED-33 No.11 p.1754-1768 No
v. 1986)。
In this conventional bipolar transistor, a natural oxide film 212 of silicon having a thickness of about 20Å exists at the interface between single crystal silicon and polycrystalline silicon, and acts as a barrier against the injection of holes into polycrystalline silicon. For this reason,
The base current is limited, and a higher current amplification factor (hereinafter abbreviated as h FE ) can be obtained compared to a double diffusion type transistor (reference: PATTON et al. Physics, Technolog).
y, and Modeling of Polysilicon Emitter Contacts fo
r VLSI Bipolar Transistors ; IEEE TRANSACTIONS ON
ELECTRON DEVICES, VOL. ED-33 No. 11 p.1754-1768 No
v. 1986).

【0005】[0005]

【発明が解決しようとする課題】しかしながら、この従
来のバイポーラトランジスタにおいて、コレクタ−エミ
ッタ間耐圧およびアーリー電圧をある値以上に保つよう
に作り込むためには、ベース領域の不純物濃度を上げる
必要があり、高いhFEが得られない。例えば不純物濃度
1×1016cm-3のエピタキシャル層を用いてコレクタ−
エミッタ間耐圧を7V以上、アーリー電圧を50V以上
にする場合には、hFEは50程度しか得られない。
However, in this conventional bipolar transistor, it is necessary to increase the impurity concentration of the base region in order to make the collector-emitter breakdown voltage and the Early voltage above a certain value. , High h FE cannot be obtained. For example, using an epitaxial layer with an impurity concentration of 1 × 10 16 cm −3 ,
When the breakdown voltage between the emitters is 7 V or higher and the Early voltage is 50 V or higher, h FE can be obtained only about 50.

【0006】本発明の目的はコレクタ−エミッタ間耐
圧、アーリー電圧が従来と同じで、よりhFEの高いバイ
ポーラトランジスタを提供することにある。
An object of the present invention is to provide a bipolar transistor which has the same collector-emitter breakdown voltage and early voltage as the conventional one and has a higher h FE .

【0007】[0007]

【課題を解決するための手段】本発明の半導体装置は、
不純物を高濃度に添加した多結晶半導体エミッタ層を有
するバイポーラトランジスタにおいて、単結晶半導体と
多結晶半導体の界面にごく薄いフッ化炭素系化合物薄膜
を備えている。
The semiconductor device of the present invention comprises:
A bipolar transistor having a polycrystalline semiconductor emitter layer doped with impurities at a high concentration is provided with a very thin fluorocarbon compound thin film at the interface between a single crystal semiconductor and a polycrystalline semiconductor.

【0008】[0008]

【実施例】次に本発明について図面を参照して説明す
る。図1は本発明のバイポーラトランジスタの縦断面図
であり、基本的構造は従来のバイポーラトランジスタと
変わりはないが、多結晶シリコン層108が単結晶シリ
コン層109と接するための拡散窓の内部の多結晶−単
結晶界面に数Å〜数十Åのフッ化炭素系化合物の薄膜を
有している。この薄膜が正孔の多結晶シリコン108へ
の注入を防ぎ、その結果ベース電流が減少して、hFE
向上する。この効果は前述したようにシリコンの自然酸
化膜にも同様に見られるが、正孔に対するバリア性はフ
ッ化炭素系薄膜の方がより顕著に現われる。
The present invention will be described below with reference to the drawings. FIG. 1 is a vertical cross-sectional view of a bipolar transistor of the present invention. Although the basic structure is the same as that of a conventional bipolar transistor, the polycrystal silicon layer 108 is in contact with a single crystal silicon layer 109, and a polyhedral inside of a diffusion window is formed. It has a thin film of several Å to several tens of Å fluorocarbon compounds at the crystal-single crystal interface. This thin film prevents holes from being injected into the polycrystalline silicon 108, resulting in a decrease in base current and an improvement in h FE . This effect is similarly observed in the natural oxide film of silicon as described above, but the barrier property against holes is more prominent in the fluorocarbon thin film.

【0009】フッ化炭素系薄膜を形成する方法としては
CF4 65%、H2 35%、圧力5Paの混合ガス雰囲
気中でプラズマ処理を行うやり方がある。
As a method of forming a fluorocarbon thin film, there is a method of performing plasma treatment in a mixed gas atmosphere of CF 4 65%, H 2 35% and a pressure of 5 Pa.

【0010】[0010]

【発明の効果】次に本発明と従来のトランジスタの特性
を図3、図4に示して比較する。図3はコレクタ−エミ
ッタ間耐圧がほぼ等しい場合のhFE−IC (コレクタ電
流)特性である。従来のトランジスタのhFE76に対
し、本発明のトランジスタは121と大きくなってい
る。図4(a)及び(b)はhFEが等しい場合のIC
CE(コレクタ−エミッタ間電圧)特性である。hFE
等しい場合には、アーリー電圧は、本発明が191V、
従来のトランジスタが83Vと本発明のトランジスタの
方が大きい。
The characteristics of the present invention and the conventional transistor are shown in FIGS. 3 and 4 for comparison. FIG. 3 shows h FE -I C (collector current) characteristics when the collector-emitter breakdown voltage is almost the same. The size of the transistor of the present invention is 121, which is larger than that of the conventional transistor h FE 76. 4A and 4B show I C − when h FE is equal.
It is a V CE (collector-emitter voltage) characteristic. If h FE is equal, the Early voltage is 191V according to the invention,
The conventional transistor is 83 V, which is larger than that of the transistor of the present invention.

【0011】以上説明したように本発明は、バイポーラ
トランジスタのエミッタ部の単結晶半導体層と多結晶半
導体層の界面にフッ化炭素系の化合物薄膜を設けること
により、従来のバイポーラトランジスタに比べ、電流増
幅率が高くなるという効果を有する。しかも、コレクタ
−エミッタ間耐圧、アーリー電圧は従来と変わらない。
As described above, according to the present invention, by providing the fluorocarbon compound thin film at the interface between the single crystal semiconductor layer and the polycrystalline semiconductor layer of the emitter portion of the bipolar transistor, the current can be increased as compared with the conventional bipolar transistor. This has the effect of increasing the amplification factor. Moreover, the collector-emitter breakdown voltage and the early voltage are the same as before.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例のバイポーラトランジスタの
縦断面図、
FIG. 1 is a vertical sectional view of a bipolar transistor according to an embodiment of the present invention,

【図2】従来の多結晶シリコン層をエミッタに用いたバ
イポーラトランジスタの縦断面図、
FIG. 2 is a vertical cross-sectional view of a bipolar transistor using a conventional polycrystalline silicon layer as an emitter,

【図3】本発明のトランジスタと従来のトランジスタの
FE−IC 特性の比較であり、
FIG. 3 is a comparison of h FE −I C characteristics of a transistor of the present invention and a conventional transistor,

【図4】(a)及び(b)本発明のトランジスタと従来
のトランジスタのIC −VCE特性をそれぞれ示す。
4 (a) and (b) show I C -V CE characteristics of a transistor of the present invention and a conventional transistor, respectively.

【符号の説明】[Explanation of symbols]

101,201 P- 型シリコン基板 102,202 N+ 型埋込層 103,203 N- 型エピタキシャル層 104,204 P+ 型絶縁拡散層 105,205 素子間分離酸化膜 106,206 N+ 型コレクタ拡散層 107,207 P型ベース領域 108,208 N+ 型多結晶シリコン層 109,209 N+ 型拡散層 110,210 層間絶縁膜 111,211 金属配線 112 フッ化炭素化合物薄膜 212 自然酸化膜101, 201 P type silicon substrate 102, 202 N + type buried layer 103, 203 N type epitaxial layer 104, 204 P + type insulating diffusion layer 105, 205 Element isolation oxide film 106, 206 N + type collector diffusion layers 107 and 207 P-type base region 108, 208 N + -type polycrystalline silicon layer 109, 209 N + -type diffusion layer 110, 210 interlayer insulating film 111, 211 a metal wiring 112 fluorocarbon compound thin 212 natural oxide film

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 不純物を高濃度に添加した多結晶半導体
層をエミッタ層として有するバイポーラトランジスタに
おいて、単結晶半導体層と多結晶半導体層の界面にごく
薄いフッ化炭素系化合物薄膜を備えることを特徴とする
半導体装置。
1. A bipolar transistor having, as an emitter layer, a polycrystalline semiconductor layer doped with a high concentration of impurities, comprising a very thin fluorocarbon compound thin film at the interface between the single crystal semiconductor layer and the polycrystalline semiconductor layer. Semiconductor device.
JP27614691A 1991-09-30 1991-09-30 Semiconductor device Pending JPH0590278A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27614691A JPH0590278A (en) 1991-09-30 1991-09-30 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27614691A JPH0590278A (en) 1991-09-30 1991-09-30 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH0590278A true JPH0590278A (en) 1993-04-09

Family

ID=17565413

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27614691A Pending JPH0590278A (en) 1991-09-30 1991-09-30 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0590278A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6316795B1 (en) * 2000-04-03 2001-11-13 Hrl Laboratories, Llc Silicon-carbon emitter for silicon-germanium heterojunction bipolar transistors
US9461036B2 (en) 2014-04-21 2016-10-04 Renesas Electronics Corporation Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6316795B1 (en) * 2000-04-03 2001-11-13 Hrl Laboratories, Llc Silicon-carbon emitter for silicon-germanium heterojunction bipolar transistors
US9461036B2 (en) 2014-04-21 2016-10-04 Renesas Electronics Corporation Semiconductor device

Similar Documents

Publication Publication Date Title
JP3156436B2 (en) Heterojunction bipolar transistor
JP2611640B2 (en) Heterojunction bipolar transistor
JPH07147287A (en) Semiconductor device
JPH0291976A (en) Manufacturing method of vertical groove type MOS FET
JP3150376B2 (en) Fabrication of heterojunction bipolar transistor
JPH0590278A (en) Semiconductor device
CN1113416C (en) Semi-conductor device with longitudinal and transversal double-pole transistor
JP3129586B2 (en) Vertical bipolar transistor
JPH0521442A (en) Semiconductor device
US5315135A (en) Semiconductor device having I2 L gate with heterojunction
JP3186265B2 (en) Bipolar transistor and method of manufacturing the same
JPH01132160A (en) Semiconductor device
JP3082800B2 (en) Semiconductor device and manufacturing method thereof
RU2306632C1 (en) Thyristor triode-thyroid
JPH05109744A (en) Semiconductor device
JP3120441B2 (en) Semiconductor device and manufacturing method thereof
JPH05109745A (en) Semiconductor device
JP2827696B2 (en) Method for manufacturing semiconductor device
JPS6131630B2 (en)
JPH05109748A (en) Semiconductor device and manufacture of the same
JPH0454395B2 (en)
JPH05166820A (en) Semiconductor device and manufacture thereof
JPS62211953A (en) Bipolar transistor
JPH0399439A (en) Manufacturing method of semiconductor device
JPH01196868A (en) Semiconductor integrated circuit