JPH05335411A - Manufacture of pellet - Google Patents
Manufacture of pelletInfo
- Publication number
- JPH05335411A JPH05335411A JP14123792A JP14123792A JPH05335411A JP H05335411 A JPH05335411 A JP H05335411A JP 14123792 A JP14123792 A JP 14123792A JP 14123792 A JP14123792 A JP 14123792A JP H05335411 A JPH05335411 A JP H05335411A
- Authority
- JP
- Japan
- Prior art keywords
- silicon substrate
- pellet
- substrate
- grinding
- surface side
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000008188 pellet Substances 0.000 title claims abstract description 43
- 238000004519 manufacturing process Methods 0.000 title claims description 23
- 239000000758 substrate Substances 0.000 claims abstract description 52
- 238000000227 grinding Methods 0.000 claims abstract description 37
- 238000005247 gettering Methods 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 35
- 229910052710 silicon Inorganic materials 0.000 abstract description 35
- 239000010703 silicon Substances 0.000 abstract description 35
- 238000000034 method Methods 0.000 abstract description 26
- 230000008030 elimination Effects 0.000 abstract 1
- 238000003379 elimination reaction Methods 0.000 abstract 1
- 230000000717 retained effect Effects 0.000 abstract 1
- 230000001681 protective effect Effects 0.000 description 12
- 238000010586 diagram Methods 0.000 description 7
- 239000012535 impurity Substances 0.000 description 6
- 238000005336 cracking Methods 0.000 description 5
- 238000004140 cleaning Methods 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 239000006061 abrasive grain Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 229910003460 diamond Inorganic materials 0.000 description 2
- 239000010432 diamond Substances 0.000 description 2
- 241000370685 Arge Species 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 238000007730 finishing process Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000001556 precipitation Methods 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 229910052723 transition metal Inorganic materials 0.000 description 1
- 150000003624 transition metals Chemical class 0.000 description 1
Landscapes
- Grinding Of Cylindrical And Plane Surfaces (AREA)
- Dicing (AREA)
Abstract
Description
[発明の目的] [Object of the Invention]
【0001】[0001]
【産業上の利用分野】本発明は、例えばVLSI(Ve
ry Large Scale Integrated
Circuit)などの半導体装置に用いられるペレ
ットの製造方法に関する。BACKGROUND OF THE INVENTION The present invention relates to, for example, VLSI ( V e
ry L arge S cale I ntegrated
The present invention relates to a method for manufacturing pellets used for semiconductor devices such as circuits.
【0002】[0002]
【従来の技術】一般に、ダイナミックRAM(Rand
om Access Memory)など多くのVLS
Iは、接合リーク電流が低くならなければならない。狭
いベース幅のバイポーラトランジスタは不純物の析出に
敏感であり、エミッタとコレクタ間がショートした状態
となる(これは“パイプ効果”と呼ばれる。)。とく
に、遷移金属などの金属不純物は、このような効果を起
こしやすい。これらの元素は、格子間あるいは置換型に
位置し、発生再結合中心となる。これらの不純物の析出
相はシリサイドであり、電気的導電性をもつ。素子領域
からこれらの不純物を除去するために、「ゲッタリン
グ」処理とよばれる数多くの方法がある。すなわち、
「ゲッタリング」とは、素子領域から有害な不純物や欠
陥を取除く工程の一般的な名称である。それによって、
素子製造工程中に混入する不純物を吸収するシンクをも
ったシリコン基板を得ることができる。2. Description of the Related Art Generally, a dynamic RAM ( R and
om A ccess M emory) and many of the VLS
For I, the junction leakage current must be low. Narrow base width bipolar transistors are sensitive to the deposition of impurities, causing a short circuit between the emitter and collector (this is called the "pipe effect"). In particular, metal impurities such as transition metals are likely to cause such an effect. These elements are located in the interstitial or substitutional type, and serve as the generation recombination centers. The precipitation phase of these impurities is silicide and has electrical conductivity. There are many methods known as "gettering" processes for removing these impurities from the device region. That is,
"Gettering" is a general name for a process of removing harmful impurities and defects from an element region. Thereby,
It is possible to obtain a silicon substrate having a sink that absorbs impurities mixed during the device manufacturing process.
【0003】この「ゲッタリング」としては、欠陥を外
部から人為的に基板に付与するエクストリンシック・ゲ
ッタリング(Extrinsic Getterin
g)法と、基板内部に微小欠陥を導入するイントリンシ
ック・ゲッタリング(Intrinsic Gette
ring)法とがある。As the "gettering", extrinsic gettering for artificially imparting a defect to the substrate from the outside is known.
g) method and Intrinsic Gettering that introduces minute defects into the substrate.
ring method.
【0004】このうち、上記エクストリンシック・ゲッ
タリング法は、デバイス形成領域とは反対側の基板裏面
に格子歪を与えるものである。この格子歪の付与方法と
の一例を図6〜図8に示す。すなわち、この方法は、ま
ず基板AのパターンBを形成した表面側に、パターンB
を保護するための保護テープCを貼付する(図6参
照)。つぎに、厚さdだけ基板AのパターンBを形成し
ていない裏面側を研削加工により除去する(図7参
照)。さらに、ダイシング加工によりペレットの輪郭に
沿って溝を刻設する(図示せず。)Of these, the extrinsic gettering method applies a lattice strain to the back surface of the substrate opposite to the device forming region. 6 to 8 show an example of the method of applying the lattice strain. That is, in this method, the pattern B is first formed on the surface side of the substrate A on which the pattern B is formed.
A protective tape C for protecting the is attached (see FIG. 6). Next, the back surface side of the substrate A on which the pattern B is formed by the thickness d is removed by grinding (see FIG. 7). Further, a groove is formed along the contour of the pellet by dicing (not shown).
【0005】しかしながら、この裏面研削方法によれ
ば、ペレット厚さ200μm以下、基板の直径が6″以
上となると、裏面研削加工後、チャックより基板を着脱
する際に基板割れが発生したり、あるいは、ダイシング
加工時にハンドリングミスにより基板割れが発生してし
まう結果、歩留低下の一因となる欠点をもっている。However, according to this backside grinding method, when the pellet thickness is 200 μm or less and the substrate diameter is 6 ″ or more, substrate cracking occurs when the substrate is attached and detached from the chuck after the backside grinding process, or However, as a result of cracking of the substrate due to a handling error during the dicing process, it has a drawback of contributing to a decrease in yield.
【0006】[0006]
【発明が解決しようとする課題】以上のように、従来の
半導体装置用のペレットの製造方法において、ペレット
厚さ200μm以下、基板の直径が6″以上となると、
裏面研削加工後、チャックより基板を着脱する際に基板
割れが発生したり、あるいは、ダイシング加工時にハン
ドリングミスにより基板割れが発生してしまう結果、歩
留低下の一因となる欠点をもっている。As described above, in the conventional method for manufacturing a pellet for a semiconductor device, if the pellet thickness is 200 μm or less and the substrate diameter is 6 ″ or more,
After the back surface grinding process, when the substrate is detached from the chuck, a substrate crack occurs or a handling error occurs during the dicing process, resulting in a substrate crack. As a result, the yield is lowered.
【0007】この発明は、上記事情を顧慮してなされた
もので、上述した従来の半導体装置の製造方法がもって
いる技術的課題を解決し、歩留を改善できるペレットの
製造方法を提供することを目的とする。 [発明の構成]The present invention has been made in consideration of the above circumstances, and provides a pellet manufacturing method capable of solving the technical problems of the conventional semiconductor device manufacturing method described above and improving the yield. With the goal. [Constitution of Invention]
【0008】[0008]
【課題を解決するための手段】本発明のペレットの製造
方法は、あらかじめ溝入れ工程において、シリコン基板
の表面側にペレットの分割予定境界線に沿って溝を刻設
し、裏面研削工程によるシリコン基板の裏面の除去と同
時に溝を裏面に連通させ、各ペレットを分離させるよう
にしたものである。In the method of manufacturing a pellet according to the present invention, a groove is formed in advance on a front surface side of a silicon substrate along a dividing boundary of the pellet in a grooving step, and a silicon is formed by a back surface grinding step. At the same time as the removal of the back surface of the substrate, the groove is communicated with the back surface to separate the pellets.
【0009】[0009]
【作用】上記構成のペレットの製造方法によれば、従来
のように裏面研削工程後にハンドリングし直してダイシ
ングする必要がなくなり、ダイシングする際に発生する
シリコン基板の割れを防止することができる。このこと
は、シリコン基板が大口径である場合とか、裏面研削後
のシリコン基板の厚さが薄めである場合に顕著に奏効
し、裏面研削加工工程の歩留向上、作業能率改善に寄与
するところ大となる。According to the pellet manufacturing method having the above-described structure, it is not necessary to re-handle the wafer after the back surface grinding step and dicing as in the prior art, and it is possible to prevent cracking of the silicon substrate that occurs during dicing. This is remarkably effective when the silicon substrate has a large diameter or when the thickness of the silicon substrate after the backside grinding is thin, and contributes to the improvement in the yield of the backside grinding process and the improvement in work efficiency. It will be large.
【0010】[0010]
【実施例】以下、本発明の一実施例を図面を参照して詳
述する。An embodiment of the present invention will be described in detail below with reference to the drawings.
【0011】図1〜図5は、この実施例のペレットの製
造方法を示している。このペレットの製造方法は、例え
ば厚さ600μmのシリコン基板1のパターン2形成面
(シリコン基板1の表面)側にペレット3…の分割予定
境界線に沿って幅が例えば50μmの有底の溝4…をダ
イシング装置により刻設する溝入れ工程(図1参照)
と、溝入れ工程後にシリコン基板1の洗浄並びに乾燥処
理を行い溝入れ工程にて発生した研磨屑を除去する洗浄
工程と、この洗浄工程後にシリコン基板1のパターン2
形成面にこのパターン2を保護するための保護テープ5
を貼着する保護テープ貼着工程(図2参照)と、この保
護テープ貼着工程後にシリコン基板1の保護テープ5側
をチャックにより真空吸着しシリコン基板1の裏面を研
削する裏面研削工程(図3参照)と、この裏面研削工程
後にシリコン基板1の裏面側にマウンティング用テープ
6を貼着するマウンティング用テープ貼着工程(図4参
照)と、このマウンティング用テープ貼着工程後に前記
保護テープ5をシリコン基板1の表面側から剥離する保
護テープ剥離工程(図5参照)と、この保護テープ剥離
工程後にマウンティング用テープに一体的に付着してい
る各ペレット3…を図示せぬリードフレームの所定部位
に一個ずつマウンティング用テープから分離して載置す
るペレット固着工程(図示せず)とからなっている。し
かして、溝入れ工程は、ダイシング装置によりペレット
3…の寸法(例えば縦10mm,横10mm)に応じて
格子状に溝入れする。各溝4…の深さD1(例えば22
0μm)は、裏面研削工程後のシリコン基板1の厚さT
1(例えば200μm)よりも例えば20μm〜25μ
m程度大きくなるように設定する。一方、裏面研削工程
における除去量T2は、この除去量T2と、裏面研削工
程後のシリコン基板1の厚さT1との和が、加工前のシ
リコン基板1の厚さT3に等しくなるように例えば40
0μmに設定する。したがって、裏面研削工程後におい
ては、溝4…はシリコン基板1の裏面側に開口する。そ
の結果、各ペレット3…は分離し、切り離しが可能な状
態となる。さらに、上記溝入れ工程に用いられるダイシ
ング装置の砥石車は、例えばメッシュサイズが、#20
00/#3000のダイヤモンド砥粒を含有するもので
あって、例えば切込み量300μm,回転速度毎分50
00mでダイシングするようになっている。また、前記
裏面研削装置は、例えばメッシュサイズが、#1000
/#1500のダイヤモンド砥粒をビトリファイド結合
剤にて結合したカップ型砥石により平面研削するもので
ある。1 to 5 show a method of manufacturing pellets according to this embodiment. This pellet manufacturing method is, for example, a bottomed groove 4 having a width of, for example, 50 μm on the pattern 2 formation surface (surface of the silicon substrate 1) side of a silicon substrate 1 having a thickness of 600 μm along the dividing boundary line of the pellet 3. Grooving process for engraving ... with a dicing machine (see Fig. 1)
And a cleaning step of cleaning and drying the silicon substrate 1 after the grooving step to remove polishing dust generated in the grooving step, and a pattern 2 of the silicon substrate 1 after the cleaning step.
Protective tape 5 for protecting this pattern 2 on the formation surface
And a protective tape attaching step (see FIG. 2), and a back surface grinding step in which the protective tape 5 side of the silicon substrate 1 is vacuum-sucked by a chuck after the protective tape attaching step to grind the back surface of the silicon substrate 1 (FIG. 3)), a mounting tape attaching step (see FIG. 4) for attaching the mounting tape 6 to the back surface side of the silicon substrate 1 after the back surface grinding step, and the protective tape 5 after the mounting tape attaching step. Of the protective tape peeling step (see FIG. 5) for peeling the silicon from the front surface side of the silicon substrate 1 and the pellets 3 ... Attached integrally to the mounting tape after the protective tape peeling step are predetermined in a lead frame (not shown). It comprises a pellet fixing step (not shown) in which one piece is placed on each part separately from the mounting tape. Then, in the grooving step, grooving is performed in a grid pattern by a dicing device according to the dimensions of the pellets 3 ... Depth D1 of each groove 4 (for example, 22
0 μm) is the thickness T of the silicon substrate 1 after the back surface grinding step.
20 μm to 25 μ more than 1 (for example, 200 μm)
It is set to be larger by about m. On the other hand, the removal amount T2 in the back surface grinding step is, for example, such that the sum of the removal amount T2 and the thickness T1 of the silicon substrate 1 after the back surface grinding step becomes equal to the thickness T3 of the silicon substrate 1 before processing. 40
Set to 0 μm. Therefore, after the back surface grinding step, the grooves 4 ... Open to the back surface side of the silicon substrate 1. As a result, the pellets 3 ... Are separated and are ready to be separated. Further, the grinding wheel of the dicing device used in the grooving step has, for example, a mesh size of # 20.
00 / # 3000 diamond abrasive grains, for example, cutting depth of 300 μm, rotation speed of 50 / min
Dicing is done at 00m. In addition, the back surface grinding apparatus has a mesh size of # 1000, for example.
/ # 1500 diamond abrasive grains are surface-ground by a cup-type grindstone bonded with a vitrified binder.
【0012】以上のように、この実施例のペレットの製
造方法によれば、あらかじめ溝入れ工程において、シリ
コン基板1の表面側にペレット3…の分割予定境界線に
沿って溝4…を刻設し、裏面研削工程によるシリコン基
板1の裏面の除去と同時に溝4…を裏面に連通させ、各
ペレット3…を分離させるようにしたので、従来のよう
に裏面研削工程後にハンドリングし直してダイシングす
る必要がなくなる。したがって、この実施例のペレット
の製造方法においては、このダイシングする際に発生す
るシリコン基板1の割れを防止することができる。この
ことは、シリコン基板1が大口径である場合とか、裏面
研削後のシリコン基板1の厚さが薄めである場合に顕著
に奏効する。さらに、ダイシング装置による溝入れの切
込み精度は従来に比べ悪くてもよい。さらにまた、裏面
研削の仕上げ工程では、ペレット状で研削するため、研
削液の回り込みがよくなり、研削性能が改善される。こ
れらの諸効果が相俟って、裏面研削加工工程の歩留向
上、作業能率改善に寄与するところ大である。As described above, according to the pellet manufacturing method of this embodiment, in the grooving step, the grooves 4 ... Are engraved on the surface side of the silicon substrate 1 along the planned dividing line of the pellets 3 ... At the same time as the removal of the back surface of the silicon substrate 1 by the back surface grinding step, the grooves 4 ... Are communicated with the back surface to separate the pellets 3 ... There is no need. Therefore, in the pellet manufacturing method of this embodiment, it is possible to prevent cracking of the silicon substrate 1 that occurs during this dicing. This is remarkably effective when the silicon substrate 1 has a large diameter or when the thickness of the silicon substrate 1 after grinding the back surface is thin. Further, the cutting precision of the grooving by the dicing device may be worse than the conventional one. Furthermore, in the finishing process of backside grinding, since grinding is performed in pellet form, the wraparound of the grinding liquid is improved and the grinding performance is improved. Together, these various effects contribute to improving the yield and work efficiency of the backside grinding process.
【0013】[0013]
【発明の効果】本発明のペレットの製造方法によれば、
あらかじめ溝入れ工程において、シリコン基板の表面側
にペレットの分割予定境界線に沿って溝を刻設し、裏面
研削工程によるシリコン基板の裏面の除去と同時に溝を
裏面に連通させ、各ペレットを分離させるようにしたの
で、従来のように裏面研削工程後にハンドリングし直し
てダイシングする必要がなくなる。したがって、この発
明のペレットの製造方法においては、このダイシングす
る際に発生するシリコン基板の割れを防止することがで
きる。このことは、シリコン基板が大口径である場合と
か、裏面研削後のシリコン基板の厚さが薄めである場合
に顕著に奏効し、その結果、裏面研削加工工程の歩留向
上、作業能率改善に寄与するところ大となる。According to the pellet manufacturing method of the present invention,
In the grooving process in advance, grooves are engraved on the front surface side of the silicon substrate along the planned dividing line of the pellets, and at the same time the back surface of the silicon substrate is removed by the back surface grinding step, the grooves are communicated with the back surface and each pellet is separated. Since this is done, there is no need to perform re-handling and dicing after the back surface grinding step as in the conventional case. Therefore, in the pellet manufacturing method of the present invention, it is possible to prevent the silicon substrate from cracking during dicing. This is remarkably effective when the silicon substrate has a large diameter or when the thickness of the silicon substrate after the backside grinding is thin, and as a result, it improves the yield and the work efficiency of the backside grinding process. The contribution will be large.
【図1】本発明の一実施例のペレットの製造方法の溝入
れ工程を示す図である。FIG. 1 is a diagram showing a grooving step in a method for manufacturing pellets according to an embodiment of the present invention.
【図2】本発明の一実施例のペレットの製造方法の保護
テープ貼着工程を示す図である。FIG. 2 is a diagram showing a protective tape attaching step of the pellet manufacturing method according to the embodiment of the present invention.
【図3】本発明の一実施例のペレットの製造方法の裏面
研削工程を示す図である。FIG. 3 is a diagram showing a back surface grinding step of the pellet manufacturing method according to the embodiment of the present invention.
【図4】本発明の一実施例のペレットの製造方法のマウ
ンティング用テープ貼着工程を示す図である。FIG. 4 is a diagram showing a step of attaching a mounting tape for a pellet manufacturing method according to an embodiment of the present invention.
【図5】本発明の一実施例のペレットの製造方法の保護
テープ剥離工程を示す図である。FIG. 5 is a diagram showing a protective tape peeling process of the pellet manufacturing method according to the embodiment of the present invention.
【図6】従来のペレットの製造方法の保護テープ貼着工
程を示す図である。FIG. 6 is a diagram showing a protective tape attaching step of a conventional pellet manufacturing method.
【図7】従来のペレットの製造方法の裏面研削工程を示
す図である。FIG. 7 is a diagram showing a backside grinding step of a conventional pellet manufacturing method.
1:シリコン基板,3:ペレット,4:溝,5:保護テ
ープ。1: silicon substrate, 3: pellet, 4: groove, 5: protective tape.
Claims (3)
有底の溝を形成する溝入れ工程と、この溝入れ工程後に
上記基板の表面側を保持し上記基板の裏面側を少なくと
も上記溝の底部が開口し上記ペレットが形成されるまで
研削する裏面研削工程とを具備することを特徴とするペ
レットの製造方法。1. A grooving step of forming a bottomed groove in accordance with a pellet dividing schedule on a front surface side of the substrate, and a front surface side of the substrate is held after the grooving step, and a back surface side of the substrate is at least a bottom portion of the groove. And a backside grinding step of grinding until the pellets are formed.
25μmであることを特徴とする請求項1記載のペレッ
トの製造方法。2. A margin for grinding a bottomed groove is 20 to 20.
It is 25 micrometers, The manufacturing method of the pellet of Claim 1 characterized by the above-mentioned.
グのための格子歪が形成されることを特徴とする請求項
1記載のペレットの製造方法。3. The method for producing pellets according to claim 1, wherein a lattice strain for gettering is formed by grinding on the back surface side of the substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14123792A JPH05335411A (en) | 1992-06-02 | 1992-06-02 | Manufacture of pellet |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14123792A JPH05335411A (en) | 1992-06-02 | 1992-06-02 | Manufacture of pellet |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH05335411A true JPH05335411A (en) | 1993-12-17 |
Family
ID=15287297
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14123792A Pending JPH05335411A (en) | 1992-06-02 | 1992-06-02 | Manufacture of pellet |
Country Status (1)
Country | Link |
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JP (1) | JPH05335411A (en) |
Cited By (26)
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EP0982762A2 (en) | 1998-08-18 | 2000-03-01 | Lintec Corporation | Wafer transfer apparatus |
EP1041620A2 (en) * | 1999-04-02 | 2000-10-04 | Interuniversitair Microelektronica Centrum Vzw | Method of transferring ultrathin substrates and application of the method to the manufacture of a multi-layer thin film device |
JP2002076096A (en) * | 2000-08-29 | 2002-03-15 | Disco Abrasive Syst Ltd | Method for picking up semiconductor element |
US6465330B1 (en) | 1998-08-18 | 2002-10-15 | Lintec Corporation | Method for grinding a wafer back |
US6558975B2 (en) | 2000-08-31 | 2003-05-06 | Lintec Corporation | Process for producing semiconductor device |
US6613694B2 (en) | 1999-04-09 | 2003-09-02 | Oki Electric Industry Co., Ltd. | Semiconductor device, manufacturing method for semiconductor device and mounting method for the same |
US6656819B1 (en) | 1999-11-30 | 2003-12-02 | Lintec Corporation | Process for producing semiconductor device |
JP2004331743A (en) * | 2003-05-02 | 2004-11-25 | Lintec Corp | Adhesive sheet and method of using the same |
US7141300B2 (en) | 2001-06-27 | 2006-11-28 | Nitto Denko Corporation | Adhesive sheet for dicing |
US7201969B2 (en) | 2002-03-27 | 2007-04-10 | Mitsui Chemicals, Inc. | Pressure-sensitive adhesive film for the surface protection of semiconductor wafers and method for protection of semiconductor wafers with the film |
US7235425B2 (en) | 2004-02-24 | 2007-06-26 | Kabushiki Kaisha Toshiba | Semiconductor device and fabrication method for the same |
US7351645B2 (en) | 2004-06-02 | 2008-04-01 | Lintec Corporation | Pressure sensitive adhesive sheet for use in semiconductor working and method for producing semiconductor chip |
US7452752B2 (en) | 2003-11-27 | 2008-11-18 | 3M Innovative Properties Company | Production method of semiconductor chip |
US7534498B2 (en) | 2002-06-03 | 2009-05-19 | 3M Innovative Properties Company | Laminate body, method, and apparatus for manufacturing ultrathin substrate using the laminate body |
US7875501B2 (en) | 2006-03-15 | 2011-01-25 | Shin-Etsu Polymer Co., Ltd. | Holding jig, semiconductor wafer grinding method, semiconductor wafer protecting structure and semiconductor wafer grinding method and semiconductor chip fabrication method using the structure |
US7935424B2 (en) | 2006-04-06 | 2011-05-03 | Lintec Corporation | Adhesive sheet |
US8003441B2 (en) | 2007-07-23 | 2011-08-23 | Lintec Corporation | Manufacturing method of semiconductor device |
US8008129B2 (en) | 1999-07-01 | 2011-08-30 | Oki Semiconductor Co., Ltd. | Method of making semiconductor device packaged by sealing resin member |
US8021964B2 (en) | 2006-06-27 | 2011-09-20 | 3M Innovative Properties Company | Method of producing segmented chips |
US8038839B2 (en) | 2002-06-03 | 2011-10-18 | 3M Innovative Properties Company | Laminate body, method, and apparatus for manufacturing ultrathin substrate using the laminate body |
US8304920B2 (en) | 2008-03-31 | 2012-11-06 | Lintec Corporation | Energy ray-curable polymer, an energy ray-curable adhesive composition, an adhesive sheet and a processing method of a semiconductor wafer |
CN104508815A (en) * | 2012-07-31 | 2015-04-08 | 索泰克公司 | Method of fabricating semiconductor structures using laser lift-off process and related semiconductor structures |
JP2016012595A (en) * | 2014-06-27 | 2016-01-21 | 株式会社ディスコ | Processing apparatus |
JP2018076517A (en) * | 2017-12-01 | 2018-05-17 | 三井化学株式会社 | Dicing film, surface protective film for semiconductor, and method of manufacturing semiconductor device |
US10328547B2 (en) | 2016-10-12 | 2019-06-25 | Disco Corporation | Grinding apparatus and wafer processing method |
CN113113298A (en) * | 2021-04-09 | 2021-07-13 | 绍兴同芯成集成电路有限公司 | Wafer back metal deposition process |
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1992
- 1992-06-02 JP JP14123792A patent/JPH05335411A/en active Pending
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US6238515B1 (en) | 1998-08-18 | 2001-05-29 | Lintec Corporation | Wafer transfer apparatus |
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US6465330B1 (en) | 1998-08-18 | 2002-10-15 | Lintec Corporation | Method for grinding a wafer back |
EP0982762A2 (en) | 1998-08-18 | 2000-03-01 | Lintec Corporation | Wafer transfer apparatus |
EP1041620A2 (en) * | 1999-04-02 | 2000-10-04 | Interuniversitair Microelektronica Centrum Vzw | Method of transferring ultrathin substrates and application of the method to the manufacture of a multi-layer thin film device |
US7314779B2 (en) | 1999-04-09 | 2008-01-01 | Oki Electric Industry Co., Ltd. | Semiconductor device, manufacturing method for semiconductor device and mounting method for the same |
US6613694B2 (en) | 1999-04-09 | 2003-09-02 | Oki Electric Industry Co., Ltd. | Semiconductor device, manufacturing method for semiconductor device and mounting method for the same |
US6680535B2 (en) | 1999-04-09 | 2004-01-20 | Oki Electric Industry Co., Ltd. | Semiconductor device, manufacturing method for semiconductor device and mounting method for the same |
US8486728B2 (en) | 1999-07-01 | 2013-07-16 | Oki Semiconductor Co., Ltd. | Semiconductor device including semiconductor elements mounted on base plate |
US8008129B2 (en) | 1999-07-01 | 2011-08-30 | Oki Semiconductor Co., Ltd. | Method of making semiconductor device packaged by sealing resin member |
US6656819B1 (en) | 1999-11-30 | 2003-12-02 | Lintec Corporation | Process for producing semiconductor device |
JP2002076096A (en) * | 2000-08-29 | 2002-03-15 | Disco Abrasive Syst Ltd | Method for picking up semiconductor element |
US6558975B2 (en) | 2000-08-31 | 2003-05-06 | Lintec Corporation | Process for producing semiconductor device |
US7141300B2 (en) | 2001-06-27 | 2006-11-28 | Nitto Denko Corporation | Adhesive sheet for dicing |
US7201969B2 (en) | 2002-03-27 | 2007-04-10 | Mitsui Chemicals, Inc. | Pressure-sensitive adhesive film for the surface protection of semiconductor wafers and method for protection of semiconductor wafers with the film |
US7534498B2 (en) | 2002-06-03 | 2009-05-19 | 3M Innovative Properties Company | Laminate body, method, and apparatus for manufacturing ultrathin substrate using the laminate body |
US8800631B2 (en) | 2002-06-03 | 2014-08-12 | 3M Innovative Properties Company | Laminate body, method, and apparatus for manufacturing ultrathin substrate using the laminate body |
US7988807B2 (en) | 2002-06-03 | 2011-08-02 | 3M Innovative Properties Company | Laminate body, method, and apparatus for manufacturing ultrathin substrate using the laminate body |
US8789569B2 (en) | 2002-06-03 | 2014-07-29 | 3M Innovative Properties Company | Apparatus for manufacturing ultrathin substrate using a laminate body |
US8038839B2 (en) | 2002-06-03 | 2011-10-18 | 3M Innovative Properties Company | Laminate body, method, and apparatus for manufacturing ultrathin substrate using the laminate body |
JP2004331743A (en) * | 2003-05-02 | 2004-11-25 | Lintec Corp | Adhesive sheet and method of using the same |
US7452752B2 (en) | 2003-11-27 | 2008-11-18 | 3M Innovative Properties Company | Production method of semiconductor chip |
US7235425B2 (en) | 2004-02-24 | 2007-06-26 | Kabushiki Kaisha Toshiba | Semiconductor device and fabrication method for the same |
US7351645B2 (en) | 2004-06-02 | 2008-04-01 | Lintec Corporation | Pressure sensitive adhesive sheet for use in semiconductor working and method for producing semiconductor chip |
US7875501B2 (en) | 2006-03-15 | 2011-01-25 | Shin-Etsu Polymer Co., Ltd. | Holding jig, semiconductor wafer grinding method, semiconductor wafer protecting structure and semiconductor wafer grinding method and semiconductor chip fabrication method using the structure |
US8212345B2 (en) | 2006-03-15 | 2012-07-03 | Shin-Etsu Polymer Co., Ltd. | Holding jig, semiconductor wafer grinding method, semiconductor wafer protecting structure and semiconductor wafer grinding method and semiconductor chip fabrication method using the structure |
KR101426572B1 (en) * | 2006-03-15 | 2014-08-05 | 신에츠 폴리머 가부시키가이샤 | Holding jig, method of grinding semiconductor wafers |
US8178198B2 (en) | 2006-04-06 | 2012-05-15 | Lintec Corporation | Adhesive sheet |
US7935424B2 (en) | 2006-04-06 | 2011-05-03 | Lintec Corporation | Adhesive sheet |
US8021964B2 (en) | 2006-06-27 | 2011-09-20 | 3M Innovative Properties Company | Method of producing segmented chips |
US8003441B2 (en) | 2007-07-23 | 2011-08-23 | Lintec Corporation | Manufacturing method of semiconductor device |
US8304920B2 (en) | 2008-03-31 | 2012-11-06 | Lintec Corporation | Energy ray-curable polymer, an energy ray-curable adhesive composition, an adhesive sheet and a processing method of a semiconductor wafer |
CN104508815A (en) * | 2012-07-31 | 2015-04-08 | 索泰克公司 | Method of fabricating semiconductor structures using laser lift-off process and related semiconductor structures |
JP2016012595A (en) * | 2014-06-27 | 2016-01-21 | 株式会社ディスコ | Processing apparatus |
US10328547B2 (en) | 2016-10-12 | 2019-06-25 | Disco Corporation | Grinding apparatus and wafer processing method |
JP2018076517A (en) * | 2017-12-01 | 2018-05-17 | 三井化学株式会社 | Dicing film, surface protective film for semiconductor, and method of manufacturing semiconductor device |
CN113113298A (en) * | 2021-04-09 | 2021-07-13 | 绍兴同芯成集成电路有限公司 | Wafer back metal deposition process |
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