JPH05300370A - Picture processing unit - Google Patents

Abstract

PURPOSE:To suppress dispersion between chips by easily setting an output signal level between chips, that is, an output picture element signal level from each chip to an object value in the picture processing unit. CONSTITUTION:A signal from a picture element section 10 in which plural photodetectors are arranged in parallel is selected sequentially at an analog switch section 12 based on a control signal from a shift register 14 and outputted as a serial signal. A resistor array 18 comprising parallel connection of plural resistors is connected to an output terminal of an operational amplifier 16, the amplification factor of the operational amplifier 16 is adjusted by connecting a desired resistor to a GND terminal by wire bonding to set an output signal level to an object value.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus, and more particularly to an image processing apparatus capable of adjusting the output level of analog pixel signals.

[0002]

2. Description of the Related Art Conventionally, an image processing apparatus in which a plurality of light receiving elements such as phototransistors and photodiodes are arranged in parallel has been used for FAX machines and the like. In such an image processing device, a pixel unit in which light receiving elements are normally arranged in parallel, an analog switch unit for sequentially switching and outputting signals from the pixel unit, and a control for controlling opening / closing of the analog switch. A shift register unit for supplying signals is formed on one chip.

In order to enable accurate reading in the image processing apparatus, when the same amount of light is received, the signal level from each light receiving element in one chip and the signal level output from each chip (output between chips) The signal levels must be almost the same, and since one chip is usually made from one wafer, it is not easy to reduce the variation between chips.

Conventionally, in order to reduce the variation between the chips, the image processing apparatus is configured by ranking the chips in accordance with the amount of variation between the chips, selecting chips in the same rank and mounting them on a substrate. It was

[0005]

As described above, in the related art, it is difficult to improve the yield because a chip selection process is required to reduce the variation in the output signal level between chips. This has been one of the causes of increasing the cost of the sensor chip.

The present invention has been made in view of the above problems of the prior art, and an object thereof is to easily set an output signal level between chips, that is, an output pixel signal level from each chip to a target value. An object of the present invention is to provide a high cost performance image processing apparatus in which variations between chips are suppressed.

[0007]

In order to achieve the above object, an image processing apparatus according to a first aspect of the present invention is arranged such that a plurality of light receiving elements are arranged side by side in a row on a single substrate. However, the output amplification factor from the pixel unit is changed for each pixel unit.

Further, in order to achieve the above object, a second aspect is provided.
An image processing apparatus according to the above-mentioned image processing apparatus, wherein a signal from a pixel portion having a plurality of light receiving elements arranged in parallel is switched and output, and the output signal is amplified by an amplifier circuit and output as a pixel signal The amplification factor of the amplification circuit is changed by connecting one of the resistances of the resistance array in which the resistances are connected in parallel to the amplification circuit.

[0009]

As described above, the image processing apparatus of the present invention adjusts the amplification factor of the amplifier circuit by using the resistor array so that the output pixel signal level from each pixel section becomes the target value.

That is, one of the resistors in the resistor array is grounded and a desired resistor is connected to the amplifier circuit to adjust the amplification factor for each pixel portion.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the image processing apparatus according to the present invention will be described below with reference to the drawings.

FIG. 1 shows a circuit diagram of a sensor chip of the image processing apparatus in this embodiment. A plurality of light receiving elements (photodiodes and phototransistors) are arranged in parallel in the pixel section 10, and a voltage Vdd is applied to these light receiving elements. When light corresponding to the light and shade of a document enters each light receiving element, each light receiving element outputs a voltage according to the amount of incident light. Then, the signal from the pixel unit 10 is input to the analog switch unit 12. The analog switch section 12 is composed of a plurality of transistors connected to each light receiving element. By sequentially controlling ON / OFF of these transistors, the signal from each light receiving element is switched to be a serial output. The ON / OFF control of the transistor is performed by the shift register 14. That is, by inputting the control signal SI and the clock CLK to the shift register 14 and supplying the control signal SI to the base of the transistor, each transistor is turned ON / OFF in order.

The output signal from the analog switch section 12 is input to a non-inverting amplifier circuit including an OP amplifier 16 built in the chip. Here, what is characteristic of this embodiment is that the resistor array 18 for adjusting the amplification factor in this amplifier circuit is connected to the output terminal of the OP amplifier 16. The resistor array 18 is configured by connecting a plurality of (four in the embodiment) resistors having different resistance values in parallel. Therefore, if any one of these resistor terminals S1 to S4 (wire bonding terminals) is selected and grounded, the selected resistor in the resistor array 18 and the OP amplifier 1 are connected.
Since the voltage level determined by the resistance R similarly connected to the output terminal of 6 is input to the inverting input terminal of the OP amplifier 16, the amplification factor of the OP amplifier 16 is adjusted to a desired value by changing the selection resistance. can do.

FIG. 2 shows a state where the sensor chip shown in FIG. 1 is mounted on a substrate, and FIG. 3 shows the state shown in FIG.
The circuit diagram of the mounting state of is shown. As the input terminal of the chip, S supplied to the shift register 14 described above.
I, CLK, and Vdd supplied to the pixel unit 10,
The output terminals include the output pixel signal AO from the OP amplifier 16 and the terminals S1 to S4 of the resistor array 18. In this embodiment, the terminal S1 of each resistor of the resistor array 18 is used.
.About.S4 are all wire-bonded to the wire-bonding terminals 20 on the substrate side.

In this mounted state, when a predetermined amount of light is incident on the light receiving element, each chip outputs a pixel signal corresponding to this amount of light. As described above, each chip is formed of a different wafer. Therefore, the output level usually varies. Therefore, the wire bonding terminal 20 to which the terminals S1 to S4 of the resistor array 18 are connected and the GND terminal 22 are sequentially temporarily connected (probing), and the fluctuation of the output level at that time is detected. And
The terminal 20 whose output level is the closest to the target value is selected, and the terminal 20 and the GND terminal 22 are wire-bonded. In FIG. 2, the broken line shows the state of wire bonding, and in FIG. 3, the terminals S1 and S3 are G
A circuit configuration connected to the ND level is shown. By performing such a wire bonding process for all the chips, the output pixel levels from each chip are all set in the vicinity of the target value, and variations can be reduced.

As described above, in this embodiment, since the resistor array is connected to the amplifier circuit and one of the resistors in the resistor array can be selected in the wire bonding process to change the amplification factor, the chip It is possible to eliminate the sorting step. In addition, since the probing can be performed using the wire bonding terminal 20 during probing, the amplification factor can be easily adjusted.

In the present embodiment, the resistor array 18 is composed of four different resistors, but the present invention is not limited to this, and resistors having the same resistance value may be used, and the same. It goes without saying that the number of resistors can be appropriately increased or decreased (the number of resistors can be increased or decreased according to the required precision of amplification factor adjustment).

[0018]

As described above, according to the image processing apparatus of the present invention, there is provided a high cost performance image processing apparatus in which the output signal level between chips, that is, the output pixel signal level from each chip does not vary. There is an effect to be obtained.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a sensor chip according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram showing a state where the sensor chip according to the embodiment is mounted on a substrate.

FIG. 3 is a circuit diagram of the mounting state of FIG.

[Explanation of symbols]

 10 Pixel Section 12 Analog Switch Section 14 Shift Register 16 OP Amplifier 18 Resistance Array

Claims (2)

[Claims] 1. A pixel unit formed by arranging a plurality of light receiving elements in parallel is arranged in one row on the same substrate, and an output amplification factor from the pixel unit is changed for each pixel unit. Image processing device. 2. An image processing apparatus for switching and outputting a signal from a pixel portion formed by arranging a plurality of light receiving elements in parallel, amplifying the output signal by an amplifier circuit, and outputting the pixel signal as a pixel signal. An image processing apparatus characterized in that the amplification factor of the amplifier circuit is changed by connecting one of the resistors of a resistor array formed by connecting in parallel to the amplifier circuit.