JPH05291265A - Forming method for rear surface gettering layer of wafer - Google Patents

Abstract

PURPOSE:To improve a gettering effect and to simplify the step of forming a gettering layer by forming the deep layer at a rear surface side of a wafer. CONSTITUTION:In a first step, a plurality of holes 13 or grooves are formed on a rear surface 12 of a wafer 11, and in a second step, gettering layers 14 are formed on a front layer of a wall of each hole 13 or a front layer of a wall side of each groove and a front layer of a rear surface 12 side of the wafer 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a getter layer on the back surface of a wafer.

[0002]

2. Description of the Related Art Usually, in order to form a semiconductor element having excellent electrical characteristics on a silicon wafer,
Gettering is performed to remove impurities such as heavy metals and crystal defects contained in the silicon wafer from the semiconductor element formation region. An example of a step of forming a getter layer for performing gettering will be described. On the back surface of the flattened silicon wafer, for example, phosphorus (P) is formed by a thermal diffusion method.
To introduce. Then, a ring getter layer is formed. A normal thermal diffusion method is performed by exposing a silicon wafer to a gas atmosphere containing phosphorus at a temperature of about 1000 ° C to 1200 ° C.

[0003]

However, the above method cannot form a ringetter layer having a sufficient depth. That is, the solid solution limit of impurities in the silicon wafer (3 × 10 ²⁰ cm ⁻³ to 2 × 10 ²¹ at about 1200 ° C.)
(cm ^-3 ) and the diffusion depth are proportional to the 1/2 power of the time, it is possible to increase the depth of the ringetter layer by raising the temperature during the diffusion process, but the deformation of the silicon wafer In order to prevent this, it is necessary to perform the diffusion process at a temperature lower than the melting point of the silicon wafer. Therefore, the diffusion temperature is limited to about 1200 ° C., and it is difficult to make the diffusion depth sufficiently deep. It is possible to increase the diffusion depth by increasing the diffusion time,
Since the diffusion process takes a long time, the throughput is significantly reduced.

An object of the present invention is to provide a method for forming a wafer backside getter layer having a sufficient depth and excellent throughput.

[0005]

The present invention is a method made to achieve the above object. That is, in the first step, a plurality of holes or grooves are formed on the back surface side of the wafer, and in the second step, the getter is formed on the wall surface side of each hole or the wall surface side of each groove and the back surface side of the wafer. Form the layers.

[0006]

In the above method, after forming the plurality of holes or the plurality of grooves on the back surface side of the wafer, the getter layer is formed on the wall surface side of each hole or the wall surface side of each groove and the back surface side of the wafer. The volume of the getter layer increases. Therefore, the gettering ability is enhanced. Further, a getter layer is formed at a deep position on the back surface side of the wafer. Therefore, the position of the getter layer is
Since the surface of the wafer on which the semiconductor device is formed is approached, gettering on the surface of the wafer is sufficiently performed.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described with reference to the forming process diagram shown in FIG. First, before performing the first step, for example, a silicon oxide film (not shown) is formed on the front surface side of the wafer (11) as a film for preventing impurities from being introduced. After that, the first step shown in FIG. 1A is performed. In this step, a plurality of holes 13 are formed on the back surface 12 side of the wafer 11 by ordinary photolithography and etching. Each hole 13 is formed so that its bottom reaches near the surface of the wafer 11. And the depth thereof is at least about 100 μm. Furthermore, the diameter of each hole 13 is 1 μm
It is formed to have a thickness of about 10 μm, and its cross-sectional shape does not matter.

Next, the second step shown in FIG. 1B is performed. In this step, the getter layer 14 is formed by introducing impurities into the surface layer on the wall surface side of each hole 13 and the surface layer on the back surface 12 side of the wafer 11 by a normal impurity introduction method. As the impurity introduction method, for example, a thermal diffusion method is adopted. For example, phosphorus (P) is used as the impurities to be introduced.

An example of a method of introducing phosphorus (P) as an impurity into the wafer 11 by the usual thermal diffusion method will be specifically described. First flow rate and 3dm ³ / min ~7dm ³ / min approximately nitrogen (N ₂₎ flow rate of 0.5 dm ³ / min 1.0
The gas mixed with oxygen (O ₂ ) of about dm ³ / min is 90
The wafer 11 is heated to about 0 ° C. to 1200 ° C., and the wafer 11 is left in that atmosphere for about 1 minute to 3 minutes. Then the flow rate is 3d
m ³ / min to 7 dm ³ / min nitrogen (N ₂ ) and a flow rate of 0.5 dm ³ / min to 1.0 dm ³ / min oxygen (O ₂ ) and a flow rate of 0.5 dm ³ / min to 1 A gas mixed with phosphorus trichloride oxide (POCl ₃ ) of about 0.0 dm ³ / min is heated to about 900 ° C. to 1200 ° C., and the wafer 11 is left in that atmosphere for 20 to 40 minutes. Subsequently, the wafer 11 is left for 20 to 40 minutes in an atmosphere in which nitrogen (N ₂ ) having a flow rate of about ³ dm ³ / min to 7 dm ³ / min is heated to about 900 ° C. to 1200 ° C. The numerical value regarding the thermal diffusion treatment is not limited to the above value, and is appropriately determined by the depth of the getter layer 14 to be formed.

In the second step, the surface layer on the back surface side of the wafer 11 and the holes 13 are formed by the oxygen contained in the mixed gas.
And the surface layer of is oxidized. And a thin silicon oxide film 15
Is formed. For this reason, each hole 13 is formed in the silicon oxide film 1
The flow rate of oxygen is adjusted so as not to fill up with 5.

In the method described in the first embodiment, the plurality of holes 13 are formed on the back surface 12 side of the wafer 11, and then the getter layer 14 is formed on the wall surface side of each hole 13 and the back surface 12 side of the wafer 11. Since it is formed, the volume of the getter layer 14 increases. For example, when the holes 13 having a diameter of 1 μm and a depth of 100 μm are formed at a rate of 1.3 × 10 ⁴ places / mm ² , the getter layer 1 is compared with the case where the holes 13 are not formed.
The volume of 4 increases approximately twice. Therefore, the gettering ability is approximately doubled. Also, the back surface 1 of the wafer 11
The getter layer 14 is formed at a deep position on the second side. For this reason, the position of the getter layer 14 approaches the front surface side of the wafer 11 forming the semiconductor device, and thus the gettering on the front surface side of the wafer 11 is sufficiently performed.

A plurality of holes 13 are formed in the wafer 11 after the above processing. Therefore, the mechanical strength of the wafer 11 is reduced. Therefore, the back surface strengthening step described with reference to FIG. 2 is performed. First, as shown in (1) of FIG. 2, a thin silicon oxide film 15 (a portion indicated by a chain double-dashed line) formed on the inside of each hole 13 and the back surface 12 of the wafer 11 is removed by, for example, normal wet etching. Remove.

Thereafter, as shown in FIG. 2B, epitaxial silicon is grown in the inside of each hole 13 and on the back surface 12 of the wafer 11 by a normal epitaxial growth method to form an epitaxial silicon layer 16. Then, each hole 13 is filled with the epitaxial silicon layer 16. As described above, by filling each hole 13 with the epitaxial silicon layer 16, a crack does not propagate from each hole 13. Therefore, the mechanical strength of the wafer 11 can be increased. In addition, since the coefficient of thermal expansion of the epitaxial silicon layer 16 and the coefficient of thermal expansion of the wafer 11 are substantially the same, the stress generated between the epitaxial silicon layer 16 and the wafer 11 when the wafer 11 is heat-treated is minimized. It is possible to limit it.

Then, in order to flatten the back surface 12 of the wafer 11, as shown in (3) of FIG. 2, the portion indicated by the chain double-dashed line of the epitaxial silicon layer 16 may be removed by etching back or polishing. Then, the epitaxial silicon layer 16 is left inside each hole 13.

Next, a second embodiment will be described with reference to the forming process diagram shown in FIG. In the figure, the same components as those described in the first embodiment are designated by the same reference numerals. First, before performing the first step, for example, a silicon oxide film (not shown) is formed as a film for preventing impurities from being introduced into the front surface side of the wafer 11.

Thereafter, the first step shown in FIG. 3A is performed. In this step, a plurality of grooves 2 are formed on the back surface 12 side of the wafer 11 by ordinary photolithography and etching.
1 is formed. Each groove 21 is formed to a depth that does not significantly impair the strength of the wafer 11 and its bottom reaches near the surface of the wafer 11. For example, the depth of the groove 21 is at least about 100 μm. The width of each groove 21 is formed to be about 1 μm to 10 μm, and its cross-sectional shape does not matter.

Next, the second step shown in FIG. 3B is performed. In this step, in the same manner as described in the first embodiment, impurities are introduced into the surface layer on the wall surface side of each groove 21 and the surface layer on the back surface 12 side of the wafer 11 by the usual impurity introduction method. The getter layer 14 is formed. The above-mentioned impurity introduction method is the same as that explained in the first embodiment, and therefore its explanation is omitted here.

Thereafter, in the same manner as described above with reference to FIG. 2, the strength of the wafer 11 can be maintained by embedding epitaxial silicon (not shown) in each groove 21.

In the second embodiment, each groove 21 is formed by photolithography and etching, but each groove 21 can be formed by cutting.
For the cutting work, for example, a cutting tool having a very sharp edge is used. An example of the byte will be described with reference to FIG. As shown in the figure, the cutting tool 31 includes a blade 32 and this blade 3
It consists of a shank 33 for mounting 2. The blade 32 is formed of, for example, single crystal diamond or boron nitride (CBN) having a cubic zinc blende structure. And on the blade 32,
A cutting edge 34 designed to have a cutting edge tip radius R of several μm, an effective cutting edge length L of about 200 μm, and a cutting width of about 20 μm.
Are formed. By the cutting process using the cutting tool 31 as described above, the grooves (21) can be easily formed. Therefore, the time required for the groove forming process can be shortened.

Alternatively, each groove (21) can be formed by grinding. For the above grinding process,
For example, a diamond grinding blade (not shown) having a thickness of about 15 μm, which is used when dicing a semiconductor wafer, is used. Since the groove (21) can be easily formed even by grinding with a diamond grinding blade, the time required for the groove forming step can be shortened.

The hole (13) or groove (21) described above
Can also be formed by energy beam processing such as laser processing, ion beam processing or electron beam processing. In the energy beam processing, the hole (13) or the groove (21) can be directly formed on the back surface of the wafer (11). Moreover, the shape of the hole (13) or the groove (21) can be freely set and formed. Laser processing, in particular, can be performed in the atmosphere, so that the processing time can be greatly reduced.

[0022]

As described above, according to the present invention,
Since the getter layer is formed on the wafer back surface side and the wall surface side of the plurality of holes or the wall surface side of the plurality of grooves formed on the wafer back surface side, the volume of the getter layer can be increased. Therefore, the gettering ability of the getter layer can be improved.
Further, the getter layer can be formed at a deep position on the back surface side of the wafer. Therefore, since the position of the getter layer approaches the front surface side of the wafer on which the semiconductor device is formed, the gettering effect on the front surface side of the wafer can be improved.

[Brief description of drawings]

FIG. 1 is a diagram illustrating a forming process according to a first embodiment.

FIG. 2 is an explanatory diagram of a back surface strengthening step.

FIG. 3 is a diagram illustrating a forming process according to a second embodiment.

FIG. 4 is a perspective view of a cutting tool.

[Explanation of symbols]

 11 Wafer 12 Backside 13 Hole 14 Getter Layer 21 Groove

Claims (1)

[Claims] 1. A first step of forming a plurality of holes or a plurality of grooves on a back surface side of a wafer, a wall surface side of each hole or a wall surface side of each groove, and a back surface side of the wafer, a getter layer. And a second step of forming a wafer backside getter layer.