JPH05166772A - Manufacture of dielectric isolation wafer - Google Patents

Abstract

PURPOSE:To correctly perform positioning of a mask for forming an element regardless of dispersion of a stock removal by one reference pattern. CONSTITUTION:At the time of forming a separation groove, simultaneously a groove for a reference pattern is formed by using a mask having a cross- shaped opening, later grinding is performed after forming an oxide film and polycrystalline silicon so as to expose a cross-shaped reference pattern 18 consisting of polycrystalline silicon surrounded by an oxide film on the substrate polishing surface. Since a tip of the cross-shaped pattern 18 is always on the center lines 1x, 1y regardless of grinding dispersion, a cross pattern 19 of a mask for forming an element is matched with the tip so as to perform correct mask matching.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a dielectric isolation wafer, and more particularly to a method for forming a reference pattern for aligning a device forming mask.

[0002]

2. Description of the Related Art A dielectric isolation wafer is formed by forming an isolation groove on the surface of a single crystal silicon substrate, depositing an oxide film for dielectric isolation, and depositing polycrystalline silicon as a support layer. It is manufactured by polishing the back surface side of the substrate to the bottom of the separation groove to separate the substrate into a plurality of single crystal islands. The dielectric isolation integrated circuit device forms an element on a single crystal island of the wafer, but since a standard alignment pattern is not engraved on the surface of the wafer, which is usually the polishing side of the silicon substrate, the single crystal is formed. There was no method for aligning the island and the element forming mask pattern.

Therefore, for example, the element pattern is formed with reference to the single crystal island walls and the grid lines, but the single crystal island walls and the grid lines appear on the wafer surface due to variations in the polishing amount of the silicon substrate. In many cases, it cannot be used as a reference for alignment because of different widths.

As an attempt to solve such a drawback, there is a device described in JP-A-55-158633 in which a plurality of reference patterns having different shapes are embedded in consideration of polishing variations. The manufacturing method is shown in FIG.
Description will be given with reference to process cross-sectional views and plan views of (a) to (c). When a separation groove is formed on a single crystal silicon substrate having a plane orientation (100) by using an anisotropic alkali etching solution (KOH-isopropyl alcohol-water), the length of each side is a square different from w ₁ to w ₄ at the same time. As shown in FIG. 6A, a plurality of quadrangular pyramid-shaped grooves 2 are formed in the substrate 1 with an opening pattern. At this time, assuming that the length of one side of the square opening pattern is w, the etching depth d is expressed by Equation 1,

[Formula 1] w / √2 If the length of one side is different from w ₁ to w ₄ (w ₁ > w ₂ > w ₃ > w ₄ ), the depth d is d ₁ to d ₄ (d ₁ > d _2). ＞ d ₃ ＞ d
Different from ₄ ), the groove 2 is formed.

After that, an oxide film 3 for dielectric isolation is deposited on the surface of the substrate 1 and polycrystalline silicon 4 as a support layer is deposited. Then, the bottom surface of the isolation groove is exposed on the back surface side of the substrate 1. However, at this time, even if the polishing amount varies, the depth of the groove 2 is d ₁ to
Since it is different from d ₄ , one of the reference patterns 5 (polycrystalline silicon 4 surrounded by the oxide film 3) appears on the polished surface of the single crystal silicon substrate 1 in an optimum state as shown in FIG. 6B. Therefore, by aligning the alignment pattern 6 of the element forming mask with the reference pattern 5 in the optimum state as shown in FIG. 6C, a desired element can be correctly formed at a predetermined position of the single crystal island. it can.

[0006]

However, in the conventional reference pattern forming method as described above, since a plurality of reference patterns must be formed, there is a problem that a wide space is required for forming the reference pattern. It was Also,
Since a deep groove must be formed in order to make the depth of the groove different, the shape of the isolation groove for forming a single crystal island formed at this time may be destroyed. Further, since a plurality of reference patterns appear, it may be difficult to decide which pattern the mask should be aligned with, which may deteriorate the workability of element formation.

The present invention has been made in view of the above points, and an object thereof is to provide a method of forming a reference pattern which can solve the above-mentioned conventional drawbacks.

[0008]

According to the present invention, in a method of manufacturing a dielectric isolation wafer, a groove for a reference pattern is formed on a substrate at the same time when a separation groove is formed by using a mask having a cross-shaped opening. Then, after forming the dielectric isolation insulating film and the support layer, polishing is performed to expose a cross-shaped reference pattern made of the support material surrounded by the insulating film to the polishing surface. ..

[0009]

In the present invention described above, a cruciform star-shaped reference pattern is obtained, and the reference pattern expands and contracts as shown in FIGS. The tip is always the center line lx, ly of the cross pattern
Located on top. Therefore, this four-star pattern
By aligning the cross pattern 19 of the element forming mask with one tip, the element forming mask can always be accurately aligned regardless of variations in the polishing amount.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. 1 and 2, (a) is a plan view and (b) is a sectional view. 3 is a cross-sectional view, and FIG. 4 is a plan view seen from the polishing side (substrate back surface side).

In FIG. 1, 11 is a single crystal silicon substrate having a plane orientation (100), 12 is an oxide film as an etching mask material formed on the surface thereof, and 13 is the oxide film 12 thereof.
It is a cross-shaped opening formed by the photolithographic etching technique. The oxide film 12 is formed on the surface of the silicon substrate 11, an opening is formed in the oxide film 12, and an alkaline anisotropic etching solution (KOH-isopropyl alcohol-water) is applied to the surface of the silicon substrate 11 from the opening. Simultaneously with the formation of the crystal island forming isolation groove, the cross-shaped opening 13 is formed in the oxide film 12, and the reference pattern groove 14 is formed on the surface of the substrate 11 through the opening 13 as shown in FIG. Form. The groove 14 has a cross shape when viewed in plan,
As the V-shaped groove is gradually deepened from the four tips toward the center, a (nn1) plane having an etching rate higher than that of the (111) plane appears in the inner corner portion 15.
It is formed to be deeper than others.

Then, after removing the oxide film 12 as an etching mask, an oxide film 16 for dielectric isolation is formed on the entire surface of the substrate 11 including the isolation trench and the groove 14 as shown in FIG. Further, polycrystalline silicon 17 as a support layer is deposited thereon.

Thereafter, the back surface side of the substrate 11 is polished until the bottom of the separation groove is exposed to separate the substrate 11 into a plurality of single crystal islands. At this time, the groove 14 has the above-mentioned groove. Thus, the cross-shaped reference pattern 18 made of polycrystalline silicon 17 surrounded by the oxide film 16 is exposed on the polishing surface as shown in FIG. The cross-shaped reference pattern 18 has variations in the polishing amount of the substrate, such as p ₁ and p _{2 in} FIG. 3, and FIG.
Although it expands and contracts as shown in (b), the four tips are always positioned on the center lines lx and ly of the cross pattern. Therefore, by aligning the cross pattern 19 of the element forming mask with the four tips of the cross star-shaped reference pattern 18 as shown in FIG. 5, the element forming mask is always accurately aligned regardless of variations in the polishing amount. can do.

[0014]

As described above in detail, according to the present invention, the element-forming mask can be accurately aligned with the cross-shaped reference pattern irrespective of variations in the polishing amount. Further, according to the present invention, since only one reference pattern can be provided, the space for the reference pattern can be reduced and the workability can be improved without getting lost during mask alignment. Furthermore, since the groove for the reference pattern does not need to be particularly deep, the shape of the single crystal island forming separation groove formed at the same time can be maintained.

[Brief description of drawings]

FIG. 1 is a plan view and a sectional view showing a part of an embodiment of the present invention.

FIG. 2 is a plan view and a cross-sectional view showing a part of an embodiment of the present invention.

FIG. 3 is a sectional view showing a part of an embodiment of the present invention.

FIG. 4 is a plan view showing a part of an embodiment of the present invention.

FIG. 5 is a plan view showing an exposed state of a reference pattern in one embodiment of the present invention.

6A and 6B are a sectional view and a plan view showing a conventional reference pattern forming method.

[Explanation of symbols]

 11 monocrystalline silicon substrate 14 groove 16 oxide film 17 polycrystalline silicon 18 reference pattern

Claims (1)

[Claims] 1. A single crystal semiconductor substrate is provided with a separation groove, an insulating film is deposited, and a support layer is deposited on the surface of the single crystal semiconductor substrate. In the method for manufacturing a dielectric isolation wafer in which a plurality of single crystal islands are formed, a groove for a reference pattern is formed on a substrate at the same time when the isolation groove is formed by using a mask having a cross-shaped opening. After that, by performing polishing after forming the insulating film and the support layer, a dielectric cross-shaped reference pattern made of the support material surrounded by the insulating film is exposed on the polishing surface. Method for manufacturing body-separated wafer.