JPH0513460A - Field effect transistor - Google Patents

Abstract

PURPOSE:To enable a field effect transistor to be enhanced in low noise characteristics when it operates on high frequencies by a method wherein pseudo one-dimensional electronic systems of compound semiconductor are provided in a multiple manner. CONSTITUTION:An SiO2 film 40 is formed on a semi-insulating GaAs 10 and selectively removed to be left in stripes through a phase shift lithography, and an undoped AlyGa1-yAs16 (0<y<0.5) is formed into a triangular prism through an MOCVD organic metal thermal decomposition method. Then, an undoped GaAs11, an undoped AlzGa1-zAs18, and an Si-containing N<+>-type AlxGa1-xAs13 are formed. In succession, an Si-containing N<+>-type GaAs19 is formed, and then a gate electrode 20, a source electrode, and a drain electrode are formed. By this setup, a field effect transistor of low noise characteristics making the best use of the merits of one-dimensional electronic systems can be obtained, where demerits that an enough current is not allowed to flow through a conventional field effect transistor can be solved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field effect transistor using multiple one-dimensional quantum wires, and more particularly to a field effect transistor capable of obtaining a large current and having extremely low noise at high frequencies.

[0002]

2. Description of the Related Art Since July 1987, DBS (Direct
Broadband Satellite Service: A satellite broadcasting direct reception service) has started 24-hour television broadcasting, and there is an increasing demand for higher performance of the DBS receiving system. Also,
HEMT (High Electron Mob) at the reception front end
Demand is rapidly increasing due to the adoption of the (ility Transistor).

Actually, AlGaAs / GaAs HEMT
0.9dB, AlGaAs / InGaAs Pseudomorphi
NF (noise figure) of 0.5 dB in cHEMT is achieved in the 12 GHz band. These are described in, for example, Document 1: 3rd Asia-Pacific Microwave Conference Proceedings (Asia-Pasific Microwave
Conference Proceedings), Tokyo 1990, p951-p954
Or Reference 2: 21st Solid State Device Conference, To
kyo, 1989, pp285-288.

By the way, FETs (field-effect transistors) with low power consumption and excellent noise figure are required for downsizing of antennas, wireless communication of personal devices, etc., but a crystal structure and a gate structure are required. Improvements such as optimization of the technology are already in a saturated state, and it is becoming more difficult to reduce NF dramatically.

On the other hand, the idea of a quasi-one-dimensional FET in which a one-dimensional electron system is used for the active layer of the FET has been proposed, and its device characteristics have been investigated [Reference 3: IEEE IEDM 1989, 89-125].

A plan view and a sectional view of this quasi-one-dimensional FET are shown in FIGS. Normal HEMT structure is M
It is formed by a technique such as BE (molecular beam epitaxy) and has a width of
The mesa etch is removed leaving the fine line region 30 of about 0.15 μm (31
Part) and quasi-one-dimensional thin lines are arranged to realize a gate length L _g of 0.3 μm level. A gate electrode 20 and source / drain electrodes 21 and 22 are formed respectively.

A two-dimensional electron gas (2DEG) 15 is formed at the interface between the n + AlGaAs 13, i-AlGaAs (undoped layer) 12 and the undoped i-GaAs layer, and the line width w ₀ = 0.1.
Quasi-one-dimensional regions (extremely thin linear regions) 30 of 5 μm are multiply formed with the dead space width (= w ₁ ) removed by mesa etching.

Now, assuming that the total number of quasi-one-dimensional regions is N and the number of dead space regions is N, the width w of the FET on the wafer in plan view (this value is, for example, how many on a 3-inch wafer) It depends on whether the FET can be taken)

[0009]

[Expression 1] w = N (w ₀ + w ₁ ) ... (Expression 1)

In the quasi-one-dimensional region, the depletion layer extends from both sides of the mesa step surface by the Schottky gate electrode 20, so that the effective quasi-one-dimensional region width w _0eff is

[0011]

[ _Expression 2] w _0eff = _{ηw 0} ( _Expression 2)

Usually, the correction factor η due to this depletion layer is 0.7
It is a degree. Therefore, an effective F that can carry the charge of the FET
Since the ET width w _eff has N quasi-one-dimensional regions,

[0013]

[Expression 3] w _eff = Nηw ₀ (Expression 3)

The ratio α between the occupied area w of the FET and the effective area w _eff that effectively acts as a transistor in the GaAs wafer surface is given by the following equation.

[0015]

[Equation 4]

The above value α is a parameter indicating how effectively a GaAs wafer is used.

[0017]

However, when a quasi-one-dimensional FET having such a structure is made as a prototype, the one-dimensional effect predicted from a simple theory [Reference 4: Japanese
Journal of Applied Physics (Jap. J.
Appl. Phis) 19, 1980, ppL735-L738], that is, no increase in mobility in the low electric field region was found even at a cryogenic temperature of 4K. At 12 GHz, when the source / drain current Ids = 10 mA, the NF is 1.5 dB, which is a normal HEM.
Only a bad value was obtained compared to the T structure.

Further, in a HEMT having a deep recess structure, for example, in the structure shown in Document 5: Japanese Patent Laid-Open No. 62-200711 or the device cross-sectional structure disclosed in Document 1, a transistor width w is 200 μm. , NF when I _ds = 10 mA can be realized in the range of 0.8 to 1.0 dB, however, in the quasi-one-dimensional FET shown in FIG. 2, a transistor width w of 600 μm was required to flow I _ds of 10 mA.

The reason why the required transistor width w becomes three times larger in this way is that in the quasi-one-dimensional FET, (1) there is a dead space 31 in which no current flows (width: 0.2 μm),
(2) Lithography width w of quasi-one-dimensional electron system
_It is considered that the actually effective width is estimated to be about 70% of the above w ₀ because of the depletion layer due to the gate electrode metal 20 on both sides gathering at the mesa step height more than ₀ (∼0.15 μm).

Further, even when the quasi-one-dimensional structure is used, the mobility is rather deteriorated because it is difficult to form a straight line in practice when forming a quasi-one-dimensional mesa structure, and unevenness is caused. It is that only certain things can be formed. Furthermore, it depends on that the quasi-one-dimensional system expands three-dimensionally due to the high electric field on the drain side.

However, a clean quasi-one-dimensional system can be formed,
Further, if a device structure having a transistor width w smaller than that of a normal HEMT structure and a small NF is realized, it can be expected to be a low-noise FET for high frequencies.

As described above, when the quasi-one-dimensional electron system is used for the FET, the transistor width on the wafer needs to be three times as large as that of the normal Deep recess HEMT structure. That is, it means α = 1/3 in the equation 4. In the actual device, η = 0.
7. Since w ₀ = 0.15 μm and w ₁ = 0.2 μm, α = 0.3, which is very well in agreement with the theoretical value of α = 1/3, considering an error in measurement.

However, as can be seen from the equation (4), it is difficult to bring α close to 1 simply by arranging the quasi-one-dimensional regions.
Quasi-one-dimensional FE when 10,000 FETs can be taken with MT structure
With T, only about 4000 pieces can be obtained, which causes a significant increase in cost and the size of the FET is several times larger.

[0024]

The present invention provides a FET structure in which the transistor width w can be made significantly smaller than that of an ordinary FET, and the characteristics of a quasi-one-dimensional electron system can be brought out well, as shown in FIGS. The field effect transistor having the structure shown in FIG. That is, the field-effect transistor of the present invention has a structure in which the semiconductors I formed in a triangular prism shape and the semiconductors I are arranged in multiple layers, and the semiconductors II substantially free of impurities are formed on the semiconductors I. ,further,
The semiconductor III having a smaller electron affinity than the semiconductor II is the semiconductor I.
It is formed in a heterojunction with respect to I, has a semiconductor layer doped with at least an impurity in the semiconductor III, and a quasi-one-dimensional region is formed on the heterojunction surface arranged in the triangular prism shape. Characteristically, at least two electrodes for controlling the quasi-one-dimensional carrier and at least two electrodes for ohmic connection to the quasi-one-dimensional electron system are formed.

[0025]

As a result of analyzing the difference in noise characteristics between HEMT and MESFET, the inventors found a general theory described below, which is different from the conventional hypothesis. First, the noise generated in a field-effect transistor is the classical electron streamline in which electrons flow from the source to the drain (streamline showing the flow of electrons when regarded as a simple fluid: easily defined from the analogy of fluid dynamics). Due to fluctuations and turbulence due to thermal motion from the. Here, this is called intrinsic noise. On the other hand, the noise generated by disturbing the electron flow due to the peculiar cause of the GaAs material, which is derived from defects in the crystal, surface level between the source and the gate, is generated by the GaAs MESFET, GaA.
It is a noise factor common to sHEMTs and can be called, so to speak, parasitic noise.

The noise difference between HEMT and GaAs MESFET is due to the fact that, in the case of MESFET, the three-dimensional fluctuation from this classical electron stream line is essentially two-dimensional in HEMT. ing.

MESFET is an electron active layer (channel)
Is three-dimensional (bulk-like), and therefore electrons can fluctuate three-dimensionally around the electron streamline. That is,
Makes fluctuations from classical electron streamlines three-dimensional. on the other hand,
In the HEMT, since the electrons are two-dimensionally confined at the AlGaAs / GaAs interface, the movement direction of the electrons is mainly limited. Therefore, the classical electron streamlines are also two-dimensional, the fluctuations in the direction perpendicular to the hetero interface are suppressed, and the fluctuations from the classical electron stream lines are only two-dimensional in the plane of the hetero interface. Will end up.

Since the intrinsic noise is given by the logarithm of the fluctuation degree of freedom, if the noise in the three-dimensional direction is 1, the noise in the two-dimensional direction is 2/3. This is because the degree of freedom of three-dimensional fluctuation is proportional to 10 3/3, and the degree of freedom of two-dimensional fluctuation is proportional to 10 2/3.

By the way, noise at high frequencies is generated by the scattering of electrons and heat generation. In a HEMT in which the degree of freedom of electron scattering is reduced from three-dimensional to two-dimensional by using a two-dimensional channel in the active layer, this heat generation is suppressed and noise can be reduced.

The inventors of the present invention have come to the idea that the noise can be further reduced by using a one-dimensional electron system based on the discovery of such noise. That is, according to the above examination, the degree of freedom of one-dimensional fluctuation is 10
In proportion to the 1/3 power of the above, in principle, it becomes 1/2 the intrinsic noise of the HEMT system using 2DEG (two-dimensional electron gas).

FIG. 3A is a plan view of an ordinary HEMT structure element. The noise generation mechanism will be further described with reference to this drawing. The electrons emitted from one point 61 on the source electrode 21 reach the region of the gate electrode 20 while drift-diffusing by the electric field. By the way, the electrons emitted from the source are accelerated by the electric field in the gate direction (x direction), but do not exist in the direction parallel to the gate (y direction), and are therefore dominated by diffusion only. . Assuming that the diffusion coefficient of 2DEG is D and the arrival time to the gate electrode is τ _s , the electron starting from the point 60 on the source 21 is the gate 20.
The position reached by moving in the direction is any one of the regions in the source side gate electrode which is expanded by l _s from the point 64 obtained by moving the point 60 in the x direction.

Here, the diffusion coefficient D is given by equation 5, and l _s is given by equation 6.

[0033]

[Equation 5]

[0034]

[Equation 6]

Now, the mobility of 2DEG μ = 8,000 cm ² / V
・ Assuming that s and kT = 24.8 meV (room temperature), D = 198.4 cm ² /
It becomes V · s. Taking 1 psec (= 10 ^-12 sec) as a typical value for τ _s ,

[0036]

[Equation 7]

It becomes a degree.

Considering that τ is proportional to the source-gate distance L, this diffusion region becomes the region indicated by the parabolas 70 and 71. The electrons that started at point 60 with the source electrode are
When the source-gate distance L is 1 μm, the light is scattered about once and the direction of motion is bent. A line 51 in FIG. 3 schematically shows the above-mentioned electron trajectory. In this scattering process, in the electron-electron scattering, the energy obtained from the electric field is redistributed in the energy distribution between the electrons, and in the lattice-electron scattering, the electron energy flows to the crystal side.

In the case of GaAs MESFET, this diffusion region is three-dimensional (three-dimensional), whereas in the case of HEMT it is two-dimensional (planar), so that the intrinsic noise is significantly small. It was Also with respect to the electrons that have reached the gate electrode region, the random path 50 of the electrons and the spread 1 of the electrons at the end of the drain side gate electrode can be evaluated in the same manner as Equation 6.

If a structure capable of suppressing the lateral diffusion of the electrons can be devised, it becomes possible to significantly suppress the generation of noise at high frequencies.

FIG. 3B is a conceptual diagram of a plane structure in which lateral diffusion of electrons is suppressed. That is, the width w ₀
Multiple quasi-one-dimensional electron paths of are formed. An electron that starts from a point 62 on the source makes a random motion 52 and reaches just below the gate 20. At this time, the random electron path is confined only within the quasi-one-dimensional structure having the width w ₀ , and it is extremely rare to move to another path, so that the fluctuation can be significantly reduced. The same can be said for another electron 63 that has reached the source-side gate end.

On the other hand, the conventional quasi-one-dimensional FET (for example, FIG. 2) has a big problem that current cannot be taken, and is not suitable for practical use. In order to solve this drawback, in the present invention, as shown in FIGS. 1A and 1B, a multi-period corrugated type 2DEG structure is used.

That is, on a GaAs substrate, undoped AlGaAs16 / undoped GaAs11 / n-type AlGa
When the triangular prisms 17 made of As13 are multiply arranged, the two-dimensional electron gas 15 is formed inside the triangular prisms at the heterojunction interface between the undoped GaAs11 and the n-type AlGaAs13. The gate electrode 20 is formed on the triangular prism from above to form a field effect transistor. At this time, the 2DEG formed on the side surface of the triangular prism becomes quasi-one-dimensional. That is, the side surface of the triangular prism is a quasi-one-dimensional electron conduction path having a width w ₀ .
It becomes the multiple quasi-one-dimensional FET shown in (b).

Such AlGaAs / GaAs / Al
GaAs triangular prisms are arranged in multiple layers, and AlGaAs16 GaA
The width on s is h ₀ , the side width of the triangular prism is 1, and the width of 2DEG given by one triangular prism is h / cos θ, where θ is the inclination angle of the triangular prism side surface with respect to the bottom. Assuming that the gap between the triangular prisms is h ₁ , and assuming that there are N triangular prisms in the width w on the wafer, the effective transistor width w _eff is

[0045]

[ _Equation 8] w _eff = N (h ₀ / cos θ + h ₁ ) (8)

[0046]

[Equation 9] w = (h ₀ + h ₁ ) ... (9), and the effective utilization rate α of the wafer expressed by Equation 4 is given by the following equation,

[0047]

[Equation 10]

For example, h ₀ = 0.3 μm, h ₁ = 0.1 μm, θ =
If it is π / 3,

[0049]

[Equation 11]

And α> 1.

Therefore, in the field effect transistor of the present invention, the intrinsic high frequency noise of the quasi-one-dimensional electron system formed on the side surface of the triangular prism is small, as compared with the deep recess HEMT having the same transistor width w. It has a large current and is excellent in noise characteristics at high frequencies.

By the way, as to the method for forming such a triangular prism, Reference 6: Extended Abstracts of the 22nd 1990 Inte
rnational Conference on Solid State Devices
and Materials, Sendai, 1990), pp. 753-756.

[0053]

EXAMPLE A case of using an AlGaAs / GaAs heterojunction system will be described with reference to FIGS. 1 (a) and 1 (b).

CVD on semi-insulating GaAs (100 plane) 10
Then, a SiO ₂ film 40 having a thickness of 10 nm was formed. Then, by using phase shift lithography, the SiO ₂ film 40 with a width h ₁
= 100 nm, the interval h ₀ = 200 nm, and 666 stripes were left. MO
The CVD metal organic decomposition method, an undoped Al _y Ga
_1-y As (y = 0.3) was formed into a triangular prism shape. Here, the value of y is usually selected within the range of 0 ≦ y ≦ 0.5. This time,
The angle θ between the side surface of the triangular prism and the GaAs substrate was 60 degrees. Also, the MOCVD is performed at a low temperature of 650 ° C.
The growth was performed by increasing the partial pressure of sH ₃ .

Next, the crystal growth temperature was raised to 800 ° C., the undoped GaAs 11 was 30 nm, and the undoped Al _z Ga _1-z As.
(Z = 0.3) n-type Al containing 2 nm of 18 and 2 × 10 ¹⁸ Si
The _{x Ga 1-x As (x} = 0.3) 13 to 40nm formed.

Next, as with the case of forming the deep recess HEMT, S is used for the purpose of reducing the source-gate resistance R _sg.
An n + type GaAs ¹⁹ containing 2 × 10 ¹⁸ i was formed to a thickness of 160 nm. After that, the gate electrode 20 and the source / drain electrode were formed in the same manner as when forming the normal Deep recess HEMT.

The transistor width w ( _equation 9) on the plane of the device of the present invention constituted by the above steps is 200 μm, the gate length L _g is 0.25 μm, and the distance L _sg between the source electrode and the gate electrode is L _sg.
Was 1.5 μm.

The noise figure NF and the gain G _a measurement results for the drain current I _DS at this time are shown in FIG. 4 in comparison with those of the conventional FET. As a result of multidimensional (666) channels one-dimensionalized, remarkable improvement in characteristics was made.

Here, as the semiconductor material of the above-mentioned embodiment, GaAs11 of the channel layer is used as In _x G having a strained layer.
It is also possible to replace it with a _1-x As. It does not replace the conventional Pseudomorphic HEMT. However, at this time, the maximum film thickness that can withstand the strain corresponding to the In composition x exists, as in the prior art.

Further, it is also possible to form a lattice-matched InGaAs / InAlAs heterojunction on the InP substrate instead of the GaAs substrate to form a higher performance HEMT.

[0061]

According to the present invention, since the active layer of the FET has a structure in which quasi-one-dimensional electron systems formed on the side surface of a semiconductor having a triangular prism shape are multiply arranged, (1) the characteristics of the one-dimensional electron system are utilized. It is possible to obtain effects such as low noise characteristics, and (2) arranging triangular prisms without gaps to overcome the conventional drawback that a sufficient current cannot flow.

[Brief description of drawings]

FIG. 1 is a perspective view and a cross-sectional view showing an embodiment of a field effect transistor of the present invention.

FIG. 2 is a plan view and a cross-sectional view of a quasi-one-dimensional FET of a conventional example.

FIG. 3 is a plan view of an FET for explaining the effect of the present invention.

FIG. 4 is a graph showing high frequency characteristics of FETs of the present invention and a conventional example.

[Explanation of symbols]

11 ... Undoped GaAs, 13 ... n-type Al _x Ga _1-x A
s, 15 ... Quasi-one-dimensional electron system, 16 ... Undoped Al _y G
a _1-y As, 17 ... Semiconductor triangular prism, 20 ... Gate electrode,
21 ... Source electrode, 22 ... Drain electrode, 30 ... Quasi-one-dimensional electron system channel, 31 ... Inactive region, 50-53 ... Electron diffusion path, 70-73 ... Electron diffusion region.

Claims (2)

[Claims] 1. A semiconductor I formed in the shape of a triangular prism and a structure in which the semiconductors I are lined up in multiple layers are provided on the semiconductor I.
A semiconductor II containing substantially no impurities is formed, and further, a semiconductor III having an electron affinity smaller than that of the semiconductor II is formed in a heterojunction with respect to the semiconductor II, and the semiconductor III is at least doped with impurities. Have layers,
It is characterized in that a quasi-one-dimensional semiconductor region is formed on the heterojunction surface arranged in the shape of a triangular prism, and an electrode for controlling the quasi-one-dimensional carrier and an electrode for ohmic connection to the quasi-one-dimensional electron system are at least A field effect transistor characterized by being formed of two or more. 2. The semiconductor I is undoped Al _y Ga _1-y A
2. The field effect transistor according to claim 1, wherein s (0 ≦ y ≦ 0.5), the semiconductor II is formed of undoped GaAs, and the semiconductor III is formed of Al _x Ga _1-x As.