JPH0496022A - Active matrix substrate and production thereof and liquid crystal display element formed by using this substrate - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an active matrix substrate equipped with thin film transistors as switching elements, a method for manufacturing the same, and a liquid crystal display device using the same.

[Prior Art] Active matrix liquid crystal display elements equipped with thin film transistors as switching elements have features such as thinness and low power consumption, and are attracting attention as display elements that can replace cathode ray tubes.

Hereinafter, the structure of an active matrix substrate used in a conventional liquid crystal display element and its manufacturing method will be explained using the process diagram of FIG.

First, to explain the manufacturing method, as shown in the cross-sectional view in FIG.
A metal film 22 such as the above is formed by sputtering or vacuum evaporation.

Next, as shown in the cross section in FIG. 5(2) and in the top view in FIG.
Form a pattern with 3.

Further, as shown in FIG. 5(3) and the top view in FIG. 5(3), a silicon nitride film (hereinafter referred to as SiN
gate insulating film 4 such as amorphous silicon (A+o
rphous 5ilicon (hereinafter abbreviated as a-3i)
A contact layer 6 mixed with phosphorus is laminated on the semiconductor active layer 5, a-5i, etc., and the semiconductor N7 is processed into an island shape.

Next, IT○ was placed on the substrate obtained in FIG. 5(3), as shown in the cross section in FIG. 5(4) and the plan view in FIG. 5(c).
A transparent conductive film such as Indiua+ (abbreviation for Tin Oxide) is formed by sputtering or vacuum deposition, and this transparent conductive film is photoetched to form the pixel electrode 8.

Furthermore, as shown in the cross section in Figure 5 (5), Figure 5 (4)
A metal film 22 of Cr or the like is formed on the substrate obtained by sputtering or vacuum evaporation.

Next, as shown in the cross section in FIG. 5(6) and in the plan view in FIG. , respectively source electrode 10 (pixel electrode 8
(also connected to the drain electrode 11), a drain electrode 11, and a signal line 12 (connected to the drain electrode 11) are formed.

Then, as shown in the cross section of FIG. 5(7), the contact layer 6 of the channel portion 21 is removed.

In this way, a field-effect thin film transistor 70 made of a-3i was realized, and an active matrix substrate 20 having a pixel electrode 8 connected to a source electrode 10 was obtained.

In addition, when the signal line 12 or the scanning line 3 has a multilayer structure of the metal film 22, the above-mentioned FIG. 5 (1), (2) or (5)
, by repeating the steps (6).

Incidentally, one related to this type of active matrix substrate is, for example, Japanese Unexamined Patent Publication No. 59-6578.

[Problem to be solved by the invention] Metal film 2 of electrodes and wiring constituting the thin film transistor 70
2 is formed by sputtering or vacuum deposition.

Although these methods can provide a metal film having almost the same composition as the source material, the coverage of the stepped portion is poor due to the high directivity of the metal particles during film formation. For this reason, when a metal film is formed using this method, the thickness of the metal film 22 at the stepped portion 23 becomes thinner, as shown in a cross section of the main part in FIG. Therefore, when wiring on an active matrix substrate is formed using this method, wiring resistance may increase or wire breakage may occur, and when such an active matrix substrate is used in a liquid crystal display element, image quality may deteriorate. Furthermore, when sputtering or vacuum evaporation is used in the process of forming electrodes and wiring on an active matrix substrate, it is necessary to photoetch and pattern each metal film 22 formed. For this reason, the manufacturing process of the active matrix substrate becomes complicated, and the number of steps increases, resulting in a problem that the manufacturing time becomes longer and the manufacturing cost increases.

Therefore, it is an object of the present invention to solve the above-mentioned problems of the prior art, and its first purpose is to prevent high resistance and disconnection of wiring due to insufficient coverage of the stepped portion of an active matrix substrate, and to The second objective is to develop an inexpensive active matrix substrate with excellent characteristics that prevents the increase in the number of steps and manufacturing costs due to the complexity of the manufacturing process, and the third objective is to develop a manufacturing method for the substrate. An object of the present invention is to provide a liquid crystal display element using each of the above.

[Means for solving the problem] The above purpose is to overlay a part of the semiconductor layer constituting the thin film transistor and the pixel electrode, and to connect the thin film transistor electrode and the pixel electrode using chemical plating to form the electrode and wiring. This is achieved by forming each wiring.

The means for achieving the object of the present invention will be explained in more detail below.

The first object of the present invention is as follows.

(1) A gate electrode disposed on an insulating substrate covered with a gate insulating film, a scanning line disposed extending from the gate electrode, and a scanning line disposed on at least the gate electrode with an insulating film interposed therebetween. A semiconductor layer constituting a transistor section, a source electrode and a drain electrode are provided on this semiconductor layer, and a signal line in which this drain electrode extends and is disposed on one side, and a signal line on which this drain electrode extends and is disposed on the other side. In an active matrix substrate on which a field effect thin film transistor having a pixel electrode electrically connected to the electrode is mounted as a switching element, a part of the pixel electrode is extended over the semiconductor layer and overlapped. An active matrix substrate is formed by coating a part of the semiconductor layer which becomes a part of the overlapping source electrode and the extended overlapping source electrode and the source formation region at the periphery of the extended portion with a chemically plated metal film. , and (2) a gate electrode disposed on the N-edge substrate covered with a gate insulating film, a scanning line disposed extending from the gate electrode, and an insulating film on at least the gate electrode. A semiconductor layer constituting a transistor section provided through a semiconductor layer, a source electrode and a drain electrode provided on this semiconductor layer, and a signal line provided with the drain electrode extending on one side, and a signal line disposed on the other side. In an active matrix substrate on which a field effect thin film transistor having a pixel electrode electrically connected to the source electrode is mounted as a switching element, a drain forming region of a semiconductor layer constituting the transistor section is provided. The pixel electrode is partially extended to serve as a base layer for the signal line, and its surface is coated with a chemically plated metal film to form a drain electrode and a signal line connected thereto. A chemically plated metal film is formed to extend over the source formation region and to form a part of the source electrode, and also to form a part of the semiconductor layer which will become the source formation region at the periphery of this extended overlapping source electrode and this extended portion. This is achieved by using an active matrix substrate coated with.

Further, the gate electrode and the scanning line on which the gate electrode extends may be formed by coating a chemically plated metal film on a chemically plated base layer pattern.

Further, it is preferable that the pixel electrode be formed of a transparent conductive film, and that the chemically plated metal film be formed of a metal film containing phosphorus and containing nickel as a main component.

Further, the semiconductor layer constituting the transistor section can be composed of two layers: an active layer and a contact layer provided under the source/drain electrodes and having a higher carrier concentration than the active layer.

Furthermore, if the semiconductor layer constituting the transistor section is composed of an active layer, and the chemically plated metal film constituting at least the source/drain electrodes is composed of a metal film containing phosphorus and containing nickel as a main component, the source - Since the phosphorus in the drain electrode diffuses to the surface of the active layer and substantially forms a contact layer, the formation of a contact layer can be omitted in this case.

Further, as the active layer, amorphous silicon containing hydrogen is preferably used, and as the contact layer, amorphous silicon containing impurities of Group 5 elements is desirable.

Further, it is preferable that the impurity of the Group 5 element contains phosphorus.

Further, it is preferable that the chemically plated metal film has at least a two-layer structure, in which the first layer is a metal film containing phosphorus and whose main component is nickel, and the second layer is a copper film. .

Furthermore, the insulating substrate described in (1) or (2) above may be a transparent insulating substrate such as a quartz lath, and the gate electrode and the scanning line extending from the gate electrode may be For example, the plating base layer pattern is IT○
It is desirable that the gate insulating film is formed of a transparent conductive film such as, for example, silicon nitride or silicon oxide.

The second object of the present invention is to: (3) form a plating base pattern on a substrate, which corresponds to a predetermined gate and a scanning line connected thereto; A step of selectively forming a plating metal film on the base pattern and:
Next, after forming a gate insulating film on at least the plated metal film, a step of laminating a semiconductor layer; forming a pattern of a transistor formation region to form a field effect thin film transistor on the gate, and forming a drain electrode in this region; A step of selectively etching the signal line plating base pattern extending from the area; Next, a transparent conductor film is laminated and selectively etched using a predetermined resist mask to form the pixel electrode. forming a pattern and extending a part of this pattern to the source formation region of the transistor formation region pattern of the semiconductor as a plating base conductor layer pattern of the source electrode to form an overlapping electrode pattern; After forming a nonconductor film pattern as a plating mask on the main surface of the electrode pattern and on the channel formation portion between the source and drain formation regions in the transistor formation region pattern, a plating base pattern for the exposed source and drain electrodes is formed. and a step of selectively forming a plating metal film on the plating base pattern of the signal line by chemical plating again; and a step of removing the nonconductor film pattern.
achieved. (4) In the step of forming the semiconductor layer, a contact layer having a higher carrier concentration than the active layer is formed on the active layer to form a two-layer structure, and the non-conductor film pattern is removed in the final step. After this step, a step of removing the contact layer constituting the channel portion may be added, and a field effect transistor may be formed in the transistor formation region pattern.

Further, the formation of the contact layer may be omitted and only the active layer may be formed. However, in this case, it is necessary to use a plating film containing a Group 5 element such as phosphorus as the plating metal film for the source/drain electrodes. Group 5 elements diffuse from this plated metal film to the surface of the active layer, and a source/drain is formed substantially in the same manner as when a contact layer is formed. Therefore, in this manufacturing method, since the formation of the contact layer is omitted, there is no need for the step of removing the contact layer constituting the channel portion, and there is an advantage that the number of steps can be reduced.

(5) Preferably, the active layer is an amorphous silicon film containing hydrogen, and the contact layer is an amorphous silicon film containing Group 5 element impurities. (6) It is desirable that the Group 5 element contains at least phosphorus. (7) In the chemical plating step (3) above, it is preferable to use a plating solution containing phosphorus and containing nickel as a main component. Also, (8), (3) above
It is desirable that the semiconductor layer is formed of an amorphous silicon film containing hydrogen, and that the chemically plated metal film constituting at least the source/drain electrodes is formed of a metal film containing phosphorus and containing nickel as a main component. (9) The chemically plated metal film constituting the electrodes, scanning lines, and signal lines is composed of at least two layers, the first layer of which is a metal film mainly composed of nickel containing phosphorus; Second
Preferably, the layer is formed of a copper film. Also.

(10) It is desirable to add a catalyst application step to the step of forming the plating base pattern in (3) above in order to facilitate chemical plating. The step of applying a catalyst for chemical plating is preferably a step of immersing it in a catalyst solution containing palladium. Furthermore, (11) the insulating substrate in (3) above is made of a transparent insulating substrate such as quartz, and a plating base pattern corresponding to the predetermined gate and the scanning line connected thereto is formed thereon. It is also desirable that the forming step be a step of forming a transparent conductive film such as ITO as a plating base pattern.

A third object of the present invention is (12) providing a counter electrode opposite to the pixel electrode of the active matrix substrate according to (1) or (2) above;
Moreover, filling the gap between the pixel electrode and the counter electrode with liquid crystal,
The liquid crystal display element, which consists of a sealed display cell, allows
achieved.

[Function] By using the chemical plating method to form wiring such as scanning lines and signal lines, uniform film growth can be obtained on both flat areas and stepped areas, compared to conventional sputtering film formation methods, and the steps existing in the substrate can be grown uniformly. It is possible to prevent an increase in wiring resistance or disconnection at a certain point.

In addition, since the plating method allows film formation to be performed selectively only on the required plating base, it is possible to omit the photo-etching process that is always required to form a pattern after conventional film formation. can.

Furthermore, by creating a structure in which the extended portion of the pixel electrode is superimposed on the source electrode forming region of the semiconductor layer and plating the joint portion, it is possible to ensure electrical connection between the pixel electrode and the source electrode. can.

Furthermore, during this plating process, it is possible to simultaneously perform plating on the plating base layer of the drain electrode and the signal line extending thereto. be able to.

When forming signal lines or source/drain electrodes using a plated metal film, if the plated metal film contains a Group 5 element such as phosphorus, it is not necessary to form a contact layer on the active layer as a semiconductor layer when forming a transistor. It is not necessary to do this, and it is possible to omit this and form an electrode using a plated metal film on the active layer. In this case, 5 in the plated metal film
Group elements diffuse into the surface of the active layer and have the same effect as when a contact layer is provided.

Although we have described an example in which a conductor or semiconductor pattern is used to form the base pattern when forming a chemically plated metal film, any other well-known pattern that enables chemical plating may be used, such as palladium. Various methods can be used, such as patterning by well-known lithography using a photosensitive film containing a catalyst, such as printing with an ink containing a catalyst.

[Example] Embodiments of the present invention will be described below with reference to the drawings.

Embodiment 1 FIG. 1 shows a process diagram in which the present invention is applied to the manufacture of an active matrix substrate on which thin film transistors are mounted as switching elements.

First, as shown in the cross-sectional view of FIG. 1 (1) and the plan view of FIG. By the formation method, a pattern of the IT◯ film 25 corresponding to a predetermined pattern of the gate 2 and the scanning line 3 was formed. Next, this IT○ pattern is activated with a special activation solution, immersed in a palladium-based catalyst solution to apply a catalyst and activate the catalyst, and then the entire substrate is immersed in a plating solution. A commercially available plating solution was used to sequentially form Ni-P as a first plating film, and then Cu as a second plating film. Thus, the gate electrode 2 made of the plated metal film 24 and the scanning line 3 extending and connecting thereto.
was formed.

Next, as shown in the cross-sectional view of FIG. 1(2) and the plan view of FIG. 1(b), SiN was deposited on the substrate obtained in FIG. 1(1).
Gate insulating film such as 4. Hydrogen-containing a-8i active layer (n type)
5. Contact layer containing phosphorus in a-8i (n+ type)
6 were sequentially laminated by the well-known CVD method, and the semiconductor layer 7 was etched through a predetermined mask to form a transistor forming part 7a and a signal line forming part 7b extending from the drain forming region as shown in FIG. .

Next, as shown in the cross-sectional view of FIG. 1(3) and the plan view of FIG. 1(c), a layer of FIG.
After forming an ITO transparent conductive film in the same manner as in the case of 1), it is selectively etched through a predetermined mask so that a portion of the film is in contact with the source formation region of the transistor formation portion 7a of the semiconductor layer. A pixel electrode 8 is obtained.

Next, as shown in the cross-sectional view of FIG. 1 (4) and the plan view of FIG. After forming a nonconductor film pattern 9 made of photoresist, the substrate is immersed in an activating solution containing a mixture of hydrofluoric acid, ammonium fluoride, and palladium chloride dissolved in hydrochloric acid, and the exposed semiconductor layer 7a is exposed as a source layer. After activating the portion (transparent conductive film) where the drain region and signal line forming portion 7b and a portion of the pixel electrode 8 extend and overlap, this is performed in the same manner as in the case of FIG. 1 (1) above. A first layer of Ni-P and a second layer of Cu plating film were sequentially formed by immersing the film in a plating solution. In this way, the source electrode 10, the drain electrode 11, and the signal line 12 extending and connecting from the drain electrode were formed as shown in the figure.

Finally, as shown in the cross-sectional view of FIG. 1(5) and the plan view of FIG. 1(e), after removing the nonconductor film 9,
A predetermined field effect thin film transistor 7o is realized by removing the contact layer 6 of the active matrix substrate 20.
I got it.

In this process diagram, the features of the present invention are exhibited in each step of FIG. 1 (1), (3), and (4).

According to the present invention, since the plating film is selectively formed according to the underlying pattern, the etching process for pattern formation, which was always performed after film formation in the conventional method, can be significantly reduced.

Further, FIG. 2 shows a cross-sectional view taken along the line xx′ of FIG. 1(e), and the scanning line 3-signal #! The coverage of the stepped portion 23 in the active matrix substrate, which is represented by the intersection of 12 and 12, is improved, and compared to the case of FIG. decreased significantly.

Further, after extending and overlapping a part of the pixel electrode 8 made of a transparent conductive film in the source electrode formation region of the semiconductor layer 7a,
Since a plating metal film that will become the source electrode 10 is formed on this part by plating, the pixel electrode 8 and the source electrode 10
I was able to reliably connect with.

Embodiment 2 FIG. 3 shows a cross-sectional structural diagram of an active matrix substrate 2o according to another embodiment of the present invention. In this case as well, the manufacturing process basically follows the steps shown in FIG. 1, but when forming the thin film transistor 7o, the contact layer 6
It is distinctive in that the formation of is omitted.

That is, this figure corresponds to the cross-sectional view of FIG. 1 (5), and shows a substrate 1 whose surface is made of an insulating material such as quartz; Cu/Ni is applied from the formed IT○ film pattern 25 and the upper layer selectively formed by plating on the ITO film.
- A gate electrode 2 consisting of a two-layer plated metal film 24 with a P structure; a gate insulating film 4 of SiN; an active layer 5 of a-8i; a pixel electrode 8 partially overlapping the source formation region of the active layer 5; ; Cu/Ni formed by plating method
It consists of a source electrode 10 made of a two-layer plating metal film of -P; and a drain electrode 11.

In this example, Ni-P was used as the plating film directly in contact with the active layer (a-8i) 5. By creating a structure in which this NiP plated film is directly connected to a-8i of the active layer, contact between the plated metal film and the active layer (a-3i) 5 is established as shown in FIG. Even if the step of forming the a-3i(n'') layer containing phosphorus used as layer 6 was omitted, a thin film transistor with good characteristics could be obtained and the number of steps could be simplified. As shown, the phosphorus element P contained in the plating film constituting the source/drain electrodes 10.11 diffuses to the surface of the active layer 5 as a donor and forms an N4'' layer, so the contact layer 6 is intentionally not formed. In both cases, substantially the same effect as when a contact layer is formed can be obtained.

In addition, a source electrode 10, a drain electrode 11. Signal line 12
The film structure of the plating film used for A u
/Ni-P two-layer structure or Au/Cu/N
Thin film transistors with similar good characteristics were also obtained with three-layer structures such as 1-P and N1-P/Cu/N1-P.

In the case of such a multilayer plating film, the first plating layer has good adhesion to the semiconductor layer, and if the contact layer 6 is not provided, the carrier concentration can be increased as described later. It is necessary to contain elements. The second and higher plating layers have good adhesion to the first layer,
In addition, any material that can be a good conductor as an electrode or wiring conductor may be used.

Note that when the contact layer 6 is not provided as in this embodiment, it is necessary to contain an element capable of increasing the carrier concentration in the plating metal film directly in contact with the active layer 5. In this example, since a-8i of the active layer is an n-type layer, in order to make its surface an n+ layer, a chemically plated metal film containing phosphorus P as a donor was used. Furthermore, when the active layer 5 is composed of a P-type semiconductor, it is necessary to use a plating film containing an element that can serve as an acceptor, contrary to this example. Not even.

Embodiment 3 FIG. 4 shows an example of an element in which a liquid crystal display element is realized by mounting the active matrix substrate obtained in Example 1.2 of the present invention. FIG. 4(a) shows its plan view, and FIG. 4(b) shows its cross-sectional structure.

In the figure, 20 is an active matrix substrate, 13
14 is a polarizing plate, 14 is a color filter, 16 is a counter electrode of the pixel electrode 8 made of a transparent conductive film and is also made of a transparent conductive film, 15° and 19 are protective films, respectively.
7 is an alignment film, and 18 is a liquid crystal filled and sealed between them.

The mounting and assembly of this liquid crystal display element was performed according to a well-known method.

Since the active matrix substrate formed according to the present invention has good coverage of the stepped portion, the resistance of the signal lines is low and there is little variation in the resistance value of each signal line. Therefore, in a liquid crystal display element using this active matrix substrate,
An image with good uniformity was obtained. Furthermore, since the contact between the pixel electrode and the source electrode was good, an image without defects was obtained.

[Effects of the Invention] As detailed above, the metal film formed by the plating method of the present invention has good step coverage.

This eliminates resistance increases and disconnection accidents at stepped portions of electrodes and wiring patterns existing in the active matrix substrate.

In addition, according to the present invention, it is possible to selectively form a plating metal film only on arbitrary parts according to the plating base pattern, so steps such as etching after film formation, which were conventionally indispensable, can be significantly reduced. It is now possible to reduce Therefore, it is possible to improve the yield of active matrix substrates and reduce manufacturing costs.

Further, when the active matrix substrate manufactured according to the present invention is used in a liquid crystal display element, a good image with less uneven brightness etc. can be obtained.

[Brief explanation of the drawing]

FIG. 1(1) to FIG. 1(5) are cross-sectional views showing the manufacturing process of an active matrix substrate according to an embodiment of the present invention, and FIG. 1(a) to FIG. 1(e) are Plan view,
FIG. 2 is a cross-sectional view of the scanning line-signal line intersection of the active matrix substrate taken along line xx' in FIG. 1(e), and FIG. 3 is an active matrix substrate according to another embodiment of the present invention. FIG. 4(a) is a plan view of a liquid crystal display element, and FIG. 4(b) is a cross-sectional view of the active matrix substrate obtained in the present invention applied to a liquid crystal display element.
Figures (1) to (5) are cross-sectional views showing the manufacturing process of conventional active matrix substrates, and Figure 5 (a)
5(d) are plan views thereof, and FIG. 6 is a sectional view showing step coverage when a metal film is formed by sputtering or vacuum evaporation to explain the prior art. Explanation of symbols> 1...Substrate, 2...Gate electrode, 3...
Scanning line, 4... Gate insulating film, 5... Active layer, 6... Contact layer, 7... Semiconductor layer,
8... Pixel electrode, 9... Nonconductor film,
10... Source electrode, 11... Drain electrode, 12...
- Signal line, 13... Polarizing plate, 14... Color filter, 15.19... Protective film, 16... Counter electrode, 17... Alignment film, 18... Liquid crystal, 20...
. . . Active matrix substrate, 21 . . . Channel portion, 22 . . . Metal film, 23 .

Claims (1)

[Scope of Claims] 1. A gate electrode disposed on an insulating substrate covered with a gate insulating film, a scanning line disposed extending from the gate electrode, and an insulating film on at least the gate electrode. A semiconductor layer constituting a transistor section provided through a semiconductor layer, a source electrode and a drain electrode provided on this semiconductor layer, and a signal line provided with the drain electrode extending on one side, and a signal line disposed on the other side. In this active matrix substrate, a field effect thin film transistor having a pixel electrode electrically connected to the source electrode is mounted as a switching element, and a part of the pixel electrode is extended onto the semiconductor layer. The extended superimposed source electrode and a part of the semiconductor layer that becomes the source formation region at the periphery of the extended portion are coated with a chemically plated metal film. Active matrix substrate. 2. A gate electrode provided on an insulating substrate covered with a gate insulating film, a scanning line provided by extending this gate electrode, and a scanning line provided at least on the gate electrode with an insulating film interposed therebetween. A semiconductor layer constituting a transistor section, a source electrode and a drain electrode are provided on this semiconductor layer, and a signal line extending from this drain electrode is provided on one side, and a signal line is provided on this source electrode on the other side. In an active matrix substrate on which a field effect thin film transistor having an electrically connected pixel electrode is mounted as a switching element, a drain forming region of a semiconductor layer constituting the transistor section is extended to form a signal line. The pixel electrode is used as a base layer, and the surfaces thereof are coated with a chemically plated metal film to form a drain electrode and a signal line connected thereto, and a part of the pixel electrode is extended to a source formation region on the semiconductor layer. The active layer is formed by overlapping the semiconductor layer to form a part of the source electrode, and covering the extended overlapping source electrode and a part of the semiconductor layer that will become the source formation region around the extended portion with a chemically plated metal film. matrix substrate. 3. The gate electrode and the scanning line on which the gate electrode extends are formed of a chemical plating base layer pattern, and the pattern is coated with a chemical plating metal film. 2. The active matrix substrate according to 2. 4. The active matrix substrate according to claim 1, wherein the pixel electrode is made of a transparent conductive film, and the chemically plated metal film is made of a metal film whose main component is nickel containing phosphorus. 5. The active matrix according to claim 1 or 2, wherein the semiconductor layer constituting the transistor section is composed of two layers: an active layer and a contact layer provided under the source/drain electrode and having a higher carrier concentration than the active layer. substrate. 6. The active matrix substrate according to claim 5, wherein the active layer is made of amorphous silicon containing hydrogen, and the contact layer is made of amorphous silicon containing impurities of Group 5 elements. 7. The active matrix substrate according to claim 6, which contains phosphorus as an impurity of the Group 5 element. 8. Claims 1 to 3 in which the semiconductor layer is made of amorphous silicon containing hydrogen, and the chemically plated metal film constituting at least the source/drain electrodes is made of a metal film containing phosphorus and containing nickel as a main component. The active matrix substrate described in any of the above. 9. Claim 1, wherein the chemically plated metal film has at least a two-layer structure, the first layer being a metal film mainly composed of nickel containing phosphorus, and the second layer being a copper film. The active matrix substrate according to any one of 3 to 3. 10. The insulating substrate is a transparent insulating substrate, the gate insulating film is a transparent insulating film, and the chemical plating base layer pattern constituting the gate electrode and the scanning line on which the gate electrode extends is a transparent conductive material. 3. The active matrix substrate according to claim 1, wherein the active matrix substrate is composed of a film. 11. Forming a plating base pattern corresponding to a predetermined gate and a scanning line connected thereto on an insulating substrate; selectively forming a plating metal film on the plating base pattern by chemical plating. Next, after forming a gate insulating film on at least the plated metal film, a semiconductor layer is laminated; forming a pattern of a transistor formation region to form a field effect thin film transistor on the gate; and forming a pattern of a transistor formation region in this region. A step of selectively etching the signal line plating base pattern extending from the drain electrode formation region; Next, forming a layered transparent conductor film and selectively etching this using a predetermined resist mask. forming a pixel electrode pattern and extending a part of this pattern to the source formation region of the transistor formation region pattern of the semiconductor as a plating base conductor layer pattern of the source electrode to form an overlapping electrode pattern; ; After forming a nonconductor film pattern as a plating mask on the main surface of the pixel electrode pattern and on the channel formation portion between the source and drain formation regions in the transistor formation region pattern, remove the exposed source and drain electrodes. Manufacturing an active matrix substrate comprising the steps of: selectively forming a plating metal film on the plating base pattern and the plating base pattern of the signal line by chemical plating again; and removing the nonconductor film pattern. Method. 12. As the step of forming the semiconductor layer, a contact layer having a higher carrier concentration than the active layer is formed on the active layer to form a two-layer structure, and after the final step of removing the nonconductor film pattern, 12. The method of manufacturing an active matrix substrate according to claim 11, further comprising the step of removing the contact layer constituting a channel portion, and forming a field effect transistor in the transistor formation region pattern. 13. The method of manufacturing an active matrix substrate according to claim 12, wherein the active layer is an amorphous silicon film containing hydrogen, and the contact layer is an amorphous silicon film containing an impurity of a Group 5 element. 14. The method for manufacturing an active matrix substrate according to claim 13, wherein at least phosphorus is contained as an impurity of the Group 5 element. 15. The method for manufacturing an active matrix substrate according to any one of claims 11 to 14, wherein the chemical plating step is performed using a plating solution containing phosphorus and containing nickel as a main component. 16. The semiconductor layer according to claim 11, wherein the semiconductor layer is made of an amorphous silicon film containing hydrogen, and the chemically plated metal film constituting at least the source/drain electrodes is made of a metal film containing phosphorus and containing nickel as a main component. A method for manufacturing an active matrix substrate. 17. Claim 11, wherein the chemically plated metal film has at least a two-layer structure, the first layer being a metal film mainly composed of nickel containing phosphorus, and the second layer being a copper film.
A method of manufacturing the active matrix substrate described above. 18. The method of manufacturing an active matrix substrate according to claim 11, wherein a step of applying a chemical plating catalyst is added to the step of forming the plating base pattern. 19. Claim 18, wherein the step of applying a catalyst for chemical plating comprises a step of immersing it in a catalyst solution containing palladium.
A method of manufacturing the active matrix substrate described above. 20. A step of forming a transparent conductive film as a plating base pattern on which the above insulating substrate is a transparent insulating substrate, and forming a plating base pattern corresponding to a predetermined gate and a scanning line connected thereto. 12. The method for manufacturing an active matrix substrate according to claim 11. 21. A liquid crystal comprising a counter electrode provided opposite to the pixel electrode of the active matrix substrate according to claim 1 or 2, and a gap between the pixel electrode and the counter electrode filled with liquid crystal and sealed to constitute a display cell. display element.