JPH044604A - Sealing base for electric component - Google Patents
Sealing base for electric componentInfo
- Publication number
- JPH044604A JPH044604A JP10565390A JP10565390A JPH044604A JP H044604 A JPH044604 A JP H044604A JP 10565390 A JP10565390 A JP 10565390A JP 10565390 A JP10565390 A JP 10565390A JP H044604 A JPH044604 A JP H044604A
- Authority
- JP
- Japan
- Prior art keywords
- sealing
- piezoelectric resonator
- sealing substrate
- piezoelectric
- bases
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000007789 sealing Methods 0.000 title claims abstract description 62
- 239000000919 ceramic Substances 0.000 claims abstract description 17
- 239000000758 substrate Substances 0.000 claims description 56
- 230000000694 effects Effects 0.000 abstract description 8
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 239000000853 adhesive Substances 0.000 abstract description 3
- 230000001070 adhesive effect Effects 0.000 abstract description 3
- 238000005520 cutting process Methods 0.000 abstract description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 16
- 238000010304 firing Methods 0.000 description 12
- 238000000605 extraction Methods 0.000 description 6
- 239000002994 raw material Substances 0.000 description 4
- 238000000465 moulding Methods 0.000 description 2
- 239000007779 soft material Substances 0.000 description 2
- 230000004308 accommodation Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Landscapes
- Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
[産業上の利用分野]
本発明は、加工性などに優れた電子部品の封止基板に関
する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a sealing substrate for electronic components that has excellent workability.
[従来の技術と発明が解決しようとする課題]従来、素
子を封止基板で封止した構造の電子部品、例えばチップ
型圧電部品が知られている。このチップ型圧電部品は、
通常、圧電基板に対向電極部及び引出電極部か形成され
た圧電共振子と、該圧電共振子の両面に接着剤等で接合
された封止基板と、該封止基板に形成された空間形成用
凹部とを有している。この封止基板には、圧電共振子を
保護するため、機械的強度が大きいことが要求される。[Prior Art and Problems to be Solved by the Invention] Hitherto, electronic components having a structure in which an element is sealed with a sealing substrate, such as a chip-type piezoelectric component, have been known. This chip type piezoelectric component is
Usually, there is a piezoelectric resonator in which a counter electrode part and an extraction electrode part are formed on a piezoelectric substrate, a sealing substrate bonded to both sides of the piezoelectric resonator with an adhesive, etc., and a space formed in the sealing substrate. It has a recess for use. This sealing substrate is required to have high mechanical strength in order to protect the piezoelectric resonator.
そこで、従来、封止基板としては、アルミナなどのセラ
ミックス板が使用されている。Therefore, a ceramic plate made of alumina or the like has conventionally been used as a sealing substrate.
しかしながら、このような封止基板は、高強度で緻密性
が高く、しかも硬度が大きく靭性に欠けるため、加工性
及び量産性に欠ける。However, such a sealing substrate has high strength and high density, and also has high hardness and lacks toughness, so it lacks workability and mass productivity.
さらには、高強度、高硬度の封止基板よりも圧電共振子
の強度か小さい。従って、製造工程において、圧電共振
子の両面に封止基板を積層・接合し、得られた積層体を
、封止基板に適合した刃を用いて切断してチップ片を作
製する場合には、圧電共振子か損傷し易く、歩留りが低
下し、ひいてはチップ型圧電部品がコスト高となる。Furthermore, the strength of the piezoelectric resonator is lower than that of a high-strength, high-hardness sealing substrate. Therefore, in the manufacturing process, when sealing substrates are laminated and bonded on both sides of a piezoelectric resonator and the resulting laminate is cut using a blade suitable for the sealing substrate to produce chip pieces, The piezoelectric resonator is easily damaged, the yield is reduced, and the cost of the chip-type piezoelectric component is increased.
一方、加工性及び量産性を高めるためには、軟質材料か
らなる封止基板を使用することも可能である。しかしな
がら、軟質材料からなる封IF基板は、機械的強度が小
さいので、空間を確保しつつ、圧電共振子を保護するこ
とか困難である。On the other hand, in order to improve processability and mass productivity, it is also possible to use a sealing substrate made of a soft material. However, since the sealed IF substrate made of a soft material has low mechanical strength, it is difficult to protect the piezoelectric resonator while securing space.
このように、従来の封止基板では、機械的強度と加工性
とを両立させることが困難である。As described above, with conventional sealing substrates, it is difficult to achieve both mechanical strength and workability.
従って、本発明の目的は、機械的強度及び加工性に優れ
、素子の保護効果に優れた電子部品の封止基板を提供す
ることにある。Therefore, an object of the present invention is to provide a encapsulation substrate for electronic components that has excellent mechanical strength and workability, and has an excellent element protection effect.
[課題を解決するための手段および作用]本発明は、素
子を封止する封止基板が、低温焼成したセラミックから
なる電子部品の封止基板により、上記課題を解決するも
のである。[Means and Effects for Solving the Problems] The present invention solves the above-mentioned problems by using a sealing substrate for electronic components in which the sealing substrate for sealing elements is made of ceramic fired at a low temperature.
この封止基板は、低温焼成したセラミックスであるため
、機械的に容易に加工できる。また低温焼成によりセラ
ミック原料を焼結しているので、封止基板は一体化して
いる。Since this sealing substrate is made of ceramics fired at a low temperature, it can be easily processed mechanically. Furthermore, since the ceramic raw material is sintered by low-temperature firing, the sealing substrate is integrated.
[実施例コ
以下に、添付図面に基づいて本発明をより詳細に説明す
る。[Example] The present invention will be explained in more detail below based on the accompanying drawings.
第1図は本発明の一実施例である電子部品を示す分解斜
視図、第2図は第1図に示す電子部品の断面図である。FIG. 1 is an exploded perspective view showing an electronic component according to an embodiment of the present invention, and FIG. 2 is a sectional view of the electronic component shown in FIG. 1.
この例では、電子部品としてチップ型圧電部品が示され
ている。In this example, a chip-type piezoelectric component is shown as the electronic component.
チップ型圧電部品の圧電共振子(1)は、圧電基板(2
)と、該圧電基板(2)の両面に対向して形成された対
向電極部(3a) (3b)と、該対向電極部(3a)
(3b)からそれぞれ反対方向に延設された入力用引
出電極部(4a)及び出力用引出電極部(4b)とて構
成されている。The piezoelectric resonator (1) of the chip-type piezoelectric component has a piezoelectric substrate (2
), counter electrode parts (3a) (3b) formed opposite to both sides of the piezoelectric substrate (2), and the counter electrode part (3a)
It is comprised of an input extraction electrode part (4a) and an output extraction electrode part (4b) extending in opposite directions from (3b), respectively.
前記圧電共振子(1)の両面の封止基板(5a)(5b
)は、低温焼成したセラミックで形成されている。また
封止基板(5a) (5b)のうち、圧電共振子(1)
の振動領域と対応する箇所には、それぞれ、空間形成用
凹部(6a) (6b)が形成されている。Sealing substrates (5a) (5b) on both sides of the piezoelectric resonator (1)
) is made of low-temperature fired ceramic. Also, among the sealing substrates (5a) and (5b), the piezoelectric resonator (1)
Space-forming recesses (6a) and (6b) are formed at locations corresponding to the vibration regions, respectively.
また第2図に示されるように、圧電共振子(1)と封止
基板(5a)(5b)とは、周縁部の接着剤(7a)
(7b)で接合・封止されている。Furthermore, as shown in FIG.
(7b) is joined and sealed.
さらに、入力用引出電極部(4a)と出力用引出電極部
(4b)は、それぞれ、圧電共振子(1)及び封止基板
(5a) (5b)の対応する箇所に形成された入力用
外部電極部(8a)と出力用外部電極部(8b)とに導
通している。Furthermore, the input extraction electrode part (4a) and the output extraction electrode part (4b) are formed at corresponding locations on the piezoelectric resonator (1) and the sealing substrate (5a) (5b), respectively. The electrode part (8a) and the output external electrode part (8b) are electrically connected.
このような構造のチップ型圧電部品では、封止基板(5
a) (5b)が、低温焼成したセラミックで形成され
ているため、空間形成用凹部(6a) (6b)を容易
に形成できると共に、面出し、端面研磨や切断性に優れ
ている。従って、量産性に優れ、封止基板(5a) (
5b)、ひいてはチップ型圧電部品の製造コストを低減
できる。また封止基板(5a) (5b)は、焼成によ
り焼結したセラミックであるため、圧電共振子(1)を
保護するために必要な機械的強度を備えているだけてな
く、透過性が小さく、密封性にも優れている。従って、
封止基板(5a) (5b)により、空間を確保した状
態で、圧電共振子(1)を保護できる。In a chip-type piezoelectric component having such a structure, a sealing substrate (5
a) Since (5b) is made of ceramic fired at a low temperature, the space-forming recesses (6a) and (6b) can be easily formed, and it is excellent in surface raising, end face polishing, and cutting performance. Therefore, it is excellent in mass production, and the sealing substrate (5a) (
5b), and thus the manufacturing cost of chip-type piezoelectric components can be reduced. Furthermore, since the sealing substrates (5a) and (5b) are made of ceramic sintered by firing, they not only have the mechanical strength necessary to protect the piezoelectric resonator (1), but also have low transparency. , and has excellent sealing properties. Therefore,
The piezoelectric resonator (1) can be protected by the sealing substrates (5a) and (5b) while maintaining space.
さらには、封止基板(5a) (5b)を構成する低温
焼成したセラミックスは、高温焼成したセラミックより
も多孔質であるため、次のような効果を奏する。Furthermore, since the low-temperature fired ceramics constituting the sealing substrates (5a) (5b) are more porous than the high-temperature fired ceramics, the following effects can be achieved.
(a)熱伝導率が小さいため、断熱性が大きく、圧電共
振子に外部から熱衝撃か作用するのを抑制できる。(b
)封止基板(5a> (5b)の外面に、蒸着やスパッ
タリング等の成膜手段により形成した外部電極(8a)
(8b)と、封止基板(5a) (5b)との密着性
に優れ、引出電極部(4a) (4b)と外部電極(8
a) (8b)との導通性を長期に亘り維持てきる。従
って、(a)の効果と相まって、共振特性の信頼性が向
上する。(a) Since the thermal conductivity is low, the heat insulation property is high, and it is possible to suppress external thermal shock from acting on the piezoelectric resonator. (b
) External electrode (8a) formed on the outer surface of the sealing substrate (5a> (5b) by a film forming method such as vapor deposition or sputtering)
(8b) and the sealing substrate (5a) (5b).
a) Maintains conductivity with (8b) over a long period of time. Therefore, in combination with the effect (a), the reliability of resonance characteristics is improved.
(C)チップ型圧電部品の外面にマーキングしてもマー
キング皮膜の脱落を防止でき、長期に亘りマーキング効
果を維持できる。(C) Even if the outer surface of a chip-type piezoelectric component is marked, the marking film can be prevented from falling off, and the marking effect can be maintained for a long period of time.
なお、封止基板は、通常の焼成温度よりも低く、かつ一
体に焼結可能な温度でセラミック原料を焼成することに
より得られる。焼成温度は、セラミック原料の種類に応
して選択できるが、通常の焼成の温度よりも50〜30
0℃程度低い温度で行なわれる。より具体的には、汎用
されているアルミナ基板の場合を例にとって説明すると
、前記従来の高強度、高硬度のアルミナ製封止基板は、
通常、アルミナを約1500℃で焼成することにより製
造している。このような高温焼成により得られたアルミ
ナ製封止基板は、こうせつ強度4500 r / cn
t程度、密度3.82g/cnf程度である。Note that the sealing substrate is obtained by firing the ceramic raw material at a temperature lower than a normal firing temperature and at a temperature at which they can be sintered together. The firing temperature can be selected depending on the type of ceramic raw material, but it is 50 to 30 degrees higher than the normal firing temperature.
It is carried out at a temperature as low as 0°C. More specifically, taking the case of a commonly used alumina substrate as an example, the conventional high-strength, high-hardness alumina sealing substrate has the following characteristics:
Usually, it is manufactured by firing alumina at about 1500°C. The alumina sealing substrate obtained by such high-temperature firing has a strength of 4500 r/cn.
The density is about 3.82 g/cnf.
これに対して、低温焼成したセラミックからなる封止基
板は、アルミナを1500℃未満の温度、例えば、12
00〜1450℃程度、好ましくは1400℃程度で焼
成することにより得られる。On the other hand, a sealing substrate made of ceramic fired at a low temperature is produced by heating alumina at a temperature below 1500°C, e.g.
It is obtained by firing at about 00 to 1450°C, preferably about 1400°C.
低温焼成により得られたアルミナ製封止基板は、こうせ
つ強度2000 kg / ctA程度、密度3.60
g/−程度である。The alumina sealing substrate obtained by low-temperature firing has a strength of about 2000 kg/ctA and a density of 3.60.
It is about g/-.
なお、1500℃の高温で焼成したアルミナ製封止基板
と、約1400℃の低温で焼成したアルミナ製封止基板
の加工性を比較したところ、低温焼成したアルミナ製封
止基板は、高温焼成したアルミナ製封止基板よりも、6
倍のスピードで面出し加工(ハマイ社製ラップ盤、5B
T使用)でき、また切断においても20mm/分の速度
で切断できる。また低温焼成したアルミナ製封止基板は
、高温焼成したアルミナ製封止基板よりも強度が若干低
下しているものの、圧電共振子を保護するために必要な
強度を備でいる。さらに、低温焼成したアルミナ製封止
基板は、高温焼成したアルミナ製封止基板と路間等の密
封性を示し、信頼性も高い。In addition, when we compared the workability of an alumina sealing substrate fired at a high temperature of 1500°C and an alumina sealing board fired at a low temperature of about 1400°C, we found that the alumina sealing substrate fired at a low temperature was superior to that fired at a high temperature. 6 than the alumina sealing substrate.
Surface processing at twice the speed (lap machine manufactured by Hamai Co., Ltd., 5B
It can also cut at a speed of 20 mm/min. Although the alumina sealing substrate fired at a low temperature has a slightly lower strength than the alumina sealing substrate fired at a high temperature, it still has the strength necessary to protect the piezoelectric resonator. Furthermore, the alumina sealing substrate fired at a low temperature exhibits sealing properties between paths and the like compared to the alumina sealing substrate fired at a high temperature, and is highly reliable.
さらに、低温焼成して得られたアルミナ製封止基板は、
通常、誘電率が7〜8程度であるため、圧電部品の特性
低下もない。Furthermore, the alumina sealing substrate obtained by low-temperature firing is
Since the dielectric constant is usually about 7 to 8, there is no deterioration in the characteristics of the piezoelectric component.
なお、封止基板に凹部などを形成する必要がある場合に
は、セラミックス原料の成形加工と同時に、又は焼成後
に成形加工により凹部を形成してもよい。Note that if it is necessary to form a recess or the like in the sealing substrate, the recess may be formed simultaneously with the molding of the ceramic raw material or by molding after firing.
また封止基板の凹部は必ずしも必要ではない。Further, the recessed portion of the sealing substrate is not necessarily required.
すなわち、封止基板と圧電共振子との間の空間を、上記
凹部によらず、スペーサとして機能する接着剤(7a)
(7b)層の厚みにより確保してもよい。That is, the space between the sealing substrate and the piezoelectric resonator is filled with the adhesive (7a) that functions as a spacer, without depending on the recess.
(7b) It may be ensured by the thickness of the layer.
さらに、加工性に優れる封止基板には、前記凹部に限ら
ず、例えば、圧電共振子を載置収容可能な載置段部を有
する収容凹部などを形成してもよい。Furthermore, the sealing substrate with excellent workability is not limited to the above-mentioned recess, but may also include, for example, an accommodation recess having a mounting step on which a piezoelectric resonator can be placed and accommodated.
圧電共振子の電極構造は、圧電基板に少なくとも一対の
対向電極部か形成されている限り、特に制限されない。The electrode structure of the piezoelectric resonator is not particularly limited as long as at least one pair of opposing electrode portions is formed on the piezoelectric substrate.
例えば、圧電共振子は、圧電基板の一方の面で対向する
少なくとも一対の対向電極部と、該対向電極部から延設
された引出電極部と、圧電基板の他方の面で上記対向電
極部と対応する箇所に形成された共通電極部と、共通電
極部から延設されたアース用引出電極部とで構成しても
よい。For example, a piezoelectric resonator includes at least one pair of opposing electrode sections facing each other on one surface of a piezoelectric substrate, an extraction electrode section extending from the opposing electrode section, and the above-mentioned opposing electrode section on the other surface of the piezoelectric substrate. It may be configured by a common electrode part formed at a corresponding location and a grounding lead electrode part extending from the common electrode part.
本発明は圧電部品に限らす、素子を封止することが要求
される種々の電子部品にも適用できる。The present invention is not limited to piezoelectric components, but can also be applied to various electronic components in which elements are required to be sealed.
[発明の効果]
以上のように、本発明によれば、素子を封止する封止基
板が、低温焼成したセラミックであるため、機械的強度
及び加工性に優れ、素子の保護効果に優れている。[Effects of the Invention] As described above, according to the present invention, since the sealing substrate for sealing the element is made of ceramic fired at a low temperature, it has excellent mechanical strength and workability, and has an excellent protection effect for the element. There is.
第1図は本発明の一実施例である電子部品を示す分解斜
視図、
第2図は第1図に示す電子部品の断面図である。
(1)・・・圧電共振子、(5a) (5b)・・・封
止基板出 願人 株式会社村田製作所FIG. 1 is an exploded perspective view showing an electronic component according to an embodiment of the present invention, and FIG. 2 is a sectional view of the electronic component shown in FIG. 1. (1) Piezoelectric resonator, (5a) (5b) Sealing substrate Applicant Murata Manufacturing Co., Ltd.
Claims (1)
からなることを特徴とする電子部品の封止基板。A sealing substrate for electronic components, characterized in that the sealing substrate for sealing an element is made of ceramic fired at a low temperature.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10565390A JPH044604A (en) | 1990-04-21 | 1990-04-21 | Sealing base for electric component |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10565390A JPH044604A (en) | 1990-04-21 | 1990-04-21 | Sealing base for electric component |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH044604A true JPH044604A (en) | 1992-01-09 |
Family
ID=14413408
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10565390A Pending JPH044604A (en) | 1990-04-21 | 1990-04-21 | Sealing base for electric component |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH044604A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6448696B2 (en) | 1999-12-20 | 2002-09-10 | Murata Manufacturing Co., Ltd. | Outer coating substrate for electronic component and piezoelectric resonant component |
US6744179B2 (en) | 1999-12-20 | 2004-06-01 | Murata Manufacturing Co., Ltd. | Piezoelectric resonator and piezoelectric oscillator |
DE19819036B4 (en) * | 1997-05-07 | 2013-10-24 | Murata Mfg. Co., Ltd. | Device with electronic components |
-
1990
- 1990-04-21 JP JP10565390A patent/JPH044604A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19819036B4 (en) * | 1997-05-07 | 2013-10-24 | Murata Mfg. Co., Ltd. | Device with electronic components |
US6448696B2 (en) | 1999-12-20 | 2002-09-10 | Murata Manufacturing Co., Ltd. | Outer coating substrate for electronic component and piezoelectric resonant component |
US6744179B2 (en) | 1999-12-20 | 2004-06-01 | Murata Manufacturing Co., Ltd. | Piezoelectric resonator and piezoelectric oscillator |
US6865090B2 (en) | 1999-12-20 | 2005-03-08 | Murata Manufacturing Co., Ltd. | Outer coating substrate for electronic component and piezoelectric resonant component |
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