JPH0437044A - Mounting method of semiconductor device - Google Patents

Abstract

PURPOSE:To easily connect an electrode wiring and a bump without imperfect connection, by a method wherein, after a substrate and a semiconductor element are bonded by using insulative resin, the electrode wiring and the bump are connected by electroless plating. CONSTITUTION:For example, photosetting insulative resin 6 is dropped on a circuit board 4 or the side of an LSI chip 3. A bump 2 and an electrode 5 of the board 4 are position-aligned. The chip 3 is pressed with pressure, thereby almost bringing the bumps into electric contact with the electrodes 5. The resin 6 is cured by projecting, e.g. UV rays. When the board is transparent, the UV rays may be projected from the rear. After the resin is cured, a pressing jig 7 is removed, thus completing the connection of the chip 3 and the board 4. After that, the board 4 is dipped in Au electroless plating liquid 11 in a plating tank 10. Thereby Au is subjected to electroless plating on the contact parts of the bumps 2 and the electrodes 5, so that the bumps 2 and the electrodes 5 are completely bonded. After that, further, the whole part of the semiconductor element is sealed with resin.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to COB packaging, which is a semiconductor packaging method.

2. Description of the Related Art A conventional COB mounting method includes, for example, a micro bump bonding method (MBB mounting).

A conventional MBB mounting method will be explained with reference to FIGS. 3 and 4.

First, a cross section after connection is shown in FIG. 3(a). The MBB mounting method is composed of three elements: an LSI chip 32 having bumps 3I on an LSI electrode 30, a circuit board 33, and a photocurable insulating resin 35. The LSI chip 32 is fixed face down to the circuit board 33 by a photocurable insulating resin 35, and the bumps 31 of the LSI chip 32 and the electrodes 3 of the circuit board
4 are pressure-welded by the shrinkage force of the photocurable insulating resin 35. Figure 3(b) shows the connection principle. LSI chip 3
The gap h between the bump 2 and the circuit board 33 is regulated by the thickness of the bump 31, but when the photocurable insulating resin 35 is cured in this state, a shrinkage force W acts with a shrinkage amount of Δh. In addition, the LSI chip 32 and the photocurable insulating resin 35
Since adhesion forces α and β act between the circuit board 33 and the photocurable insulating resin 35, the bumps 31 and the electrodes 34 of the circuit board are pressed together and connected.

FIG. 4 shows the process of the MBB mounting method. First, the photocurable insulating resin 35 is dropped onto the circuit board 33 or on the LSI chip 32 side using a dispenser or the like (a). Then,
The bumps 31 of the LSI chip 32 and the electrodes 34 of the circuit board are aligned (b). If the circuit board 33 is a glass plate, this alignment is performed from the glass plate side, and if the circuit board 33 is an opaque substrate, two cameras are used to recognize the patterns on both the LSI chip 32 side and the circuit board 33 side and combine them. Once the alignment is complete, pressurize the LSI chip 32 (C)
. This pressurization causes the photocurable insulating resin 35 to be discharged from between the bumps 31 of the LSI chip 32 and the electrodes 34 of the circuit board, and the bumps 31 and the electrodes 34 of the circuit board come into electrical contact.

Next, the photocurable insulating resin 35 is cured by irradiating ultraviolet light (d). At this time, if the substrate 33 is transparent such as glass, UV light may be irradiated from the back side as shown in (e). When the pressing jig 36 is removed after curing is completed, the connection between the LSI chip 32 and the electrodes 34 of the circuit board is completed (f). In this way, the mounting of the LSI chip 32 onto the circuit board 33 is completed.

Problems to be Solved by the Invention However, the conventional examples have the following problems.

When connecting the circuit board 33 and the LSI chip 32 by pressure, it is difficult to maintain the parallelism between the pressure jig 36, the circuit board 33, and the LSI chip 32, and the bumps 31 and the electrodes 34 of the circuit board Poor connections are likely to occur. Also, bump 3
A poor connection occurs between the bump 31 and the electrode 34 of the circuit board due to insufficient discharge of the photocurable resin 35 between the bump 1 and the electrode 34 of the circuit board.

There was a problem.

In view of this, an object of the present invention is to provide a method for connecting bumps and electrodes of a circuit board without connection failure.

Means for Solving the Problems The present invention forms electrode wiring on an insulating substrate at a position corresponding to the electrode of a semiconductor element, aligns a semiconductor element having a bump to an electrode portion corresponding to the electrode wiring, and then applies an insulating resin. The present invention provides a method in which a substrate and a semiconductor element are bonded by a method, an electrode wiring and a bump are brought into contact with each other, an electrode wiring and a bump are joined by an electroless plating method such as Au, and then the entire semiconductor element is sealed with a resin. The bump is made of Au, for example,
For the outermost surface of the electrode wiring, a material such as Ni, which has a greater ionization tendency than Au, is used.

Function As in the present invention, by connecting the electrode wiring and the bumps by electroless plating after bonding the substrate and the semiconductor element with an insulating resin, the electrode wiring and the bumps can be easily connected without connection failure.

Embodiment A method according to an embodiment of the present invention will be explained with reference to FIGS. 1 and 2.

First, a cross section after connection is shown in FIG. 1(a). The present invention is based on L
It is composed of three elements: an LSI chip 3 having bumps 2 on an SI electrode 1, a circuit board 4, and an insulating resin 6 such as photocurable resin. The bumps 2 are made of, for example, Au, and the electrodes 5 of the circuit board are made of, for example, Ni, which has a higher ionization tendency than Au. At this time, the LSI chip 3 used is one in which all parts other than the LSI electrodes 1 and bumps 2 are covered with an insulating protective film 100. The LSI chip 3 is fixed face-down to the circuit board 4 by, for example, a photocurable insulating resin 6, and the LSI chip 3 is
The bumps 2 of the I-chip 3 and the electrodes 5 of the circuit board are brought into contact by the contraction force of the photocurable insulating resin 6. At this time, the amount of photocurable resin 6 is set so that it does not spread to the positions of the electrodes 5 and bumps 2 of the circuit board.

After this, the circuit board 4 to which the LSI chip 3 was bonded was made of Au
By immersing the bump 2 in the electroless plating solution, the portion where the bump 2 contacts the electrode 5 of the circuit board is electrolessly plated with Au, and the gap between the bump 2 and the electrode 5 of the circuit board is completely covered by the electroless plated Au. to be joined to. After this, the entire LSI chip 3 is sealed with resin. FIG. 1(b) shows the connection principle. The gap h between the LSI chip 3 and the circuit board 4 is
Although it is regulated by the thickness of the bump 2, when the photocurable insulating resin 6 is cured in this state, a shrinkage force W acts with a shrinkage amount of Δh. Furthermore, since adhesion forces α and β act between the LSI chip 3 and the photocurable insulating resin 6 and between the circuit board 4 and the photocurable insulating resin 6, the bumps 2 and the electrodes 5 of the circuit board are pressed together. be brought into contact.

FIG. 2 shows the process of the mounting method in the present invention. First, for example, a photocurable insulating resin 6 is dropped onto the circuit board 4 or on the LSI chip 4 side using a dispenser or the like. FIG. 2 shows a state in which six drops of resin have been dropped on the substrate 4 side. At this time, the amount of the photocurable resin 6 is set so that it does not spread to the bumps 2 and the electrodes 5 of the circuit board when the subsequent pressurizing process is performed (a).

Next, the bumps 2 of the LSI chip 3 and the electrodes 5 of the circuit board
(b). If the circuit board 4 is a glass plate, this alignment is performed from the glass plate side; if the circuit board 4 is an opaque substrate, two cameras are used to recognize the patterns on both the LSI chip 3 surface and the circuit board 4 surface, and the patterns are combined. After the alignment is completed, the LSI chip 3 is pressurized. By applying this pressure, the photocurable insulating phase ffW6 is spread out to the front of the bumps 2 of the LsI chip 3 and the electrodes 5 of the circuit board, so that the bumps 2 and the electrodes 5 of the circuit board are almost electrically in contact with each other. Next, the photocurable insulating resin 6 is cured by irradiating UV light as shown in (C), for example. In addition, when the substrate 4 is transparent, (
UV light may be irradiated from the back side as in d). When the pressing jig 7 is removed after curing is completed, the connection between the LSI chip 3 and the circuit board 4 is completed. After that, the circuit board 4 to which the LSI chip 3 is bonded is immersed in the Au electroless plating solution 1 in the plating bath 10, so that Au is electrolessly plated on the part where the bump 2 contacts the electrode 5 of the circuit board. , the bumps 2 and the electrodes 5 of the circuit board are completely bonded with electroless plated Au. After this, the entire semiconductor element is further sealed with resin, and the mounting of the LSI chip 3 onto the circuit board 4 is completed.

The above method prevents poor connection between the bumps 2 and the electrodes 5 of the circuit board due to insufficient parallelism between the pressing jig 7, the LSI chip 3, and the circuit board 4, and Connection failures due to insulating resin remaining between the two can be significantly reduced.

As described in detail, according to the present invention, electrode wiring is formed on an insulating substrate at a position corresponding to the electrode of a semiconductor element, and a semiconductor element having a bump is positioned on an electrode portion corresponding to the electrode wiring. By using a method in which the substrate and the semiconductor element are bonded using a laminated insulating resin, the electrode wiring and the bumps are brought into contact with each other, the electrode wiring and the bumps are bonded by electroless plating, and then the entire semiconductor element is encapsulated with the resin. Pressure jig and L
To significantly reduce connection failures between bumps and circuit board electrodes due to insufficient parallelism between the SI chip and the circuit board, and connection failures due to residual insulating resin between bumps and circuit board electrodes. This makes a sufficient contribution to the mounting of semiconductor devices.

[Brief explanation of drawings]

4 is a connection principle diagram in a conventional example, and FIGS. 4(a) to 4(f) are process step cross-sectional views of a mounting method in a conventional example. Engineering: LSI electrode, 2: bump, 3: LSI
chip, 4... circuit board, 5... electrode of circuit board,
6... Photocurable insulating resin, 7... Pressure jig. Name of agent: Patent attorney Shigetaka Awano Haka1 J-”1-
81 electric 1 to 2-...7\\'7+ 36- LS I tWr 3 to 1=-Hanph 32...LSI t7'' 33゛ Recirculation board 34... Regeneration base 1 reversion 35 -Light heat and heat treatment 3?

Claims (2)

[Claims] (1) Form an electrode wiring on an insulating substrate at a position corresponding to the electrode of a semiconductor element, align the metal protrusion of the semiconductor element having a metal protrusion on an electrode portion corresponding to the electrode wiring, and the electrode wiring; A substrate on which an insulating resin is applied to areas other than the metal protrusions and electrode wiring of a substrate or a semiconductor element, the substrate and the semiconductor element are bonded using the insulating resin, the electrode wiring and the metal protrusion are brought into contact, and then the semiconductor element is bonded. A method for mounting a semiconductor device, comprising immersing the semiconductor element in an electroless plating solution, bonding the electrode wiring and the metal protrusion by electroless plating, and then sealing the semiconductor element with a resin. (2) The metal protrusion is made of gold, the outermost surface of the electrode wiring is made of a substance such as nickel that has a greater ionization tendency than gold, and the electroless plating method used to join the metal protrusion and the electrode wiring is electroless plating of gold. 2. The method for mounting a semiconductor device according to claim 1.