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JPH04352377A - Submount for semiconductor laser element - Google Patents

Submount for semiconductor laser element

Info

Publication number
JPH04352377A
JPH04352377A JP15590291A JP15590291A JPH04352377A JP H04352377 A JPH04352377 A JP H04352377A JP 15590291 A JP15590291 A JP 15590291A JP 15590291 A JP15590291 A JP 15590291A JP H04352377 A JPH04352377 A JP H04352377A
Authority
JP
Japan
Prior art keywords
submount
semiconductor laser
laser chip
solder
die
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15590291A
Other languages
Japanese (ja)
Inventor
Toshio Usuki
臼木 俊雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP15590291A priority Critical patent/JPH04352377A/en
Publication of JPH04352377A publication Critical patent/JPH04352377A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205Shape
    • H01L2224/32057Shape in side view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385Shape, e.g. interlocking features

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To prevent a die-bonded solder from coming into contact with a junction part including an active region and blocking off a laser beam when a J/D is assembled in order to obtain a low heat resistance and a low drooping characteristic. CONSTITUTION:The face of a submount 3, on which a semiconductor laser chip 1 is mounted, is formed to be recessed and protruding shapes. It is possible to prevent an excess solder from flowing to recessed parts in the submount, coming into contact with a junction part in the semiconductor laser chip and blocking off a laser beam.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】この発明は半導体レーザ素子用サ
ブマウントに関し、特に半導体レーザ素子のダイボンド
時にはみ出した半田がレーザ動作に与える悪影響を防止
できる半導体レーザ素子用サブマウントに関するもので
ある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a submount for a semiconductor laser device, and more particularly to a submount for a semiconductor laser device that can prevent solder that protrudes during die bonding of a semiconductor laser device from having an adverse effect on laser operation.

【0002】0002

【従来の技術】図2は半導体レーザチップを従来の半導
体レーザ素子用サブマウントを用いてダイボンドした状
態を示す斜視図である。図において、1はレーザチップ
、2はサブマウント、4は金属ブロック、5は半田、6
,7はレーザ光である。
2. Description of the Related Art FIG. 2 is a perspective view showing a state in which a semiconductor laser chip is die-bonded using a conventional semiconductor laser element submount. In the figure, 1 is a laser chip, 2 is a submount, 4 is a metal block, 5 is solder, 6
, 7 are laser beams.

【0003】次に動作について説明する。図2に示すよ
うに、一般にレーザチップ1は放熱の良い金属ブロック
4にサブマウント2を介して接着される。レーザチップ
1のサブマウント2への固着には半田5が用いられる。 レーザチップ1の上面及び下面に設けられた図示しない
電極間にレーザチップ内に形成されるpn接合に対して
順方向バイアスをかけることにより、レーザチップ1の
前端面及び後端面からレーザ光6,7が出射される。後
端面から出射されたレーザ光7は、前端面から出射され
たレーザ光6の出力を制御するためのモニタ光として用
いられる。
Next, the operation will be explained. As shown in FIG. 2, a laser chip 1 is generally bonded via a submount 2 to a metal block 4 with good heat dissipation. Solder 5 is used to fix the laser chip 1 to the submount 2. By applying a forward bias to the pn junction formed in the laser chip between electrodes (not shown) provided on the upper and lower surfaces of the laser chip 1, laser beams 6, 7 is emitted. The laser beam 7 emitted from the rear end surface is used as monitor light for controlling the output of the laser beam 6 emitted from the front end surface.

【0004】ところで、半導体レーザをODDやプリン
タに使用する場合には、低熱抵抗や低ドループ特性を得
るために、発光領域をサブマウント8に近づけて組み立
てを行うジャンクションダウン(J/D)組立が必要不
可欠である。この場合、発光領域が接着から約数μmの
位置にあるため、ダイボンドした後の半田5が組立上問
題となる。
By the way, when semiconductor lasers are used in ODDs or printers, junction down (J/D) assembly is used, in which the light emitting region is assembled close to the submount 8, in order to obtain low thermal resistance and low droop characteristics. It is essential. In this case, since the light emitting region is located at a position approximately several micrometers from the adhesive, the solder 5 after die bonding poses a problem in assembly.

【0005】[0005]

【発明が解決しようとする課題】従来の半導体レーザ素
子用サブマウントは以上のように構成されているので、
ダイボンドした際のサブマウント8の表面にはみ出して
上方向に盛り上がった半田が発光領域のジャンクション
部に接触してショート不良を発生したり、レーザチップ
後端面より出射したレーザ光7がはみ出した半田により
異方向に反射されてモニタ電流が小となる不良が発生す
るといった問題点があった。
[Problem to be Solved by the Invention] Since the conventional submount for semiconductor laser elements is constructed as described above,
The solder that protrudes upward from the surface of the submount 8 during die bonding may come into contact with the junction part of the light emitting area and cause a short circuit, or the laser beam 7 emitted from the rear end of the laser chip may be caused by the protruding solder. There is a problem in that a defect occurs in which the monitor current is small due to reflection in a different direction.

【0006】この発明は上記のような問題点を解消する
ためになされたもので、ダイボンドした際のはみ出した
半田によりショート不良やレーザ光の異方向への反射不
良が発生することのない歩留り,信頼性の高い半導体レ
ーザ素子用サブマウントを得ることを目的とする。
[0006] This invention was made in order to solve the above-mentioned problems, and it is possible to improve the yield without causing short-circuit defects or defects in reflection of laser light in different directions due to protruding solder during die bonding. The purpose is to obtain a highly reliable submount for a semiconductor laser device.

【0007】[0007]

【課題を解決するための手段】この発明に係る半導体レ
ーザ素子用サブマウントは、少なくともサブマウントの
半導体レーザチップを載置する領域を凹凸形状に形成し
たものである。
[Means for Solving the Problems] A submount for a semiconductor laser device according to the present invention is such that at least the region of the submount on which a semiconductor laser chip is placed is formed into an uneven shape.

【0008】[0008]

【作用】この発明における半導体レーザ素子用サブマウ
ントは、少なくともサブマウントのレーザチップを載置
する領域を凹凸に形成したから、レーザチップはサブマ
ウントの凸部にダイボンドされ、ダイボンドした際に用
いた半田はサブマウントの凹部へ流れ出し、半田がレー
ザチップ,特に発光領域を含めたジャンクション部に接
触することはない。
[Operation] In the submount for a semiconductor laser device according to the present invention, at least the region on which the laser chip of the submount is mounted is formed with unevenness, so that the laser chip is die-bonded to the convex portion of the submount, and the laser chip is used when die-bonding. The solder flows out into the recessed portion of the submount, and the solder does not come into contact with the laser chip, especially the junction portion including the light emitting region.

【0009】[0009]

【実施例】以下、この発明の一実施例を図について説明
する。図1は半導体レーザチップを本発明の一実施例に
よる半導体レーザ素子用サブマウントを用いてダイボン
ドした状態を示す斜視図である。図において、1は半導
体レーザチップ、3は本実施例のサブマウントで、半導
体レーザチップ1を載置する面は全面が凹凸形状に形成
されている。また、4は金属ブロック、5は半田、6,
7はレーザ光である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a perspective view showing a state in which a semiconductor laser chip is die-bonded using a semiconductor laser element submount according to an embodiment of the present invention. In the figure, 1 is a semiconductor laser chip, 3 is a submount of this embodiment, and the entire surface on which the semiconductor laser chip 1 is placed is formed into an uneven shape. Also, 4 is a metal block, 5 is solder, 6,
7 is a laser beam.

【0010】本実施例は、サブマウント3の半導体レー
ザチップ1を載置する面を複数の凹凸を有する形状とし
ているのが特徴である。このような本実施例によれば、
サブマウント3の半導体レーザチップ1を載置する面を
凹凸形状に形成したので、半導体レーザチップ1はサブ
マウント3の凸部にダイボンドされることとなり、ダイ
ボンドした際にはみ出した半田5は凸部より低い凹部に
流れ、上方に盛り上がらない。よって、低熱抵抗,低ド
ループ特性を得るためのJ/D組立ての際にも、レーザ
チップ1の発光領域を含めたジャンクション部にダイボ
ンドした半田が接触することはなく、これにより、ショ
ート不良やレーザ光が異方向に反射して生ずるモニタ電
流小不良を防止することができる。
This embodiment is characterized in that the surface of the submount 3 on which the semiconductor laser chip 1 is placed has a shape having a plurality of projections and depressions. According to this embodiment,
Since the surface of the submount 3 on which the semiconductor laser chip 1 is placed is formed into an uneven shape, the semiconductor laser chip 1 is die-bonded to the convex part of the submount 3, and the solder 5 that protrudes when die-bonding is applied to the convex part. It flows into lower depressions and does not rise upwards. Therefore, even during J/D assembly to obtain low thermal resistance and low droop characteristics, the die-bonded solder does not come into contact with the junction part including the light emitting area of the laser chip 1, which prevents short circuit defects and laser It is possible to prevent small monitor current defects caused by light being reflected in different directions.

【0011】なお、上記実施例では半導体レーザチップ
1を載置する面の全面にわたって凹凸を設けたサブマウ
ントについて示したが、該凹凸は、半導体レーザチップ
1が載置される領域のみに設けるようにしてもよく、こ
の場合においても上記実施例と同様の効果を奏する。
[0011] In the above embodiment, a submount is shown in which unevenness is provided over the entire surface on which the semiconductor laser chip 1 is placed, but the unevenness is provided only in the area where the semiconductor laser chip 1 is placed. In this case as well, the same effects as in the above embodiment can be achieved.

【0012】0012

【発明の効果】以上のように、この発明によれば、少な
くともサブマウントの半導体レーザチップ搭載領域を凹
凸形状に形成したので、半導体レーザチップはその凸部
にダイボンドされるとともにダイボンドした際の半田は
凹部に流れ、これにより、ダイボンドした際のはみ出し
た半田が発光領域を含めたジャンクションへ接触してシ
ョートしたり、レーザ光が異方向へ反射してモニタ電流
が小となる不具合を防止でき、歩留り及び信頼性を向上
できるという効果がある。
As described above, according to the present invention, at least the semiconductor laser chip mounting area of the submount is formed in an uneven shape, so that the semiconductor laser chip is die-bonded to the convex portion and the solder at the time of die-bonding is reduced. flows into the recess, thereby preventing problems such as the protruding solder that comes into contact with the junction including the light emitting area during die bonding and causing a short circuit, or the laser light being reflected in a different direction and reducing the monitor current. This has the effect of improving yield and reliability.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】この発明の一実施例による半導体レーザ素子用
サブマウントを用いてレーザチップをダイボンドした状
態を示す斜視図である。
FIG. 1 is a perspective view showing a state in which a laser chip is die-bonded using a submount for a semiconductor laser device according to an embodiment of the present invention.

【図2】従来の半導体レーザ素子用サブマウントを用い
てレーザチップをダイボンドした状態を示す斜視図であ
る。
FIG. 2 is a perspective view showing a state in which a laser chip is die-bonded using a conventional submount for a semiconductor laser element.

【符号の説明】[Explanation of symbols]

1  レーザチップ 2  従来例のサブマウント 3  本発明の一実施例によるサブマウント4  金属
ブロック 5  半田 6  レーザ光 7  レーザ光
1 Laser chip 2 Conventional submount 3 Submount according to an embodiment of the present invention 4 Metal block 5 Solder 6 Laser light 7 Laser light

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  半導体レーザチップを金属ブロックに
接着する際に、該半導体レーザチップと金属ブロックと
の間に配置される半導体レーザ素子用サブマウントにお
いて、少なくとも前記半導体レーザチップを載置する領
域が凹凸形状に形成されていることを特徴とする半導体
レーザ素子用サブマウント。
1. When a semiconductor laser chip is bonded to a metal block, in a semiconductor laser element submount disposed between the semiconductor laser chip and the metal block, at least an area on which the semiconductor laser chip is placed is A submount for a semiconductor laser element characterized by being formed in an uneven shape.
JP15590291A 1991-05-29 1991-05-29 Submount for semiconductor laser element Pending JPH04352377A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15590291A JPH04352377A (en) 1991-05-29 1991-05-29 Submount for semiconductor laser element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15590291A JPH04352377A (en) 1991-05-29 1991-05-29 Submount for semiconductor laser element

Publications (1)

Publication Number Publication Date
JPH04352377A true JPH04352377A (en) 1992-12-07

Family

ID=15616015

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15590291A Pending JPH04352377A (en) 1991-05-29 1991-05-29 Submount for semiconductor laser element

Country Status (1)

Country Link
JP (1) JPH04352377A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004077630A1 (en) * 2002-12-26 2004-09-10 Sony Corporation Semiconductor laser assembly
CN100449889C (en) * 2002-12-26 2009-01-07 索尼株式会社 Semiconductor laser assembly
EP2226909A1 (en) * 2007-12-28 2010-09-08 Mitsubishi Electric Corporation Laser light source device
WO2013185965A1 (en) * 2012-06-15 2013-12-19 Robert Bosch Gmbh Composite component and method for producing a composite component

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004077630A1 (en) * 2002-12-26 2004-09-10 Sony Corporation Semiconductor laser assembly
EP1577992A1 (en) * 2002-12-26 2005-09-21 Sony Corporation Semiconductor laser assembly
EP1577992A4 (en) * 2002-12-26 2006-01-11 Sony Corp Semiconductor laser assembly
CN100449889C (en) * 2002-12-26 2009-01-07 索尼株式会社 Semiconductor laser assembly
US7502397B2 (en) * 2002-12-26 2009-03-10 Sony Corporation Semiconductor laser assembly
EP2226909A1 (en) * 2007-12-28 2010-09-08 Mitsubishi Electric Corporation Laser light source device
EP2226909A4 (en) * 2007-12-28 2012-07-04 Mitsubishi Electric Corp Laser light source device
US8553738B2 (en) 2007-12-28 2013-10-08 Mitsubishi Electric Corporation Laser light source device
WO2013185965A1 (en) * 2012-06-15 2013-12-19 Robert Bosch Gmbh Composite component and method for producing a composite component

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