JPH04317348A - IC carrier - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC carrier. Specifically, pin grid array type I having multiple pins
The present invention relates to an IC carrier for holding C and mounting it on a characteristic testing machine.

[0002] In recent years, IC carriers used for ICs with pin grid array lead pins, which have increased in number of pins and become finer in pitch, are used for characteristic tests while protecting the lead pins when performing characteristic tests while holding the IC in the carrier. Accurate contact with the contact pin is an important issue.

0003

[Prior Art] Figure 4 shows a conventional pin grid array type IC.
FIG. 5 shows a conventional IC carrier. In FIG. 4, (a) is a top view, (b) is a side view, and (c) is a bottom view. Reference numeral 1 denotes a package body, on which a plurality of lead pins 2 are implanted in a matrix.

Furthermore, in FIG. 5, (a) is a perspective view, and (b) is a perspective view.
) is a cross-sectional view taken along line bb in (a), (c) is a cross-sectional view taken along line bb in figure (b)
) is an enlarged view of part c in the figure. In the figure, 3 is a carrier body made of an insulator, and the carrier body has a recess 4 for accommodating an IC, a plurality of protection holes 5 for inserting and protecting IC lead pins, and a hole 6 for positioning. It is formed. Note that the protective hole 5 is provided with a taper 5a for guiding the tip of the lead pin so that it can be easily inserted, as shown in FIG.

[0005]This IC carrier 7 is shown in FIG. 6(a).
A pin grid array type IC 8 is held as shown in FIG. 2, and further mounted on a test board 9 of a characteristic testing device as shown in FIG. At this time, the IC carrier 7 is aligned by fitting the positioning hole 6 into the positioning pin 11 provided on the contact pin implantation block 10 of the test board 9, and inserts the IC carrier 7 through the protection hole 5. The lead pins 2 and the contact pins 12 of the test board 9 are brought into contact with each other.

[0006]

[Problem to be solved by the invention] Pin grid array I
In the case of C, as the arrangement pitch of the lead pins becomes finer, the contact pins of the characteristic testing device also become thinner accordingly. Therefore, as in the conventional IC carrier described with reference to FIG. and the arrangement pitch error of the contact pins 12 cannot be absorbed, making it impossible to make accurate contact. Another problem is that the tip of the lead pin 2 is easily deformed.

The present invention aims to realize an IC carrier that enables accurate contact between the lead pins of a pin grid array type IC having a fine pitch and the contact pins of a characteristic testing device.

[0008]

[Means for Solving the Problems] In the IC carrier of the present invention, an IC carrier for holding a pin grid array type IC having a plurality of lead pins and mounting it on a characteristic testing device is provided.
In the carrier, the protective hole 5 for protecting the lead pin is
It is characterized by being longer than the length of the lead pin 2 of C, and having a taper 5b that widens toward the exit side formed on the opposite side to the lead pin insertion side. By adopting this configuration, an IC carrier can be obtained that enables accurate contact between the lead pins of a pin grid array type IC having a fine pitch and the contact pins of a characteristic testing device.

[0009]

[Operation] The IC carrier of the present invention can completely protect the lead pins 2 of a pin grid array type IC by making the holes 5 for protecting the lead pins 2 longer than the lead pins 2. Further, by providing a taper at the lower end of the protective hole 5, the contact pin 12 of the characteristic testing device can be guided, and accurate contact with the lead pin 2 can be made.

0010

[Example] FIG. 1 is a diagram showing an example of the present invention, (a
) is a perspective view, (b) is a sectional view taken along line bb of FIG.

The IC carrier of this embodiment is made of an insulating material, and includes a recess 4 for accommodating the IC, a plurality of protective holes 5 provided at the bottom of the recess for protecting lead pins, and a plurality of protective holes 5 provided outside the recess. The formation of the alignment hole 6 is similar to the conventional example explained in FIG. In addition, as shown in FIG. 1(c), a taper 5b that widens toward the exit side is formed on the side opposite to the lead pin insertion side. Note that, as in the conventional example, a taper 5a is also provided on the inlet side.

This embodiment thus constructed is used as shown in FIG. First, as shown in Figure (a),
A pin grid array type IC 8 is accommodated in the recess 4, and its lead pin 2 is inserted into the protection hole 5. At this time, the lead pin 2 does not protrude beyond the protection hole 5, so it is completely protected.

Next, as shown in FIG. 2(b), the IC carrier 7 holding the pin grid array IC 8 is fitted with its positioning hole 6 into the positioning pin 11 of the contact pin implantation block 10 of the tested board 9. Then, it is attached to the contact pin implantation block 10.

In this case, the contact pin 12 of the test board 9 is inserted into the outer cylinder 13 by the spring 14, as shown in FIG.
The lead pins 2 of the IC held in the IC carrier 7 are pushed up by the IC carrier 7, but even if there is an error in the pitch, the taper 5 provided in the protective hole 5
Since it is guided by b, it can smoothly come into contact with the lead pin 2.

[0015]

According to the present invention, in the IC carrier, the lead pins can be sufficiently protected by making the holes for protecting the lead pins longer than the lead pins and tapering the exit side thereof.

In addition, when holding an IC and mounting it on a characteristic testing device, the tip of the contact pin can be guided by the taper, so even if there is some pick error in the contact pin, the lead pin can be attached smoothly and accurately. can be brought into contact.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an embodiment of the present invention, in which (a) is a perspective view;
(b) is a sectional view taken along the line bb of FIG.

FIG. 2 is a diagram showing the usage state of the embodiment of the present invention, (a)
(b) shows the state in which the pin grid array IC is housed, and (b) shows the state in which it is mounted on the test board of the characteristic testing device.

FIG. 3 is an enlarged view of a part of FIG. 2(b).

FIG. 4 is a diagram showing a pin grid array type IC.

FIG. 5 is a diagram showing a conventional IC carrier.

FIG. 6 is a diagram showing how a conventional IC carrier is used.

[Explanation of symbols]

1...Package body 2...Lead pin 3...Carrier body 4...Concavity 5...Protection hole 6...Positioning hole 7...IC carrier 8...Pin grid array type IC 9...Test board 10...Contact pin implantation block 11...Positioning pin 12...Contact pin 13...Outer cylinder 14...Spring

Claims (1)

[Claims] Claim 1: In an IC carrier for holding a pin grid array type IC having a plurality of lead pins and mounting it on a characteristic testing device, a protective hole for protecting the lead pins (
5) is longer than the length of the IC lead pin (2), and has a taper (
5b).