JPH04312998A - Polyimide multilayer wiring board and manufacture thereof - Google Patents

Abstract

PURPOSE:To contrive a significant shortening in the number of days of manufacture, an increase in the density of wirings and the improvement of the yield of the manufacture of a polyimide multilayer wiring board. CONSTITUTION:A multilayer wiring board is formed into a laminated structure, wherein the laminated material of a plurality of wiring layers is used as one block 1 or 12 and a plurality of these blocks are laminated. Bumps 10 and solder pools 27 are provided on the surface of each block. The blocks are bonded to each other with polyimides 4 and 26 having the transition point of a glass, a molten bonding agent or a molten and hardening bonding agent. The electrical connection of the block 1 with the block 12 is made by bonding of the bumps 10 to the pools 27.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the structure and manufacturing method of a polyimide multilayer wiring board having multilayer wiring layers employing polyimide resin as interlayer insulation on a ceramic substrate or a hard organic resin substrate.

0002

2. Description of the Related Art Multilayer printed wiring boards have conventionally been used as wiring boards on which LSI chips are mounted. A multilayer printed wiring board is composed of a copper-clad laminate as a core material and prepreg as an adhesive for the core material, and the core material and prepreg are alternately laminated and integrated using a hot press. Electrical connections between the laminates are made by forming through-holes with a drill after integrating the core material and prepreg.
This is done by copper plating the inner wall of the through-hole. Furthermore, in recent years, multilayer wiring boards in which polyimide resin is used for interlayer insulation on a ceramic substrate have been used as wiring boards for large computers, which require higher wiring density than multilayer printed wiring boards. This polyimide
Ceramic multilayer wiring boards are manufactured using a polyimide resin insulating layer formation process in which a polyimide precursor varnish is coated on a ceramic substrate, dried, and via holes are formed in this coating film, and a wiring layer is formed using photolithography, vacuum evaporation, and plating methods. A polyimide multilayer wiring layer is formed by repeating this series of steps. In addition to the method for forming a polyimide ceramic multilayer wiring board described above, a wiring pattern is formed on a polyimide sheet, and the sheet is aligned on a ceramic substrate and laminated under pressure in order to form a multilayer wiring board. There is also a way to do this. In this method, since the signal layer is formed on a sheet-by-sheet basis, it is possible to select and stack sheets without defects, and the manufacturing yield can be increased compared to the above-described sequential stacking method.

0003

[Problems to be Solved by the Invention] In the above-mentioned multilayer printed wiring board, electrical connections between the laminated boards are made by through-holes formed by drilling, so it is impossible to form fine through-holes. Therefore, the number of wiring lines that can be formed between through holes is limited. In addition, one through hole is required for connection between one laminated board, and as the number of laminated boards increases, signal wiring capacity decreases, making it difficult to form a multilayer printed wiring board with high wiring density. There is a drawback. In addition, in order to compensate for the drawbacks of the conventional multilayer printed wiring boards mentioned above, the recently developed polyimide ceramic multilayer wiring boards are made by coating polyimide precursor varnish on the ceramic board the same number of times as the number of laminated polyimide insulating layers. It is necessary to repeat the steps of , drying, forming viaholes, and curing. Therefore, the lamination process of the multilayer wiring board takes a very long time. Furthermore, there is a drawback that the polyimide resin is subjected to heat stress during the curing process that is repeated many times, which causes the polyimide resin to deteriorate. Furthermore, since this polyimide multilayer wiring layer is formed by a sequential lamination method, it is difficult to improve the manufacturing yield. In addition, the sheet-by-sheet lamination method, which was developed as a method to improve manufacturing yield, involves pressurizing and laminating one layer at a time, so the higher the number of layers, the greater the stress between the polyimide resins in the lower layer, which causes deterioration of the polyimide resin. The shortcomings of this and the long time it takes to manufacture the board have not been improved. The present invention has been made in view of the above-mentioned points, and its purpose is to provide a polyimide multilayer wiring board that has high wiring density, improves manufacturing yield, and shortens manufacturing days.

0004

[Means for Solving the Problems] In order to achieve this object, the polyimide multilayer wiring board according to the present invention has a laminate structure in which a laminate of a plurality of wiring layers is stacked as one block, and a plurality of blocks are stacked. Electrical connections between blocks are made by soldering metal bumps formed on the surface of the stacked body of each block and solder pools. A polyimide resin having a glass transition point is used for at least one of the blocks, and each block is bonded with the self-adhesive properties of the polyimide resin, and the metal bumps and solder pools are soldered to electrically connect the laminate. Another manufacturing method is to use a melt-curing or molten adhesive on the joint surfaces between each block, and bonding the joints of each block with this melt-curing or molten adhesive. At the same time, the metal bumps and solder pools are soldered to electrically connect the stacked bodies.

[0005]

[Function] The polyimide multilayer wiring board according to the present invention has a laminated structure in which a laminate of a plurality of wiring layers is made into one block and a plurality of these blocks are laminated, so that each block can be manufactured in parallel and at the same time each The manufacturing precision of each block has been improved, and the electrical connection between each block is made by soldering between metal bumps and solder pools, making it difficult for oxidation and corrosion to occur. In addition, each block is bonded by self-adhesive polyimide resin with a glass transition point, or by a melt-curing adhesive or a melt-melting adhesive, and by applying certain pressure and heating conditions, Can be glued.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be explained in detail below with reference to the drawings. FIG. 1 is a cross-sectional view showing the structure of a polyimide multilayer wiring board according to a first embodiment of the present invention. In the same figure, the basic specifications of the polyimide multilayer wiring board are: wiring interlayer insulation thickness of 20 μm, signal line width of 25 μm, and signal line film width of 7 μm; the polyimide resin is made of polyimide with glass dots, and the wiring metal is made of gold. Each is used. A first block 1 of polyimide multilayer wiring layers consists of a ground and connection wiring layer 3, a set of signal wiring layers 7, 8 and gold bumps 10. The second block 12 of the polyimide multilayer wiring layer has input/output pins 14 on the back side, a set of ground and connection wiring layers 16, 24, and a set of signal layers disposed on a ceramic substrate 15 having a wiring layer inside. It consists of wiring layers 19 and 20 and a solder pool 27. The ceramic substrate 15 consists of a co-fired alumina ceramic substrate of molybdenum metal. Furthermore, the signal wiring layers 7, 8, 19, and 20 adjust impedance and reduce crosstalk noise.

The present embodiment is composed of four blocks, and each block is electrically inspected upon completion to select good blocks and proceed to the next step of connecting blocks. Connections between each block are bonded by polyimide 4, 26 having a glass transition temperature on the top layer of each block. and,
The electrical connections for each block are nickel/gold bumps 10 and gold/tin solder pools 2, which are made of gold plating on nickel plating.
This is done by brazing with 7. In this example, the size of the solder pool is 50 to 500 μm square and 10 to 500 μm deep.
100 μm, nickel/gold bump size is 25-30
It is formed with a square size of 0 μm and a thickness of 10 to 50 μm. Further, an LSI connection pad 33 for mounting an LSI is formed on the top layer.

FIG. 2 shows a second embodiment of the present invention. In the first embodiment described above, a polyimide multilayer wiring layer was formed on the ceramic substrate 15, but in this embodiment, the ceramic substrate 15, a hard organic resin substrate, for example, a molded substrate 40 of polyimide resin is used. The input/output pins 41 in this case are driven into a molded substrate 40 made of polyimide resin by forming through holes therein. The polyimide multilayer wiring board using this polyimide resin molded board 40 can accurately match the thermal expansion coefficients of the polyimide resin molded board 40 serving as the base and the polyimide multilayer wiring layer having the wiring layer, and is particularly suitable for large areas. Suitable for manufacturing highly laminated wiring boards.

FIG. 3 is a diagram showing the manufacturing process of the polyimide multilayer wiring board shown in FIG. 1. In the same figure, first, a method for forming a first block 1 of a polyimide multilayer wiring layer will be explained according to steps (a) to (e). Process (
In a), a flat aluminum plate (hereinafter referred to as an aluminum flat plate) 2 is patterned by photolithography using a photoresist, and electrolytically gold plated to form a grounding and connection wiring layer 3. In step (b), a photosensitive polyimide varnish 4 is applied onto the aluminum flat plate 2, exposed and developed to form via holes 5 at predetermined positions.
form and cure.

In step (c), a set of signal wiring layers 6
, 7 are formed using photosensitive polyimide 8 for interlayer insulation. The signal wiring layers 6 and 7 are formed by the method used to form the grounding and connection layers in step (a), and the signal interlayer insulating layer 8 is formed by the method used to form the insulating layer in step (b). In step (d), polyimide varnish 4 is applied onto the second signal wiring layer 7, exposed and developed to form via holes 9 at predetermined positions, and cured. In step (e),
Connection bumps 10 are formed on the top layer of the multilayer wiring layers formed in the required total number in step (d) at positions where electrical connections will be made with the multilayer wiring layers to be formed in step (f) and subsequent steps. The bumps 10 are patterned by photolithography using photoresist, and formed by electrolytic nickel plating and electrolytic gold plating. The nickel plating is a layer to prevent gold-tin solder from diffusing into the gold wiring layer, which will be described later. Each plating thickness is nickel 10
μm, gold 3 μm.

Next, a method for forming a second block 12 different from the first block 1 described above will be described from step (f) to step (
1) will be explained. In step (f), the ceramic substrate 15 on which the signal input/output pins and power supply pins 14 are located on the back side is patterned by photolithography using photoresist, and electrolytically gold plated to form the first grounding and connection wiring layer 16. . In step (g),
Photosensitive polyimide varnish 4 is grounded and connected wiring layer 16
It is coated on the ceramic substrate 15 on which the oxide is formed, exposed and developed to form a via hole 18 at a predetermined position, and then cured. In step (h), a set of signal wiring layers 19, 2
0 is formed using photosensitive polyimide 21 for interlayer insulation.

In step (i), a photosensitive polyimide varnish 22 is applied onto the signal wiring 20, exposed and developed to form a via hole 23 at a predetermined position, and cured. In step (j), the second grounding and connection wiring layer 2
4 is formed on the polyimide layer 22. In step (k), a polyimide layer 26 in which a via hole 25 is formed is formed on the second ground and connection wiring layer 24. This polyimide layer 26 is made of polyimide resin having a glass transition point. In step (l), a gold-tin solder pool 27 is formed on the polyimide layer 26 formed in step (k). The gold-tin solder pool 27 is patterned by photolithography using a photoresist, first forming electrolytic nickel plating with a thickness of 3 μm, and then forming multilayer plating of electrolytic tin plating and electrolytic gold plating. The multi-layer plating of gold and tin is melted by the heat during the subsequent process of adhering the polyimide layer, forming a gold-tin alloy solder. In addition, multilayer plating of gold and tin has a film thickness ratio of 10:7 so that the weight ratio of gold to tin is 4:1, and each film thickness is 1 μm for gold plating and 0.7 μm for tin plating.
6 layers in total (gold-tin multilayer plating film thickness 10.2 μm)
Form.

In step (m), the first block 1 of the polyimide multilayer wiring layer having metal connection bumps formed on the aluminum flat plate 2 formed in steps (a) to (e), and step (f) After alignment with the second block 12 of the polyimide multilayer wiring layer having the solder pool 27 formed on the ceramic substrate 15 formed in step (l), the polyimide multilayer wiring layer is overlaid, pressurized, and the glass transition point of the polyimide resin is adjusted. The polyimide films are bonded and fixed together by heating to a temperature exceeding At this time, the multilayer plating of gold and tin is melted and becomes gold-tin alloy solder, which is bonded to the metal bump 10 and the two laminates 1 and 12 are electrically connected. The pressurization and heating methods are as follows. For pressurization and heating, an autoclave-type vacuum press device is used, and the pressurized gas is nitrogen gas, and the pressure is 3K until the substrate temperature reaches 250℃.
g/cm2, 14 for substrate temperature from 250℃ to 350℃
It is carried out at kg/cm2. At this time, the substrate is placed on a platen and sealed using a polyimide film, and a vacuum pump is connected inside to reduce the internal pressure to 10 Torr or less.

In the step (n), the laminates 1 and 12 that have been bonded in the step (m) are immersed in a 16% hydrochloric acid aqueous solution,
The aluminum flat plate 2 is dissolved and removed. In step (o), photosensitive polyimide 28 is applied onto the ground and connection wiring layer 3 newly exposed in step (n), exposed and developed to form via holes 29 at predetermined positions, and cured. In step (p), a gold-tin solder pool 30 is formed on the polyimide layer 28. In step (q), step (a
) to the polyimide wiring layer laminate 3 formed in step (p)
1, another polyimide wiring layer 32 formed in steps (a) to (e) is laminated and integrated by the methods in steps (m) to (p). In step (r), step (q) is repeated until the total number of designed wirings is reached.

In step (s), the multilayer wiring board and the LS
A connection electrode layer 33 is formed to connect to the wiring of the I chip. In this step (s), steps (m) to (o) are performed in step (r), and then bumps and solder are placed on the chip carrier in which the LSI chip is encapsulated on the polyimide layer 28 formed in step (o). A connection electrode pad 33 for connection is formed. At this time, the solder connecting the bumps of the LSI chip carrier and the connection electrode pads is tin-lead solder, and the connection electrode pads 33 are formed of copper plating that is not eaten by the tin-lead solder. Furthermore, a low resistance metal such as copper may be used as the metal wiring material.

FIG. 4 illustrates the manufacturing process of a second embodiment of the method for manufacturing the polyimide multilayer wiring board shown in FIG. Photosensitive polyimide with a glass transition point of approximately 270°C is used for the polyimide resin, and multilayer plating of copper and nickel is used for the wiring metal, each layer having a thickness of 6.5 μm.
, 0.5 μm nickel plating. Here, the nickel plating on the copper plating is a barrier metal that prevents direct contact between the metal copper and the photosensitive polyimide, since the photosensitive polyimide used in this example easily reacts with the metal copper and has an adverse effect on the polyimide. be. In the figure, the process (
The steps from a) to step (d) are the same as the step (a) shown in FIG.
) to step (d), so the explanation will be omitted. In step (e), a tin-lead solder pool 34 for connection is formed in the via hole 9. The tin-lead solder pool 34 is patterned by photolithography using photoresist and formed by electrolytic tin-lead solder plating. The solder plating film thickness is 10 μm.

The steps shown from step (f) to step (k) are the same as the steps shown from step (f) to step (k) shown in FIG. 3, so a description thereof will be omitted. In (l), step (k)
Via hole 25 in the top layer 26 of the multilayer wiring layer formed by
Copper bumps 35 for connection are formed on. The bumps 35 are patterned by photolithography using photoresist and formed by electrolytic copper plating. The thickness of bump 35 is 15
It is μm. A step of joining the block 1 and the block 12 in step (m), a step of forming a new bump 35 in steps (n) to (p), and a step of forming LSI connection electrode pads 33 in steps (q) to (s). are the same as the steps from step (m) to step (s) shown in FIG. 3, so the explanation will be omitted.

FIG. 5 illustrates the manufacturing process of the third embodiment of the method for manufacturing the polyimide multilayer wiring board shown in FIG. The feature of this example is that the polyimide resin is made of photosensitive polyimide with a low coefficient of thermal expansion and a low glass transition point.
Another advantage is that the adhesive uses a melt-curable maleimide resin. In the figure, the method for forming the first block 1 of the polyimide multilayer wiring layer shown in steps (a) to (e) is shown in steps (a) to (e) in FIG.
Since it is the same as the formation method shown in , the explanation will be omitted. Process (
In f), a maleimide resin varnish 35 is applied to the top layer of the multilayer wiring layer formed in step (e) and dried in a heat circulation oven.

In step (g), the maleimide resin 35 on the bumps 10 formed in step (e) is removed. The removal process is as follows. That is, a copper thin film layer of 0.5 μm is formed on the maleimide resin 35 other than on the bumps 10 formed in step (e) by a lift-off method using a photolithography process using a photoresist and a copper thin film formation process by sputtering. Next, the exposed maleimide resin 35 is removed by plasma etching using oxygen gas to expose the connection bumps 10, and then the copper thin film on the maleimide resin 35 is removed by wet etching. The method for forming the second block 12 of the polyimide multilayer wiring layer shown in steps (h) to (m) is shown in FIG.
Since the formation method is the same as that shown in steps (h) to (m) in , the explanation will be omitted. In step (n), a tin-lead bismask solder pool 37 is formed on the polyimide layer 28 formed in step (m). The solder pool 37 is patterned by photolithography using a photoresist, and is formed by embedded printing using the photoresist as a mask.

In step (o), the first block 1 of the polyimide multilayer wiring layer having the maleimide resin adhesive layer 35 on the aluminum flat plate 2 formed in steps (a) to (g), and the The second block 12 of the polyimide multilayer wiring layer having the tin-lead solder pool 37 on the ceramic substrate 15 formed in step (n) is aligned and stacked, pressurized and heated to the flow temperature of the maleimide resin, Block 1 of mutual polyimide multilayer wiring layers
and 12 are glued and fixed. At this time, the tin-lead solder 37 is melted and joined to the bump 10 formed in step (e), and the two laminates 1 and 12 are electrically connected. The pressurization and heating methods are as follows. For pressurization and heating, an autoclave type vacuum press device is used, and the pressurized gas is nitrogen gas, and the pressure is 3 kg/c up to a substrate temperature of 130°C.
m2, 14kg/ for substrate temperature from 130℃ to 180℃
Perform in cm2. At this time, the substrate is placed on a platen and sealed using a polyimide film, and a vacuum pump is connected to reduce the internal pressure to 10 Torr or less. Process (p
) to step (s), the step of removing the aluminum flat plate 2, the step of forming a new solder pool, and the step of laminating and integrating are the same as steps (q) to (s) shown in FIG. 3, so their explanation will be omitted.

FIG. 6 shows the manufacturing process of the fourth embodiment of the method for manufacturing the polyimide multilayer wiring board shown in FIG. The characteristics of this example are that the polyimide resin is a photosensitive polyimide with a low glass transition point and a low coefficient of thermal expansion, and the adhesive is made of molten fluorinated ethylene and perfluoroalkyl perfluorovinyl ether copolymer (PTF).
The point is that it uses . In the figure, the method for forming the first block 1 of the polyimide multilayer wiring layer shown in steps (a) to (e) is shown in steps (a) to (e) in FIG.
Since it is the same as the formation method shown in e), the explanation will be omitted. In step (f), a process (
An opening 4 is formed at a position corresponding to the tin-lead solder 34 formed in step e).
form 1. In step (g), the PTF film 4
0 is laminated on the top layer 4 of the multilayer wiring layer. In the lamination process, after alignment with the first block 1,
Pressed with a press machine heated to ℃, PTF film 40
temporarily adhere. The method for forming the second block 12 of the polyimide multilayer wiring layer shown in steps (h) to (n) is shown in FIG.
Since the formation method is the same as that shown in steps (f) to (l) in , the explanation will be omitted.

In step (o), the first block 1 of the polyimide multilayer wiring layer having the PTF film 40 on the aluminum flat plate 2 formed in steps (a) to (g), and the first block 1 of the polyimide multilayer wiring layer formed in steps (h) to ( After aligning the second block 12 of the polyimide multilayer wiring layer having the bumps 35 on the ceramic substrate 15 formed in step n), they are stacked, pressed, and heated to the flow temperature of the PTF film to bond each other's polyimide. Blocks 1 and 1 of multilayer wiring layers
Glue and fix 2. At this time, the tin-lead solder 37 melts,
It is joined to the metal bump 10 formed in step (e), and the two laminated structures 1 and 12 are electrically connected. The pressurization and heating methods are as follows. For pressurization and heating, an autoclave type vacuum press device is used, and the pressurized gas is nitrogen gas, and the pressure is 3 kg/cm up to the substrate temperature of 130°C.
2. 14kg/c when the substrate temperature is from 130℃ to 180℃
Do it in m2. At this time, the substrate is placed on a platen and sealed using a polyimide film, and a vacuum pump is connected to reduce the internal pressure to 10 Torr or less. Process (p)
The step of removing the aluminum flat plate 2 shown in step (s) from
The new solder pool formation process and lamination integration process are shown in Figure 4.
Since the process is the same as step (q) to step (s) shown in , the explanation will be omitted. Note that in the embodiments shown in FIGS. 5 and 6 described above, adhesive was applied or laminated only to one surface of the two polyimide multilayer wiring layers to be bonded, but if the polyimide surface is highly uneven, both surface layers may be coated or laminated. The adhesive is laminated to reduce the effects of unevenness on the adhesive surface.

[0023]

Effects of the Invention As explained above, the polyimide multilayer wiring board according to the present invention has a laminated structure in which a stack of a plurality of wiring layers is made into one block, and a plurality of these blocks are stacked. It can be manufactured in parallel, which significantly shortens the manufacturing time, and because the heat stress of the curing process applied to the polyimide resin is distributed to each block, the deterioration of the polyimide resin that occurs during the manufacturing process is minimized. It can be kept to a limit. Further, the manufacturing precision of each block can be improved, and a polyimide multilayer wiring board with high multilayer wiring density can be obtained. In addition, since each block is bonded by self-adhesive polyimide resin with a glass transition point, or by a melt-curing adhesive or a melt-melting adhesive, the pressure conditions can be eased, and this reduces stress during the manufacturing process. There is no occurrence of this, leading to an improvement in yield.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a polyimide multilayer wiring board according to the present invention.

FIG. 2 is a sectional view of a second embodiment of the polyimide multilayer wiring board according to the present invention.

3 shows a manufacturing process of the polyimide multilayer wiring board shown in FIG. 1. FIG.

4 shows a second embodiment of the manufacturing process of the polyimide multilayer wiring board of FIG. 1; FIG.

5 shows a third embodiment of the manufacturing process of the polyimide multilayer wiring board of FIG. 1; FIG.

6 shows a fourth embodiment of the manufacturing process of the polyimide multilayer wiring board of FIG. 1. FIG.

[Explanation of symbols]

1 First block 2 of polyimide multilayer wiring layer
Aluminum flat plate 4 Polyimide resin having a glass transition point 10
Bump 12 Second block 2 of polyimide multilayer wiring layer
7 Solder pool 35 Maleimide resin 40 PTF film

Claims (3)

[Claims] 1. A multilayer wiring board having a polyimide multilayer wiring layer on a substrate, wherein the polyimide multilayer wiring layer has a laminated structure in which a stack of a plurality of wiring layers is used as one block, and a plurality of blocks are stacked. 1. A polyimide multilayer wiring board, characterized in that electrical connections between each block are made by soldering metal bumps formed on the surface of a laminate of each block and a solder pool. 2. In the polyimide multilayer wiring board according to claim 1, a polyimide resin having a glass transition point is used for at least one of the bonding surfaces between each block, and each block is bonded using a polyimide resin. A method for manufacturing a polyimide multilayer wiring board, characterized in that the laminates are electrically connected by adhering them with self-adhesive properties, and by brazing metal bumps and solder pools. 3. In the polyimide multilayer wiring board according to claim 1, a melt-curing or melt-curing adhesive is used on the bonding surface between each block, and each block is bonded using the melt-curing adhesive. Alternatively, a method for manufacturing a polyimide multilayer wiring board, characterized in that the laminates are electrically connected by bonding with a melt-type adhesive and by brazing metal bumps and solder pools.