JPH04305939A - Manufacture of thin-film transistor - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing thin film transistors used in active matrix liquid crystal displays, image sensors, liquid crystal shutter arrays, three-dimensional integrated devices, and the like.

0002

2. Description of the Related Art Conventionally, semiconductor thin films on single crystal insulating substrates have been known to have the following advantages over bulk semiconductors, as seen in SOS (silicon on sapphire). ■When cutting into islands or dielectrically separating them, it is possible to easily and reliably separate elements. (2) Stray capacitance can be reduced by reducing the PN junction area.

Furthermore, since single-crystal insulating substrates such as sapphire are expensive, as alternatives, fused quartz plates, amorphous SiO2 films formed by oxidizing Si substrates at temperatures above 1000°C, and Si Amorphous S deposited on the substrate
A method has been proposed in which an iO2 film or an amorphous SiN film is used and a semiconductor thin body is formed thereon. However, since these SiO2 films and SiN films are not single crystals, when a silicon layer is deposited thereon and crystallized in a process at a temperature of 1000 DEG C. or higher, polycrystals grow on the substrate. The grain size of this polycrystal is several tens of nanometers, and in addition, M
Even if an OS transistor is formed, its carrier mobility is about a fraction of that of a MOS transistor on bulk silicon.

[0004] Furthermore, for MOS transistors on inexpensive glass substrates with a strain point of 850°C or less for active matrix substrates of liquid crystal displays, it is not possible to use processes at temperatures above 1000°C, so low-pressure chemical vapor phase is used. Even if a silicon layer is deposited using a growth method, the grain size of the polycrystal is only a few nanometers at most, so even if a MOS transistor is formed on it,
Its carrier mobility is about a few tenths of that of a MOS transistor on bulk silicon.

[0005]Recently, therefore, a method of increasing the crystal grain size and forming a single crystal by scanning a silicon thin film with a laser beam, an electron beam, or the like and melting and resolidifying the thin film has been studied. According to this method, it is possible to form a high-quality silicon single crystal phase or high-quality polycrystal on an insulating substrate, and the characteristics of devices fabricated using it are also improved, and the characteristics are similar to those of devices fabricated in bulk silicon. improved to a certain degree. Furthermore, this method allows elements to be stacked, making it possible to realize a so-called three-dimensional IC. As a result, circuits with characteristics such as high density, high speed, and multifunction can be obtained.

JAPA is the first conventional example of applying a laser beam to crystallize the silicon layer of the active region of a MOS transistor to improve the performance of the MOS transistor.
NESE JOURNAL OF APPLIE
D PHYSICS VOL. 28, NO. 10,
OCTOBER, 1989, PP. 1789-1793
“XeCl Excimer Laser An
Nealing Used to Fabric
ated Poly-Si TFT's. In addition, as a second conventional example, JAPANESE
JOURNAL OF APPLIED PH
YSICS VOL. 29, NO. 12, DECEM
BER 1990, PPL2377-L2379 “L
ow-Temperature Polysilic
on Thin Film Transisto
r by Non-Mass-Separated
Ion Flux Doping Tech
``nique'' is an example.

[0007]

[Problem to be Solved by the Invention] The method described in the above-mentioned paper had the following problems. That is, the source region connected to the source electrode and the drain region connected to the drain electrode are covered with an amorphous silicon layer in which a partial region of the amorphous silicon layer is doped with phosphorus as an impurity, and then a XeCl excimer laser is used to cover the source region connected to the source electrode and the drain region connected to the drain electrode. Beam annealing is performed to crystallize the i-type silicon layer, which will become the active region of the thin film transistor, and to activate phosphorus, which is an impurity in the source and drain regions, at the same time. However, this method has the disadvantage that it is not possible to form a thin film transistor that is self-aligned with the gate electrode because impurities in the source and drain regions are activated before forming the gate electrode.

When a thin film transistor is used, for example, as a picture element of an active matrix type liquid crystal display, parasitic capacitance occurring between the gate electrode and the source region and parasitic capacitance occurring between the gate electrode and the drain region cause color unevenness, Flicker and gate line signals cause delays. These problems can be solved or improved if the thin film transistor of the picture element is a thin film transistor that is self-aligned with respect to the gate electrode. Furthermore, in order to configure a drive circuit that operates at high speed for driving picture elements on the same substrate as the picture elements, the thin film transistors on the substrate need to be self-aligned.

[0009] Self-aligned MOS transistors are generally manufactured in the field of integrated circuits, but the maximum temperature of the process is around 1000° C., so they cannot be applied to the manufacturing method of thin film transistors for liquid crystal displays. because,
This is because substrates generally used for liquid crystal displays are inexpensive glass substrates, and the strain point of the glass substrate is around 600°C.

A second embodiment attempts to solve the above problem. In the second example, an amorphous silicon layer is formed by PECVD on a glass substrate on which an insulating thin film has been deposited, and after patterning, crystallization is performed using an argon laser beam. After forming the gate electrode, the SiNx insulating film is etched to expose the portions that will become the source and drain regions.
” method, the necessary impurities are injected.

However, in this method, the gate insulating film on the source region and the drain region must be etched in a self-aligned manner with respect to the gate electrode, so that the etching is uniform over the entire substrate of the active matrix type liquid crystal display. It is extremely difficult to form a source region and a drain region in self-alignment with the gate electrode.

In addition, with this method, there is a high possibility that the gate insulating film between the gate electrode and the silicon layer will be removed by etching, and in this case, if the dielectric strength between the gate electrode and the source or drain electrode deteriorates, This is a major drawback when applying this thin film transistor to an active matrix type liquid crystal display.

In view of the above points, the present invention provides a method for manufacturing a thin film transistor in which a source region and a drain region are formed in a self-aligned manner with respect to a gate electrode at a process temperature that allows the use of an inexpensive glass substrate. It is. Further, the present invention provides a method for manufacturing a thin film transistor in which a source region and a drain region are formed uniformly over the entire surface of a substrate in a self-aligned manner. Further, the present invention provides a method for manufacturing a thin film transistor having sufficiently high dielectric strength between the source region and the gate electrode, and between the drain region and the gate electrode.

[0014]

[Means for Solving the Problems] The present invention includes a step of depositing a silicon layer on an insulating substrate by low pressure chemical vapor deposition, a step of crystallizing the silicon layer using an energy beam, and a step of forming an outer silicon layer. a patterning process;
a step of depositing and forming an insulating thin film, a step of forming a gate electrode on the insulating thin film, a step of injecting an impurity into the silicon thin film through the insulating thin film in a self-aligned manner with respect to the gate electrode, and a laser beam. Activating the impurity by irradiating the impurity. The present invention is a method for manufacturing a thin film transistor, characterized in that the energy beam is an excimer pulse laser.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the present invention will be explained below with reference to illustrated embodiments. FIG. 1 shows a first embodiment, FIG. 2 shows a second embodiment, and FIG. 3 shows a third embodiment.

FIGS. 1a to 1i are cross-sectional views showing the manufacturing process of a thin film transistor according to the present invention. As shown in FIG. 1a, a silicon dioxide film 102 is deposited on an insulating substrate 101 that has been cleaned in advance, for example, on a transparent glass substrate by atmospheric pressure chemical vapor deposition at a substrate temperature of 200 to 350°C.
The film is deposited to a thickness of nm.

Next, an n-type silicon layer having a thickness of 150 nm is deposited at a substrate temperature of 550 to 650° C., for example, by low pressure chemical vapor deposition. Examples of impurities contained in the n-type silicon layer include phosphorus, arsenic, and antimony. The n-type silicon layer is then patterned to form island-like regions 103 and 104 that will become the source and drain regions of the thin film transistor.

The source region 103 and drain region 1
The method for forming 04 is not limited to the above, and for example, an i-type silicon layer is formed on the silicon dioxide film 102 by low pressure chemical vapor deposition to a thickness of 150 nm at a substrate temperature of 450 to 650°C. Form the adhesion. As the raw material gas for forming the i-type silicon layer, SiH4 or Si
2 H4 or a mixed gas of SiH4 and Si2 H4 can be used. Then, in the i-type silicon layer,
For example, impurities are introduced by ion implantation at an acceleration voltage of 120 KeV and a concentration of 1015 to 1016 cm-2. Next, thermal annealing is performed for 2 hours in a nitrogen atmosphere at a substrate temperature of 600° C. in order to activate the impurities ion-implanted into the silicon. The impurity implanted into the i-type silicon can also be activated by an energy beam such as a laser beam. The silicon layer is then patterned to form a source region 103 and a drain region 104. When forming a p-type thin film transistor, the source region 103 and the drain region 104 are formed by ion-implanting a p-type impurity, such as boron, instead of an n-type impurity in the ion implantation step. good.

Next, for example, the weight concentration 3 is diluted with pure water.
% HF solution to remove the native oxide film formed on the surfaces of the source and drain regions.

Next, the silicon layer which will become the active region of the thin film transistor is formed by, for example, low-pressure chemical vapor deposition at a substrate temperature of 600° C. to a film thickness of 15 nm to 70 nm, on which the source region 103 and drain region 104 are formed. Form an adhesion so as to cover it. As a raw material gas for forming the silicon layer, SiH4 or Si2H
4 or a mixed gas of SiH4 and Si2 H4 can be used.

The method for forming the silicon layer 203 is not limited to the above-described low pressure chemical vapor deposition method, but may also be an amorphous silicon layer containing hydrogen formed by decomposing monosilane by glow discharge, or a sputtering method. The present invention can also be applied to a silicon layer.

In order to control the threshold value of the thin film transistor manufactured in this embodiment, after forming the silicon layer, a required amount of impurity is implanted by, for example, ion implantation.

Next, the silicon layer is placed in the source region 10.
3 and the drain region 104 in FIG.
A silicon layer 105 is formed by patterning on the island as shown in FIG.

Next, as shown in FIG. 1c, the silicon layer 105 is irradiated with a laser beam 106 to crystallize it. The laser beam 106 includes Xec with a wavelength of 308 nm.
An excimer pulse laser is used. In the case of a silicon layer formed by low pressure chemical vapor deposition, the beam annealing conditions are such that the pulse width of the pulsed laser is 50 nsec, and the energy intensity of each pulse of the pulsed laser immediately before the silicon layer 105 is 200 to 600 mJcm. 2
, and a more appropriate strength is 300 to 400 Jcm
-2. The number of pulses applied to the same location on the silicon layer 105 may be multiple times. During beam annealing, the partial pressure of oxygen around the silicon dioxide layer 105 is 10 -5 mmHG or less. Alternatively, during beam annealing, the silicon layer 105 is surrounded by an inert gas atmosphere of He, Ne, Ar, Kr, Xe, or a mixed gas thereof.

This is because if oxygen exists on or near the surface of the silicon layer 105, when the temperature of the silicon layer 105 rises due to beam annealing, oxygen or nitrogen reacts and is incorporated into the silicon layer as an impurity. A good silicon layer cannot be obtained. Therefore, when annealing the silicon layer, it is preferable to anneal it in a vacuum or in an inert gas atmosphere as much as possible. However, when removing the surface of the crystallized silicon layer with hydrofluoric acid or the like after laser annealing, beam annealing can be performed in an oxygen atmosphere, nitrogen atmosphere, or air. The laser beam 106 is not limited to the XeCl excimer laser, and ArF excimer laser, KrF excimer laser, YAG laser, etc. can also be used.

By the beam annealing, the i-type silicon layer becomes a polycrystalline silicon layer 107, as shown in FIG. 1d.

Next, as shown in FIG. 1e, a gate insulating film 108 is formed by, for example, atmospheric pressure chemical vapor deposition, so as to cover the source region 103, the drain region 104, and the polycrystalline silicon layer 107. For example, a silicon dioxide film having a thickness of 150 nm is formed at a substrate temperature of 300°C. The method and material for forming the gate insulating film 108 are not limited to those described above. For example, SiO2 can be deposited and formed by electron cyclotron resonance CVD and used as the gate insulating film 108. Furthermore, first,
SiO2 by electron cyclotron resonance method (ECR method)
was deposited to cover the source region 103, the drain region 104, and the polycrystalline silicon layer 107, and SiO2 was further deposited by atmospheric pressure chemical vapor deposition. A gate insulating film having a two-layer structure may also be used.

Next, as shown in FIG. 1f, the gate electrode 10
form 9. For example, a silicon thin film doped with impurities is deposited to cover the gate insulating film, and then patterned. Examples of the silicon layer into which the impurity is introduced include a silicon layer formed by low pressure chemical vapor deposition using phosphorus as an impurity, and an amorphous silicon layer containing phosphorus formed by PECVD. The thickness of the gate electrode is 300 to 400 nm. As shown in FIG. 1F, the gate electrode 109 and the source region 103 have a so-called offset structure in which they do not overlap in the stacking direction of the thin films.

For example, under the above-mentioned ion implantation conditions, at 600° C. for 60 hours or more in a nitrogen atmosphere, or at 700° C.
Annealing for 2 hours at °C is required. Activation by thermal annealing is not suitable for manufacturing thin film transistors on inexpensive glass substrates with a strain point of around 600°C.

As shown in FIG. 2g, the impurities implanted in regions 209 and 210 are activated by a laser beam. The laser beam conditions were a XeCl excimer laser with a wavelength of 308 nm and a half width of 50 ns,
The substrate is irradiated in air with a beam energy intensity of 00 mjcm-2. The number of pulses of the laser beam irradiated to the thin film transistor may be appropriately plural. 209 and 2 activated by the laser beam
The sheet resistance of No. 10 is 0.01 to 0.05 Ωcm −1 , which is a resistance value sufficient for use as a thin film transistor. The laser beam is not limited to the above-mentioned XeCl excimer laser, but also includes ArF excimer laser, KrF excimer laser, and YAG having a wavelength in the same region as ultraviolet rays.
A laser or the like can be used to activate the impurity. By irradiating the laser beam, areas 209 and 2
Reference numeral 10 indicates a source region 212 and a drain region 213 made of a polycrystalline silicon film containing impurities.

Furthermore, by the laser beam irradiation for activating the impurities, the gate electrode formed of the silicon layer containing impurities is also annealed at the same time, and its resistance is reduced. Since the thickness of the gate electrode formed of a silicon layer is about 300 nm, the laser beam energy does not reach the active silicon layer.

Next, the interlayer insulating film 214 is attached to the gate electrode 20.
7 is formed on the substrate. As a material for the interlayer insulating film, there is, for example, SiO2 with a film thickness of 500 nm formed by atmospheric pressure chemical vapor deposition. Furthermore, SiO2, PSG, SiN formed by electron cyclotron resonance method, sputtering method, low pressure chemical vapor deposition method, etc.
x may be an interlayer insulating film 214.

Next, as shown in FIG. 2h, the source region 2
12 and the drain region 213 with the interlayer insulating film 214
After providing a window for a contact so as to penetrate through the gate insulating film 205, a metal thin film, such as an aluminum thin film, which will become an electrode is deposited and patterned to form a source electrode 215.
and a drain electrode 216 are formed. When a thin film transistor is used as a picture element of an active matrix liquid crystal display, the drain electrode 216 may be made of, for example, indium-tin oxide (IT).
A transparent electrode made of O) can be used. Said I
A TO thin film is deposited by sputtering and pattern etched, and then an aluminum thin film, which is a source electrode material, is deposited by sputtering and a source electrode is formed by pattern etching.

Next, a passivation film 217 of, for example, a 50 nm thick nitride film is formed to cover the substrate on which the source electrode 215 and the drain electrode 216 are formed. The passivation film is not limited to one layer, and may be a plurality of stacked layers of thin films made of different materials. For example, first, a thickness of 20 mm was formed by sputtering.
It is also possible to deposit 0 nm of SiO2 to cover the source electrode 215 and drain electrode 216, and then deposit an organic polymer film to use it as a passivation film. The passivation film 217 is used to prevent contamination of the thin film transistor from the outside world, and when the thin film transistor is used as a picture element of an active matrix liquid crystal display, it prevents the application of DC voltage generated by the thin film transistor to liquid crystal molecules. The purpose is to reduce

Next, a heat treatment is performed at 300° C. for 1 hour in a gas containing hydrogen to obtain the desired thin film transistor as shown in FIG. 2h. However, if an organic polymer film that decomposes at 300° C. is used as the passivation film, it is necessary to perform the above hydrogen treatment before forming the organic polymer film.

A third embodiment is shown in FIG.

FIGS. 3a to 3h are cross-sectional views showing the manufacturing process of a thin film transistor according to the present invention. 3a to 3d of a third embodiment of the manufacturing process of a thin film transistor of the present invention
The steps up to this point are the same as those shown in FIGS. 2a to 2d of the second embodiment.

A third embodiment of the present invention will be explained below, starting from FIG. 3e.

As shown in FIG. 2e, a metal thin film such as Cr, which forms the gate electrode 307, is deposited by sputtering or vapor deposition so as to cover the gate insulating film, and then patterned. When the tensile internal force of the metal thin film is large, for example, in the case of Cr, the thickness is 3
A thin film with a thickness of 0.00 nm has a large tensile stress, which causes problems such as wire breakage at stepped portions. Therefore, in the case of such a gate electrode, it is necessary to appropriately reduce the thickness. For example, the thickness of a gate electrode made of Cr is preferably about 150 nm. However, in the next ion implantation process shown in FIG. 3F, the ions cannot be blocked sufficiently. For this reason, the resist 308 on the gate electrode is left behind after patterning. The remaining resist has a thickness of 500 nm or more and serves as a sufficient mask for ion implantation.

Next, as shown in FIG. 3f, the gate electrode 30
Ions are implanted 309 through the gate insulating film 306 in a self-aligned manner with respect to 7. The thin film transistor to be manufactured is n
In the case of a type, the ionic species includes phosphorus. For example, in the case of phosphorus, the thickness of the gate insulating film 306 is 150 nm.
In the case of m, the conditions for ion implantation are an acceleration voltage of 120KeV
The ion implantation amount is 1 x 1015 to 1 x 1016 cm-3.
It is. Further, when the thin film transistor to be manufactured is of a p-type, boron or the like is used as the ion species to be ion-implanted. For example, in the case of boron, the conditions for ion implantation are an acceleration voltage of 40 KeV and an ion implantation amount of 1 x 1015 ~
It is 1 x 1016 cm-3. As shown in FIG. 3f, regions 310 and 311 are formed in which impurities are implanted in a self-aligned manner with respect to the gate electrode 307.

Next, the resist 3 on the gate electrode 307 is
Peel off 08.

Next, the impurities implanted into the regions 310 and 311 are activated.

[0043] 310 and 3 which are the areas of the offset
When the thickness of the silicon layer No. 11 is about 25 nm, in order to activate the ion-implanted impurities by thermal annealing, for example, under the above-mentioned ion implantation conditions, at 600° C. for 60 hours or more in a nitrogen atmosphere, Or 2 at 700℃
Time annealing is required. To manufacture a thin film transistor on an inexpensive glass substrate with a strain point of around 600°C,
Activation by thermal annealing is not suitable.

As shown in FIG. 3g, the laser beam 31
2 activates the impurities implanted into the regions 310 and 311. Beam annealing condition is wavelength 308nm
, a XeCl excimer laser with a half-value width of 50 ns,
The substrate is irradiated with a beam energy intensity of 0 to 600 mJcm-2. If the gate electrode is made of a material that reacts with gas molecules in the atmosphere when irradiated with the laser beam 312, the substrate is irradiated with the laser beam in vacuum or in an inert gas. The number of pulses of the laser beam 312 applied to the thin film transistor may be appropriately plural. The sheet resistance of the sheets 310 and 311 activated by the laser beam 312 is 0.01 to 0.05 Ωm-1, which is a resistance value sufficient for use as a thin film transistor. The laser beam is not limited to the above-mentioned XeCl excimer laser;
An rF excimer laser, a KrF excimer laser, a YAG laser having a wavelength in the same region as ultraviolet light, or the like can be used to activate impurities. By irradiating the laser beam, the regions 310 and 311 become a source region 313 and a drain region 314 made of a polycrystalline silicon film containing impurities.

Furthermore, by the laser beam irradiation for activating the impurities, the gate electrode formed of the silicon layer containing impurities is also annealed at the same time, and its resistance is reduced. Since the thickness of the gate electrode formed of a silicon layer is about 300 nm, the laser beam energy does not reach the active silicon layer.

Next, the interlayer insulating film 315 is attached to the gate electrode 30.
7 is formed on the substrate. As a material for the interlayer insulating film, there is, for example, SiO2 with a film thickness of 500 nm formed by atmospheric pressure chemical vapor deposition. Furthermore, SiO2, PSG, and SiNx formed by electron cyclotron resonance method, sputtering method, low pressure chemical vapor deposition method, etc.
may be used as the interlayer insulating film 315.

Next, as shown in FIG. 3h, the source region 3
13 and the interlayer insulating film 315 in the drain region 314.
After providing a window for a contact so as to penetrate through the gate insulating film 307, a metal thin film, such as an aluminum thin film, which will become an electrode is deposited and patterned to form a source electrode 315.
and a drain electrode 316 are formed, respectively. When a thin film transistor is used as a picture element of an active matrix liquid crystal display, the drain electrode 317 may be made of, for example, indium-tin oxide (IT).
A transparent electrode made of O) can be used. Said I
A TO thin film is deposited by sputtering and pattern etched, and then an aluminum thin film, which is a source electrode material, is deposited by sputtering and a source electrode is formed by pattern etching.

Next, a passivation film 318 of, for example, a nitride film is formed to a thickness of 50 nm so as to cover the substrate on which the source electrode 316 and the drain electrode 317 are formed. The passivation film is not limited to one layer, and may be a plurality of stacked layers of thin films made of different materials. For example, first, a thickness of 200 mm is formed by sputtering.
It is also possible to deposit SiO2 of nm thickness to cover the source electrode 316 and drain electrode 317, and then deposit an organic polymer film to use it as a passivation film. The passivation film 318 is used to prevent contamination of the thin film transistor from the outside world, and when this thin film transistor is used as a picture element of an active matrix liquid crystal display, it prevents the application of DC voltage generated by the thin film transistor to liquid crystal molecules. The purpose is to reduce

Next, a heat treatment is performed at 300° C. for 1 hour in a gas containing hydrogen to obtain the desired thin film transistor as shown in FIG. 3h. However, if an organic polymer film that decomposes at 300° C. is used as the passivation film, it is necessary to perform hydrogen treatment before forming the organic polymer film.

The third embodiment described above is an example of manufacturing a self-aligned thin film transistor, and the drain electrode 312 is made of the same wiring material as the source electrode, and an n-type thin film transistor and a p-type thin film transistor are formed on the same substrate. By forming the gate electrode and connecting the source electrode or drain electrode of each thin film transistor appropriately, C.
- A MOS circuit can be constructed.

[0051]

As explained above, in the method for manufacturing a thin film transistor of the present invention, the impurity ion implanted through the gate insulating film and self-aligned with the gate electrode is activated by a laser beam. A thin film transistor that is self-aligned with respect to the gate electrode and has high dielectric strength between the source electrode and the gate electrode and between the gate electrode and the drain electrode can be formed in a process at temperatures below 0.degree.

Furthermore, since the activation of impurities by laser has a short lateral diffusion distance of the channel, the parasitic capacitance generated between the gate electrode and the source electrode and the parasitic capacitance generated between the gate electrode and the drain electrode are extremely large. Since it is small, a thin film transistor capable of high-speed operation can be formed.

Furthermore, when the thin film transistor according to the present invention is used as a pixel in an active matrix type liquid crystal display band, since the thin film transistor is a self-aligned thin film transistor with low parasitic capacitance, color unevenness will occur over the entire screen. ,
You can obtain high-quality images without flicker or gate signal delay.

Furthermore, in the method for manufacturing a thin film transistor of the present invention, since thermal annealing is not performed for activation of impurities, inexpensive glass can be used for the insulating substrate, and a large-area liquid crystal display can be manufactured. .

Furthermore, C-MOS
Circuits can be formed on glass substrates. Therefore, according to the present invention, a driving circuit for an active matrix type liquid crystal display can be formed on the same substrate on which picture element transistors are formed, so that an inexpensive active matrix type liquid crystal display can be manufactured. .

Furthermore, the present invention can also be applied to the production of high-performance tertiary elements.

[Brief explanation of the drawing]

FIG. 1 is a process diagram of a first embodiment of the method for manufacturing a thin film transistor of the present invention.

FIG. 2 is a process diagram of a second embodiment of the method for manufacturing a thin film transistor of the present invention.

FIG. 3 is a process diagram of a third embodiment of the method for manufacturing a thin film transistor of the present invention.

[Explanation of symbols]

101, 201, 301 Insulating substrate 102, 202, 302 Silicon dioxide film 103, 21
2, 313 Source area 104, 213, 314
Drain regions 105, 203, 303 Silicon layer 1
08, 206, 306 Gate insulating film 106, 113
, 204, 211, 304, 312 laser beams 107, 205, 305 polycrystalline silicon layer 109,
207, 307 Gate electrodes 111, 112, 209
, 210, 310, 311 impurity implanted region

Claims (2)

[Claims] 1. A step of depositing a silicon layer on an insulating substrate, a step of crystallizing the silicon layer by an energy beam, a step of patterning the outer silicon layer, and a step of depositing an insulating thin film, a step of forming a gate electrode on the insulating thin film, a step of injecting an impurity into the silicon thin film through the insulating thin film in a self-aligned manner with respect to the gate electrode, and activating the impurity by irradiating it with a laser beam. A method for manufacturing a thin film transistor, comprising the steps of: 2. The method of manufacturing a thin film transistor according to claim 1, wherein the energy beam has a wavelength in the same region as ultraviolet light.