JPH04288588A - Active matrix type liquid crystal display device - Google Patents

Abstract

PURPOSE:To easily and securely detect a defect caused by a horizontal circuit and a data line before a liquid crystal process on the TFT substrate of the active matrix liquid crystal display device. CONSTITUTION:Horizontal driving circuits 11 and 12 provided on the top and reverse sides of a display part 15 and inspecting circuits 13 and 14 which input signals from data lines are formed on the same substrate with TFTs of the display part 15. A pulse is supplied to one of plural video signal input lines 18 and 19 and the other video signal input line is placed in a float state; and the output waveforms of the inspecting circuits 13 and 14 are checked to evaluate the cause of the defect and its place.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix liquid crystal display device using active elements such as thin film transistors.

0002

[Background Art] In recent years, active matrix liquid crystal display devices have been put into practical use because they are suitable for larger screens and mass production, and thin film transistors (hereinafter referred to as TFTs) are used as active elements in order to further reduce size and improve image quality. ) has been put into practical use. As shown in FIG. 6, the TFT substrate for a liquid crystal display device applied to this type of mobile television is composed of an amorphous transistor 3, which is a type of thin film transistor, as an active element for switching, and a storage capacitor 4 that stores charge. There is. In FIG. 6, 1 is a data line group (D1, D2, ...) of the display section, 2 is a gate line group (G1, G2, ...) of the display section, and 5 is a common electrode of the storage capacitor 4. It is a line. With this circuit configuration, defect inspection of the data line group 1 of the display section is limited to checking for disconnections. The method is to create terminals by connecting about 10 wires at both ends of data line group 1, and checking the wire resistance between the terminals at both ends of each connected wire to determine whether there is a disconnection or not, and detect defects. . For example, the normal wire resistance when 10 data lines are connected is
Assuming R1, if one wire is broken, the wire resistance is 10/9
If two wires are broken, the wire resistance increases by 10/8 times. By examining the wire resistance in this manner, disconnection defects are screened out.

0003

[Problems to be Solved by the Invention] Although it is possible to determine whether a data line is defective due to a disconnection in this way, it takes a long time to perform the inspection, and it is difficult to identify which group of wires the defective disconnection is located in. However, it is not possible to determine which line it is. Furthermore, short-circuit defects between adjacent data lines cannot be detected. As mentioned above, it is not possible to inspect defects due to disconnections or short circuits in data lines at the TFT substrate stage in the short time required for the production base, and the defects are introduced into the next liquid crystal process without being able to be sorted out. This is one of the causes of high costs.

The present invention takes the above-mentioned problems into consideration and provides an active matrix liquid crystal display device in which defects in data lines can be easily detected and can be applied to active matrix liquid crystal displays with high definition or high density pixels. The purpose is to

[0005]

[Means for Solving the Problems] In order to achieve the above object of the present invention, an active matrix type liquid crystal display device using active elements is provided with a test circuit in which ends of a plurality of data lines are connected, and the test circuit obtains an output according to the potential at the end of the data line.

[0006]

[Operation] The active matrix type liquid crystal display device with the above configuration inputs a video signal and scans multiple data lines with a scanning circuit, and the testing circuit detects the state of the terminal potential of the data line, thereby detecting disconnection. Alternatively, data lines with defects such as short circuits can be selected. In general, in active matrix liquid crystal display devices, video signals are sequentially scanned over multiple data lines in synchronization with clock pulses by a scanning circuit such as a shift register. A test circuit detects whether this occurs. During detection, the input signal is sequentially applied to each data line using a clock pulse, so if an abnormality occurs in the signal at the end of the data line at the defective data line, the output signal of the detection circuit will be abnormal. The data line can be identified from the temporal position of the occurrence, and the failure mode can be determined from the level of the abnormal signal. In other words, it is possible to simultaneously identify the failure mode of disconnection or short circuit and the location of the failure to determine the failure, eliminate the introduction of defective chips into the liquid crystal process, and reduce the cost of the final product, the liquid crystal display. Can be done. Furthermore, with this method, even if the pixels of a liquid crystal display become highly integrated, inspection will not become difficult at all.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An active matrix liquid crystal display device according to an embodiment of the present invention will be described below. FIG. 1 is a block diagram showing the circuit configuration of a horizontal circuit for an active matrix liquid crystal display device according to the first embodiment, and FIG. 2 is a circuit diagram of a shift register in the horizontal circuit. 3 is a pulse timing chart showing the method of driving the horizontal circuit of this embodiment. Horizontal drive circuit 11 provided above and below the display section 15
, 12 is a shift register 1 based on two-phase clock pulses.
6, 17 and each output of the shift register VH1, VH2, V
It consists of an analog switch 23 driven by H3, VH4, . . . , video signal input lines 18, 19, and an output line of the analog switch 23 connected to the data line of the display section 15. The number of analog switches driven by one output of the shift registers 16 and 17 is as follows:
The numbers are the same as 8 and 19. In the case of FIG. 1, three analog switches 23 are driven. The upper and lower horizontal drive circuits 11 and 12 sequentially transfer video signals to each of the three columns of data lines. Further, as shown in FIG. 2, the shift registers 16 and 17 are composed of two types of circuits, circuit A and circuit B, and the start pulse VSP for driving these circuits is common. As shown in FIG. 3, the phases of the clock pulses are shifted by 180 degrees, and there are two shift registers, shift registers 16 and 17, but there are two types of drive pulses: clock pulse φ and start pulse VSP. There are three in total. The outputs of the shift register circuits A and B each output a pulse shifted by one clock pulse cycle time, and the outputs of the adjacent VHn and VHn+1
is shifted by a half period of the clock pulse.

An inspection circuit 13 for inspecting defects in the data lines driven by the horizontal drive circuit 11 at the upper part of the display section 15 is provided at the lower part of the display section 15 on the opposite side with the display section 15 in between. The inspection circuit 14 that inspects the data lines driven by the horizontal drive circuit 12 at the lower part of the display section 15 is connected to the display section 15.
It is provided on the upper part of the display section 15 on the opposite side of the screen. The test circuits 13 and 14 are composed of a total of six sets of NOR circuits (upper and lower). The NOR circuit consists of an n-channel transistor 22 and a resistor 25, a data line is connected to the gate of the n-channel transistor 22, and a plurality of transistors are connected in parallel. The resistor 25 is required only for inspection, and may be built into the same substrate or provided externally.

The inspection method is to drive the horizontal drive circuit with the output pulses VHn of the shift registers 16 and 17, and then apply a pulse to only one of the video signal input lines 18, as shown in FIG. 4(a). input, and other video input lines should be floating. For example, as shown in Figure 4(b), V
A pulse with a period twice the clock pulse is input only to sigl, and the other Vsigs are made floating. If there is no defect, only Vout1 has a waveform opposite to Vsig1, and the other outputs have a constant DC level, as shown in FIG. 4(c). If the 3rd n+2 column data line of the display section 15 and the 3rd
If the n+1 column data line is short-circuited, two pulses are generated during the selection period of VHn of the constant DC level output Vout2 as shown in FIG. 4(d). Even when the 3nth column data line and the 3n+1st column data line of the display section 15 are short-circuited, the output Vou at a constant DC level is output as shown in FIG. 4(e).
Two pulses appear during the selection period of VHn at t6. In addition, if there is a disconnection in the data line of the 3n+1th column, the pulse of the video signal input line will not be transmitted to the gate of the test circuit, so the output Vout1 of the test circuit will be VH as shown in FIG. 4(f).
The waveform has no pulse during the selected period of n.

In this embodiment, the transistor of the test circuit is an n-channel transistor, but the transistor is not limited to this, and may be a p-channel transistor. In that case, the high level and low power supply levels of the test circuit will be opposite. In this way, the test circuit is a NOR circuit that inputs the data line of the display section, or an AND circuit.
Any circuit configuration is sufficient.

[0011] In the description of the embodiment, short circuits and disconnections of the data lines have been described, but even if the analog switch is always turned off due to malfunction, it can be detected as a defect in the same way as a disconnection. Further, in this embodiment, the shift register circuit is CMOS static, but the shift register circuit is not limited to this, and may be designed to have a configuration such as a CMOS dynamic circuit, an NMOS static circuit, or an NMOS dynamic circuit.

The test circuit of this embodiment is necessary only for testing and is not required for actual display, and need only be connected for testing. In other words, only when testing, use a prober to touch the data line and connect an external NOR circuit or A
An ND circuit may also be provided.

FIG. 5 is a block diagram showing the configuration of an active matrix liquid crystal display device according to a second embodiment of the present invention. As shown in FIG. 5, its components include a horizontal drive circuit 31, an inspection circuit 32, and a display section 33. The horizontal drive circuit 31 includes a shift register 34, an analog switch 35 driven by the shift register 34, and a video signal input line 36 to the analog switch 35. Inspection circuit 32
are three sets of NOR circuits whose inputs are data lines. The output of test circuit 32 is output 38 . In this way, the first embodiment has a structure in which the test circuits provided above and below are only on one side.

The inspection method is to drive the horizontal drive circuit 31 in the same way as in FIG. 4, and then input a pulse to only one of the video signal input lines, leaving the other video input lines floating. For example, if a pulse with a period twice the clock pulse is input to only Vsig1, and the other Vsigs are left floating, the operation will be exactly the same as in FIG. 4. That is, if there is no defect, only Vout1 outputs a waveform opposite to Vsig1, and the other outputs have a constant DC level. If the 3(n+2)th column data line and the 3(n+1)th column data line of the display section 33 are short-circuited, the output Vout at a constant DC level
Two pulses are generated during the second VHn selection period. Further, if the 3nth column data line and the 3n+1st column data line of the display section 33 are short-circuited, the output Vo at a constant DC level
Two pulses appear during the selection period of VHn of ut6. Next, when there is a disconnection in the data line of the (n+1)th column, the pulse of the video signal input line is not transmitted to the gate of the test circuit, so the output Vout1 of the test circuit has a waveform with no pulse during the selection period of VHn.

[0015]

Effects of the Invention As is clear from the above description, the active matrix liquid crystal display device of the present invention has a detection circuit provided at the end of the data line, thereby detecting defects with high accuracy before the liquid crystal process after manufacturing the TFT substrate. This enables inspection of high-density TFT substrates easily and reliably.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the circuit configuration of an active matrix liquid crystal display device according to a first embodiment of the present invention.

[Figure 2] Circuit diagram of the shift register of the liquid crystal display device of the same example

[Fig. 3] Timing chart showing drive pulses and shift register output waveforms of the liquid crystal display device of the same example.

[Figure 4]
A timing chart showing the operation of each part showing a method of testing the liquid crystal display device of the same example.

FIG. 5 is a block diagram showing the circuit configuration of a liquid crystal display device according to a second embodiment of the present invention.

[Fig. 6] Block diagram showing the circuit configuration of a TFT substrate of a conventional liquid crystal display device

[Explanation of symbols]

11, 12 Horizontal drive circuit 13, 14 Inspection circuit 15 Display section 16,17 Shift register

Claims (6)

[Claims] 1. A liquid crystal display section including an active element provided at a cross point between a plurality of data lines and a gate line; an analog switch connected to each of the plurality of data lines; A shift register that inputs and scans video signals from a video input line in synchronization with clock pulses on a plurality of data lines, and a test circuit connected to ends of the plurality of data lines, the test circuit connecting the plurality of data lines. An active matrix liquid crystal display device that obtains output according to the terminal potential of the 2. The active matrix liquid crystal display device according to claim 1, wherein the video input line is composed of a plurality of lines, and has an analog switch, a data line, and a test circuit corresponding to each of the plurality of video input lines. 3. A shift register in which the plurality of data lines are comprised of a first data line group connected to a first analog switch group and a second data line group connected to a second analog switch group. consists of a first shift register that drives the first analog switch group and a second shift register that drives the second analog switch, and a first test circuit is provided at the end of the first data line group. is connected,
A second test circuit is connected to an end of the second data line group, and the first shift register, the first analog switch group, and the second test circuit are arranged above the periphery of the liquid crystal display section. 3. The active matrix liquid crystal display device according to claim 1, wherein the second shift register, the second analog switch group, and the first test circuit are arranged below the periphery of the liquid crystal display section. 4. The active matrix liquid crystal display according to claim 3, wherein the first and second shift registers drive the first and second analog switches, respectively, with a phase shift of half a clock pulse period. Device. 5. The inspection circuit stops inputting the video signal to the video input line, and inputs a pulse having a frequency that is an integral multiple of the clock pulse instead of the video signal to some of the video input lines. 5. The active matrix liquid crystal display device according to claim 1, wherein the active matrix liquid crystal display device operates. 6. The active matrix liquid crystal display device according to claim 1, wherein the test circuit comprises an AND circuit or a NOR circuit.