JPH04194817A - Drive circuit for display device - Google Patents

Abstract

PURPOSE:To hold a picture signal for an enough time even when a picture element is connected to the last row of each group by providing a row electrode drive means to feed a picture signal to all row electrodes, and a plurality of line electrode drive means located to each of a plurality of groups into which all row electrodes are divided and feeding a scanning signal to a line electrode crossing the row electrode of each group. CONSTITUTION:The (m) lines X (n) rows picture elements are divided into two groups of the one being (m) lines X (k) rows and the other being (m) lines X(n - k) rows, and one gate driver corresponding to each group is provided and two in all are provided. Gate bus lines Ga1 - Gam connected to (m) X (k) picture elements on the left side are connected to a first gate driver 10, and gate bus lines Gb1 - Gbm connected to (m) X (n - k) picture elements on the right side are connected to a second driver 11. Source bus lines S1 - Sk and Sk+1 - Sn of the two groups are all connected to one source driver 12.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a drive circuit for a display device, and particularly to a drive circuit for a display device using a so-called point-sequential scanning drive method in which display information is written by sequentially applying a data voltage to each picture element. Regarding drive circuits.

(Prior art) TPT (Thin Film) provided for each picture element.
Figure 3 shows the configuration of a general active matrix type liquid crystal display device that uses a dot sequential scanning drive method in which an image signal voltage is applied to each picture element one by one using a Pixel Transistor (IIITransistor) as a switching element. FIG. 4 shows a timing chart of various signals in this display device. The liquid crystal display device of FIG. 3 has m gate pass lines 61 to G1 provided in parallel with each other, and 0 north bus lines intersecting these gate pass lines:
・It has 51 to So.

A liquid crystal cell L1. is located at each intersection of the gate pass line G1 and the source pass line Sj. ” and a TPT for driving the liquid crystal cell. That is, the liquid crystal display device shown in FIG. 3 is composed of picture elements arranged in m rows and n columns. Gate pass lines 61-G are all connected to gate driver 30, and source pass lines S1-So are all connected to source driver 32.

When driving such a liquid crystal display device, as shown in FIG.
, G2, . . . to make the TPTs of n picture elements in each row conductive (ON). The 71-level of this signal is one horizontal scanning period (IH
) continues. Further, the source bus driver 32 sequentially samples the instantaneous value at each point in time of the video signal v (t) input during this one horizontal period, and outputs the sample to each of the n source path lines S1 to Sn. The signal voltages output to the source path lines S, ~Sn are held as they are in each liquid crystal cell until another voltage is output at the same timing in the next horizontal period. As a result, the liquid crystal cell L1 in the i-th row and j-th column. ", while a high level signal is output to the gate pass line G1 of that row and the TPT of that picture element is ON, the source pass line S of that column,
At the point when the video signal is input through
1. That voltage continues to be applied to.

For example, in FIG. 4, while the gate pass line G1 is at a high level, the video signal v is applied to the source pass line S1.
Signal voltage Vd corresponding to instantaneous value VVI+ at point a in (t)
When m is output, the liquid crystal cell L! .

1 begins to be applied with the signal voltage Vda. Similarly, the n-th (last column) liquid crystal cell L+ in the first row. for,
From point b near the end of that horizontal period, the video signal value Vv
The signal voltage Vdb corresponding to b is the source pass line S. begins to be applied through the . Second row liquid crystal cell L2, 1, L
2. . The same is true for

(Problems to be Solved by the Invention) Each liquid crystal cell L1. "'s TPT is that Kate pass line G
It is ON only while the blank scanning signal is being output (at the /% blank level). In other words, when the horizontal period of that row (first row) ends, the horizontal period of the next row ((i+1)th row) starts, and the scanning signal is output to the gate pass line G1 or 1. , i-th row liquid crystal cell L1.1
~L1. . Then, the scanning signal from the gate pass line G1 is no longer output, and the TPT is turned off. TPT is O
When the FF becomes FF, the signal voltage from the source pass line is applied to the liquid crystal cells L1.1 to L1.1 in that row. . is no longer applied.

In this case, as can be seen from FIG. 4, the liquid crystal cells L1.1, L2.1, ... in the first column have signal voltages Vda, V
dc, ... is almost during one horizontal period (a in Fig. 4)
-c) is applied, but the liquid crystal cell L in the last nth column
l+ns LP01,..., the signal voltage Vdb,...
. . . etc. (between b and c in FIG. 4) is very short. Therefore, there is a problem of asymmetry in that the application time of the signal voltage differs depending on the position of the liquid crystal cell even within one screen, and a problem that normal display cannot be performed in the last column.

The present invention was made in view of the current situation, and
The object thereof is to provide a drive circuit for a display device that eliminates the above-mentioned drawbacks.

(Means for Solving the Problems) A drive circuit for a display device according to the present invention drives a pixel at the intersection of each row electrode and column electrode using a plurality of row electrodes and a plurality of column electrodes intersecting the row electrodes. A drive circuit,
Column electrode driving means that sends image signals to all column electrodes, and sends scanning signals to row electrodes that intersect with the column electrodes of each group, which are provided for each group in which all the column electrodes are divided into a plurality of groups. A plurality of row electrode driving means are provided, thereby achieving the above object.

(Operation) The timing of the scanning signal sent from each row electrode driving means to each group of row electrodes is set as follows. The transmission start point is set immediately before the first image signal of each group of column electrodes is transmitted. Further, the sending period is one horizontal scanning period or a period equivalent thereto. As a result, even for picture elements connected to the last column in each group, the transmission of the scanning signal does not end immediately after the image signal is transmitted, and the image signal is retained for a sufficient period of time. continue.

(Example) The invention will now be described with reference to examples.

FIG. 1 schematically shows the main parts of an active matrix liquid crystal display device according to an embodiment of the present invention.

The basic structure of this liquid crystal display device is the same as that of the liquid crystal display device shown in FIG. A TPT for driving is provided. However, in the liquid crystal display device of this embodiment, unlike conventional liquid crystal display devices, the picture elements of m rows and n columns are divided into two groups: m rows and Xk columns and m rows and X(n-k) columns. One gate driver (two in total) is provided corresponding to each of them. In a group of mXk picture elements on the left side in FIG. 1, m gate pass lines Gs+ to G□ and source pass lines S1 to Sk are provided. Also, mx on the right
A group of (nk) picture elements is provided with m gate pass lines Gb1 to GblI and (nk) source pass lines Sk41 to Sn.

Gate pass lines 61 to G, 11 connected to mXk picture elements on the left side are connected to the first gate driver 10, and gate bus lines 61 to G, 11 connected to mXk picture elements on the right side are connected to mX(n-k) picture elements on the right side. GbI-Gb11 is the second gate driver 1
Connected to 1. Source path lines for both groups
, -sk, Sk and 1 to So are all connected to one source driver 12.The operation of this drive circuit will be explained based on the timing chart of FIG. In the source driver 12, like the source driver 32 of the conventional drive circuit shown in FIG. The voltage is on the source path line S1~sk,s
It is output to k and 1 to So. The first gate driver 10 sequentially outputs a scanning signal to the gate pass lines Gal to Gas, and raises the scanning signal to a high level one horizontal period at a time. Here, 1
When the high level of one gate pass line G111 ends, the high level period of the next gate pass line Ga2 starts, and so on.
, Ga4, . . . are arranged so that their high level periods do not overlap. On the other hand, the second gate driver 1
1 sequentially outputs a scanning signal to the gate pass lines Gbl to Ghm, and sets it to a high level one horizontal period at a time. Again, each day 1-Has line G bl, G b2,...
The high level periods of both the first and second gate drive knobs 10.1 are arranged so that they do not overlap.
Looking at the relationship between 1 and 1, we can see that the period during which the gate pass line Gai of the left group is at a high level (((
1-h) and the noise level period of the gate pass line Gy of the right group (between f~'' in Figure 2).
is set to start.

Specifically, the first gate driver 10 connects the first (i.e., the first of the left group) source pass line S
The second gate driver 11 starts outputting the scanning signal immediately before the signal voltage is outputted to the first source path line S khl of the right group, and the second gate driver 11 starts outputting the scanning signal just before the signal voltage is outputted to the first source path line S khl of the right group. . In this way, two gate drivers are provided, and scanning signals with different timings are applied to the (n-k) picture elements on the left side and the (n-k) picture elements on the right side of one row. , the duration of the signal voltage applied to each liquid crystal cell in the right group differs from the conventional drive circuit as follows.

Source path lines S1+1 to S of the right group.

Immediately before the output of the signal voltage starts, the output of the scanning signal of the gate pass line cib that drives the picture elements of that group starts, but the scanning signal (high level) of this gate pass line G+b is The period from f) in FIG. 2 continues for a period corresponding to one horizontal scanning period. Therefore, for example 1
The signal voltage Vdr applied to the first liquid crystal cell L1 of the right group in the row continues to be applied for a period corresponding to one horizontal scanning period. Also, the last liquid crystal cell L 1 of the right group (that is, the last of the entire first row)
．． In the conventional drive circuit, the signal voltage Vdl applied to the gate pass line Gb2 has a short duration because the TPT is turned off immediately after being applied, but in this embodiment, the scanning signal of the gate pass line Gb2 of the next row is It continues until the start (that is, while the signal voltage is being output to the source lines 81 to Sk of the left group of the next row, between g and j in FIG. 2).

Therefore, in the drive circuit of the above embodiment, the group division is made near the center (that is, the value of k is set to the number of columns n
), the signal voltages Vdd and vah applied to the picture elements in the first column are applied for one horizontal period, and the signal voltages Vdd and vah applied to the picture elements in the last column of the left group are applied for one horizontal period. The voltages Vds and vdl are applied for approximately half of the l horizontal scanning period. Up to this point, the drive circuit is the same as the conventional drive circuit, but in this embodiment, the signal voltages Vdr and vdl applied to the picture elements in the first column of the right group are (not half of l horizontal scanning period as in the conventional case). ) is applied for a period corresponding to approximately one horizontal scanning period. Moreover, especially unlike conventional circuits,
As shown in FIGS. 3 and 4, in the conventional circuit, the image signal applied to the picture elements in the last row was only for a short period of time, whereas in this embodiment, the last row of picture elements in the right group Column (
That is, the signal voltage 6g, Vdk, is applied to the picture elements in the last column of the entire display device for about half of one horizontal scanning period.

As a result, in the liquid crystal display device of this embodiment, there are no picture elements whose normal display period is extremely short.

In the above embodiment, all picture elements are divided into two groups, but they may be divided into three or more groups, and a gate driver may be provided for each group.

By doing so, the period during which the correct signal voltage is applied to each picture element can be brought closer to one horizontal scanning period or a period equivalent thereto.

(Effects of the Invention) According to the present invention, even if the picture element is connected to the last column in each group, the transmission of the scanning signal does not end immediately after the image signal is transmitted. A long image signal retention time is ensured. Therefore, normal display can be performed on the entire surface of the display device.

Figure 1 is a circuit diagram of a driving circuit for a liquid crystal display device using two gate drivers, which is an embodiment of the present invention, Figure 2 is its signal timing diagram, and Figure 3 is a diagram of its signal timing diagram. FIG. 4 is a circuit diagram of a drive circuit for a conventional liquid crystal display device, and its signal timing diagram is shown in FIG.

10... Gate driver for first group, G, 1 to G, lI
...Gate pass line connected to the first group of picture elements, 1
1... 2nd group gate driver, Gbl~G port...
Gate pass line connected to the second group of picture elements, 12...
・Source driver, Sl~SkS Sk and l~S n"
'Above the source path line

Claims (1)

[Scope of Claims] 1. A drive circuit for a display device that drives picture elements at the intersections of each row electrode and column electrode by a plurality of row electrodes and a plurality of column electrodes intersecting with them, wherein Column electrode drive means for transmitting image signals, and a plurality of row electrode drives for transmitting scanning signals to row electrodes intersecting the column electrodes of each group, provided for each group in which all column electrodes are divided into a plurality of groups. A drive circuit for a display device comprising: means for driving a display device;