JPH04167042A - Asynchronous input/output system - Google Patents

Abstract

PURPOSE:To shorten a turn around time by automatically performing a waiting process for input/output operation which is performed by a user heretofore. CONSTITUTION:A program which performs input and output is provided with a setting means 11 which sets address coincidence interruption in an input/output address right before the input or output and a detecting means 12 which detects the address coincidence interruption obtained by the setting means 11. Further, a waiting means 13 inputs the output of the detecting means 12 and waits the end of the input or output in the address coincidence interrupting process. Therefore, the process for waiting the input and output which is performed by the user heretofore can be performed automatically. Consequently, the input/output process and the arithmetic process of a CPU can be performed in parallel by a necessary sufficient quantity and the turn around time is shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an asynchronous input/output method in a program that performs input/output.

[Conventional technology]

Since the processing speed of input/output is much slower than arithmetic processing performed by other CPUs, an asynchronous input/output method has traditionally been used to simultaneously perform human output and processing performed by the CPU.

Figure 6 is a diagram used to explain the conventional asynchronous input/output method.
61 in (-) indicates the input sentence, 6 in (b)
2 indicates an output sentence. 63m and 63b indicate a meeting point.

The conventional asynchronous input/output method, as shown in FIG. 6, was a method in which a location where one person's output was to be waited for was explicitly specified in the program.

[Problem to be solved by the invention]

With conventional asynchronous input/output methods, it is necessary for the user to explicitly specify the location in the program where the user waits for input/output, which causes problems such as not necessarily being an effective specification, and incorrect specification causing the program itself to malfunction. was there.

[Means to solve the problem]

The asynchronous input/output method of the present invention includes a setting means for setting an address match interrupt at an input/output data address immediately before performing input/output in a program that performs input/output, and detecting an address match interrupt obtained by this setting means. Waiting means receives the output of the detection means and waits for completion of input/output in address match interrupt processing.

By the way, the asynchronous input/output method according to another invention of the present invention is that in a program that performs input/output, immediately before performing input/output,
A setting means for setting an address match interrupt at an input/output data address that generates an interrupt when input data is referenced and updated if it is an input, or when output data is updated if it is an output; Teru・
The apparatus is equipped with a detecting means for detecting an address match interrupt under the conditions of the update mechanism, and a waiting means that receives the output of the detecting means as an input and waits for the completion of input/output in address match interrupt processing.

[Effect]

In the present invention, processing for waiting for input/output, which was conventionally performed by a user, is automatically performed.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 1 is a block diagram showing an embodiment of the asynchronous input/output method according to the present invention.

In FIG. 1, 11#i address match interrupt setting section 11 performs input/output with a setting means for setting an address match interrupt at an input/output data address immediately before input/output. It constitutes a setting means for setting an address match interrupt at the input/output data address, which generates an interrupt at the time of referencing and updating the input data if it is an input immediately before, and at the time of updating the output data if it is an output. Reference numeral 12 denotes an address match interrupt detection unit, which receives the detection means for detecting the address match interrupt obtained by the setting means and the output of the setting means as input, and performs a data reference/update function. It constitutes a detection means that detects an address match interrupt under certain conditions. 13 is an input/output waiting section,
The input/output waiting section 13 receives the output of the detecting means and constitutes a waiting means for waiting for the end of input/output in address match interrupt processing and a waiting means for waiting for the end of input/output in address match interrupt processing.

Figure 2 is an explanatory diagram showing a source program, where 21 in (,) indicates an input statement, 22 indicates input data reference, 23 indicates update of input data, 24 in (b) indicates an output statement, 2
5 indicates update of output data.

FIG. 3 is a flowchart of input/output processing (address matching interrupt setting means for input/output data), and each step 31
In steps 34 to 34, predetermined processing is executed.

Figure 4 is an input/output table, and Figure 5 is a flowchart of address match interrupt processing (input/output waiting means).
In each step 51 to 53, a predetermined process is executed.

Next, the operation of the embodiment shown in Fig. 1 will be explained in Figs.
This will be explained with reference to the figures.

First, the source program shown in FIG. 2 indicates that an input sentence 21, which is data A shown in FIG. 2(a), is input from a file, and the input data is then referenced 22. Therefore, data A must not be accessed before input of the input sentence 210, which is data A, is completed.

Then, when the input statement (READ statement) 21 is executed, the address match interrupt unit 11 for the input/output data in the input/output process interrupts the input data with the reference 22 immediately before performing the input/output.
′! It should be set so that an address match interrupt occurs when the output data is updated 23 (in the case of the output statement (WRITE statement) 24 shown in FIG. 2(b), when the output data is updated). Step 31), start input/output in a separate task, step 32), register the data address and task ID in the input/output table shown in FIG. 1 (step 33), and continue the user program (step 34).
).

Next, when the input data is referenced 22 or updated 23 or the output data is updated 25, the address matching interrupt detection section 12 detects I'Il! ll interrupt is detected and interrupt processing is performed. In this interrupt processing, the input/output waiting unit 13 refers to the input/output table shown in FIG. (step 51 in FIG. 5), cancels the address match interrupt at the input/output data address (step 52), and continues the user program (step 53). Then, the continued user program will be updated to the location where the address match interrupt occurred (second
The process is re-executed from input data reference 22) shown in Figure (a), but since the address match interrupt has been canceled this time, no interrupt occurs.

〔Effect of the invention〕

As explained above, the present invention automatically performs the process of waiting for input/output, which was conventionally performed by the user, so that all input/output processing and calculation processing by the CPU are performed in parallel (as much as necessary and sufficient).
By doing so, the turnaround time can be reduced.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the asynchronous input/output method according to the present invention, FIG. 2 is an explanatory diagram showing a source program,
FIG. 3 is a flowchart of input/output processing, FIG. 4 is an input/output table, FIG. 5 is a flowchart of address match interrupt processing, and FIG. 6 is a diagram for explaining the conventional asynchronous input/output method. 11...Address match interrupt setting section, 12...
-Address match interrupt detection section, 13...I/O waiting section. Patent applicant: NEC Corporation

Claims (2)

[Claims] (1) In a program that performs input/output, a setting means for setting an address match interrupt at an input/output data address immediately before performing input/output, and a detection means for detecting an address match interrupt obtained by this setting means. , and waiting means which receives the output of the detection means as input and waits for completion of input/output in address match interrupt processing. (2) In a program that performs input/output, immediately before performing input/output, or when referencing and updating input data in the case of input,
If it is an output, there is a setting means for setting an address match interrupt at the input/output data address that generates an interrupt when output data is updated, and an address match interrupt is detected under each condition of data reference and update using the output of this setting means as input. 1. An asynchronous input/output system comprising: a detection means for detecting the output of the detection means; and a waiting means for inputting the output of the detection means and waiting for the completion of the input/output in address match interrupt processing.