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JPH04162560A - Charge pump circuit - Google Patents

Charge pump circuit

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Publication number
JPH04162560A
JPH04162560A JP2287806A JP28780690A JPH04162560A JP H04162560 A JPH04162560 A JP H04162560A JP 2287806 A JP2287806 A JP 2287806A JP 28780690 A JP28780690 A JP 28780690A JP H04162560 A JPH04162560 A JP H04162560A
Authority
JP
Japan
Prior art keywords
charge pump
voltage
pump circuit
circuit
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2287806A
Other languages
Japanese (ja)
Other versions
JP2614938B2 (en
Inventor
Hiroshi Iguchi
井口 広
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC IC Microcomputer Systems Co Ltd
Original Assignee
NEC IC Microcomputer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC IC Microcomputer Systems Co Ltd filed Critical NEC IC Microcomputer Systems Co Ltd
Priority to JP2287806A priority Critical patent/JP2614938B2/en
Publication of JPH04162560A publication Critical patent/JPH04162560A/en
Application granted granted Critical
Publication of JP2614938B2 publication Critical patent/JP2614938B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To provide a circuit capable of producing desired output voltage with an irreducible minimum consumption current by installing a feedback parts for modulating switching frequency of the input in to a charge pump circuit according to the degree of the load, and by installing a VCO which receives the output of the feedback part as voltage control signal and outputs the switching signals for the charge pump circuit. CONSTITUTION:There are provided with a charge pump circuit 1 for charging a capacitor by switching pulses and for stepping up or down DC voltage, feedback parts 2 and 3 for modulating switching frequency of the input into the charge pump circuit 1 and a VCO (Voltage Control Oscillator) 4 which receives the outputs of the feedback parts 2, 3 as voltage control signals and outputs the switching signals for the charge pump circuit 1. In details, the above- mentioned feedback parts 2 and 3 have a voltage dividing circuit 2 and an error amplifier 3. The voltage dividing circuit 2 divides voltage of the output of the charge pump circuit 1. The error amplifier 3 compares the output of the voltage dividing circuit 2 with a reference voltage and outputs the voltage control signal to the VCO4.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、チャージポンプ回路に関し、特に消費電流の
最適化により半導体集積回路(以下ICと略す)に内蔵
するチャージポンプ回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a charge pump circuit, and particularly to a charge pump circuit built into a semiconductor integrated circuit (hereinafter abbreviated as IC) by optimizing current consumption.

〔従来の技術〕[Conventional technology]

従来のチャージポンプ回路は、第5図に示すように、イ
ンバータを奇数個#続し、最後段を最初段へ帰還して自
励発振させるリングオシレータ50と、リングオシレー
タ50の出力をスイッチング信号としてコンデンサの充
電回路をスイッチングするチャージポンプ回路51と、
チャージポンプ回路出力の過剰昇圧電圧をクランプする
クランプ回路52とを有している。第5図に示すチャー
ジポンプ回路は、インバータのもつ固有の遅延時間を利
用し、奇数個のインバータを接続し、正帰還ループを形
成して発振回路を構成している。このリングオシレータ
50の発振周波数は、個々のインバータの立上り遅延時
間と立下り遅延時間との和をtdiNV、接続するイン
バータの個数をn個とすると、概ね(1)式のように f 中 1/(t      xn)        
−(1ンlNV 算出される6チヤ一ジポンプ回路の内部回路については
、種々の回路例かあるか、たとえば第3図は、3倍電圧
を発生させる3倍昇圧回路30を備えたチャージポンプ
回路の例を示す0本例のクランプ回路は、所望の出力電
圧を得るためにあらかじめ高目の電圧に昇圧しておき、
余分な電圧をクランプ回路でおさえる働きをさせている
As shown in Figure 5, the conventional charge pump circuit has an odd number of inverters connected, a ring oscillator 50 that feeds back the last stage to the first stage for self-oscillation, and uses the output of the ring oscillator 50 as a switching signal. a charge pump circuit 51 that switches a capacitor charging circuit;
It has a clamp circuit 52 that clamps an excessively boosted voltage output from the charge pump circuit. The charge pump circuit shown in FIG. 5 utilizes the inherent delay time of inverters, connects an odd number of inverters, and forms a positive feedback loop to form an oscillation circuit. The oscillation frequency of this ring oscillator 50 is roughly expressed as f in equation (1), where tdiNV is the sum of the rise delay time and fall delay time of each inverter, and n is the number of connected inverters. (txn)
-(1-lNV) Regarding the internal circuit of the 6-charge pump circuit to be calculated, are there various circuit examples? For example, FIG. The clamp circuit shown in this example has been boosted to a high voltage in advance to obtain the desired output voltage.
A clamp circuit works to suppress excess voltage.

又別な従来例を第6図に示す。本例は定電圧回路60と
、その定電圧回路出力Vr8fを基準電圧として、m倍
に昇圧してm×■refの出力電圧を得るチャージポン
プ回路61とを有している。本例は、時計用ICや電卓
用ICの液晶駆動用電源として、広く実用化されている
Another conventional example is shown in FIG. This example has a constant voltage circuit 60 and a charge pump circuit 61 which uses the constant voltage circuit output Vr8f as a reference voltage and boosts the voltage by m times to obtain an output voltage of m×ref. This example is widely put into practical use as a power source for driving liquid crystals of ICs for watches and ICs for calculators.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

第5図の従来例では、リングオシレータの発振周波数が
構成回路を決定した段階で固定され、チャージポンプ回
路出力の負荷の大小にかかわらず、リングオシレータの
消費電流が多く、特にIC内蔵化の大きな障害となって
いた。更に出力部にクランプ回路があり、所望の出力電
圧はクラングミ圧の設定精度によって決められるが、I
C内蔵で高精度化することはコストアップになるという
欠点があった。
In the conventional example shown in Fig. 5, the oscillation frequency of the ring oscillator is fixed at the stage when the configuration circuit is determined, and the current consumption of the ring oscillator is large regardless of the load of the charge pump circuit output. It was a hindrance. Furthermore, there is a clamp circuit in the output section, and the desired output voltage is determined by the setting accuracy of the clamp pressure.
Increasing precision by incorporating C had the disadvantage of increasing costs.

第6図の従来例は、出力電圧をm X V r e t
として求めることができるため、出力電圧を精度よく得
ることができるが、負荷が大きくなった場合に、電圧降
下分を補間するようになっていないため、用途が液晶表
示器の駆動回路などに限られていた。
In the conventional example shown in FIG. 6, the output voltage is m
Since the output voltage can be determined as It was getting worse.

本発明の目的は、必要最小限の消費電流で所望の出力電
圧を得るチャージボン1回路を捷供することにある。
An object of the present invention is to provide a charge bond 1 circuit that obtains a desired output voltage with the minimum necessary current consumption.

〔課題を解決するための手段〕[Means to solve the problem]

前記目的を達成するため、本発明に係るチャージポンプ
回路においては、パルスをスイッチングして、コンデン
サの充電を行ない、直流電圧を昇圧ないし降圧するチャ
ージポンプ回路において、チャージポンプ回路の負荷の
度合により、チャージポンプ回路入力のスイッチング周
波数を変調する帰還部と、帰還部の出力を電圧制御信号
とし、チャージポンプのスイッチング信号を出力するV
CO(Voltage Controlled 0sc
illator )とを有するものである。
In order to achieve the above object, the charge pump circuit according to the present invention switches pulses to charge a capacitor and step up or step down a DC voltage, depending on the degree of load on the charge pump circuit. A feedback section that modulates the switching frequency of the charge pump circuit input, and a V that uses the output of the feedback section as a voltage control signal and outputs the switching signal of the charge pump.
CO (Voltage Controlled 0sc
illustrator).

また前記帰還部は、分圧回路と、誤差増幅器とを有し、 分圧回路は、チャージポンプ回路出力を分圧するもので
あり、 誤差増幅器は、分圧回路出力と基準電圧とを比較し、V
COに対する電圧制御信号を出力するものである。
The feedback section also includes a voltage divider circuit and an error amplifier, the voltage divider circuit divides the charge pump circuit output, and the error amplifier compares the voltage divider circuit output with a reference voltage, V
It outputs a voltage control signal for CO.

〔作用〕[Effect]

チャージポンプ回路の負荷の度合により、チャージポン
プ回路入力のスイッチング周波数を変調させる帰還部を
設ける。その帰還部の構成が分圧回路と誤差増幅器であ
るチャージポンプ回路のスイッチング周波数を負荷の度
合により最適周波数にするVCO(Voltage C
ontrolled 0scillator )をリン
グオシレータの機能に付加する。
A feedback section is provided that modulates the switching frequency of the input to the charge pump circuit depending on the degree of load on the charge pump circuit. The feedback section consists of a voltage divider circuit and an error amplifier, and the switching frequency of the charge pump circuit is adjusted to the optimum frequency depending on the degree of load.
0scillator) is added to the ring oscillator function.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は、本発明の一実施例を示す構成図である。FIG. 1 is a configuration diagram showing an embodiment of the present invention.

図において、本実線側は、スイッチングによりコンデン
サを充電するチャージポンプ回路1と、チャージポンプ
回路1の出力を分圧する分圧回路2と、分圧回路2の出
力と基準電圧とを比較し、誤差電圧を増幅する誤差増幅
器3と、誤差増幅器3の出力を制■御電圧とし、チャー
ジポンプ回路lのスイッチング信号を出力するVCO(
VoltageControlled 0scillt
or) 4とを有する。また、5は負荷を示す。
In the figure, the solid line side shows a charge pump circuit 1 that charges a capacitor by switching, a voltage divider circuit 2 that divides the output of the charge pump circuit 1, and an error caused by comparing the output of the voltage divider circuit 2 with a reference voltage. An error amplifier 3 that amplifies the voltage, and a VCO (1) that uses the output of the error amplifier 3 as a control voltage and outputs a switching signal for the charge pump circuit (1).
VoltageControlled 0skillt
or) 4. Further, 5 indicates the load.

より具体的にするなめに、第2図の実施例で説明する。For more concrete explanation, the embodiment shown in FIG. 2 will be explained.

第2図は、第1図の構成の内部回路を具体的に示した一
例である。チャージポンプ回路1の例として、従来から
実績のある2倍電圧昇圧回路を用いた。即ち、出力電圧
V。=2XVooが得られる実施例である。ここでは、
2倍電圧昇圧回路は、MOS)−ランジスタT1〜T8
、コンデンサC、C2を有しており、その動作は、既に
公知技術であり省略するが、チャージポンプ回路1の部
分に、第3図に示す3倍電圧昇圧回路30ないしは、第
4図の1/2倍昇圧回路40をそのまま1き替えても差
しつかえない。
FIG. 2 is an example specifically showing the internal circuit of the configuration shown in FIG. As an example of the charge pump circuit 1, a double voltage booster circuit, which has been proven in the past, is used. That is, the output voltage V. This is an example in which =2XVoo is obtained. here,
The double voltage booster circuit consists of MOS)-transistors T1 to T8.
, C, and C2, and the operation thereof is already a well-known technology and will be omitted here, but the charge pump circuit 1 is provided with a triple voltage booster circuit 30 shown in FIG. 3 or a triple voltage booster circuit 30 shown in FIG. /2x booster circuit 40 may be replaced as is.

分圧回路2は、抵抗r  、t  、コンデンサCを有
し、チャージポンプ回路1の出力V。をr  /(r 
 +r2)に分圧する。即ち、分圧図路2の出力V は
、 「 V、= fr2/ (r1+r2 )) ・Vo・・・
(2)として算出できる。誤差増幅器3は、基準電圧■
、。、を正転入力に接続し、分圧回路2の出力V を抵
抗r3を介して、反転入力に接続した差動増幅器で構成
する。差動増幅器出力と反転入力の間を抵抗r4で負帰
還をかけると、誤差増幅器3の出力VCは、(3)式で
表わすことができる。
The voltage divider circuit 2 has resistors r, t and a capacitor C, and the output V of the charge pump circuit 1. r / (r
+r2). That is, the output V of the voltage division diagram 2 is: "V, = fr2/ (r1+r2)) ・Vo...
It can be calculated as (2). The error amplifier 3 uses the reference voltage ■
,. , is connected to the non-inverting input, and the output V of the voltage dividing circuit 2 is connected to the inverting input via the resistor r3. When negative feedback is applied between the differential amplifier output and the inverting input using a resistor r4, the output VC of the error amplifier 3 can be expressed by equation (3).

vo=vref−(r4/r3)(vl−vref)・
・・(3) 即ち、VCO4の電圧制御入力となるvcは、基準電圧
Vrefを中心に分圧回路2の出力V、と基準電圧V 
 の差分(v、−v   )をr4/ref     
     +     refr3倍に増幅し、極性を
反転した電圧を得る。VCO4の回路構成は、MOSト
ランジスタT9〜T22を有し、リングオシレータ回路
を変形し、インバータの負荷トランジスタT10’ T
12’ ”14゜T 及びT16のゲート電圧を電圧制
御し、誤差項幅器3の出力V。に接続する。
vo=vref-(r4/r3)(vl-vref)・
...(3) That is, vc, which is the voltage control input of the VCO 4, is the output V of the voltage divider circuit 2 and the reference voltage V, with the reference voltage Vref as the center.
The difference (v, -v) of r4/ref
+ refr Amplified three times to obtain a voltage with reversed polarity. The circuit configuration of VCO4 has MOS transistors T9 to T22, a modified ring oscillator circuit, and an inverter load transistor T10'T.
12'''14°T and the gate voltage of T16 are voltage controlled and connected to the output V of the error term width amplifier 3.

以上のようにすると、誤差増幅器3の出力V。By doing the above, the output V of the error amplifier 3.

が高くなると、リングオシレータのインバータの負荷電
流特性が大きくなり、発振周波数は高くなる0発振周波
数が高くなると、チャージポンプ回路1のスイッチング
速度も速くなり、チャージポンプ回路1の出力V。も高
くなる。その結果、分圧回路2の出力V、も高くなり、
(3)式に従って■ 誤差増幅器3の出力VCが低くなるというフィードバッ
クがかかり、自動制御が働く。
As the oscillation frequency increases, the load current characteristic of the inverter of the ring oscillator increases, and the oscillation frequency increases.As the oscillation frequency increases, the switching speed of the charge pump circuit 1 also increases, and the output V of the charge pump circuit 1 increases. It also becomes more expensive. As a result, the output V of the voltage divider circuit 2 also increases,
According to equation (3), feedback is applied that the output VC of the error amplifier 3 is lowered, and automatic control is activated.

(2)式と(3)式をまとめると、誤差増幅器の出力V
。とチャージポンプ回路出力Voとの間には、v  =
V   −(r  /r  )([r2/c     
ref       4    3(r+ r  ) 
] ・V   V 、et l・・・(4)の関係式が
成り立つ。
Putting together equations (2) and (3), the output V of the error amplifier is
. and the charge pump circuit output Vo, v =
V − (r / r ) ([r2/c
ref 4 3(r+r)
] ・V V , et l...The relational expression (4) holds true.

また、リングオシレータの個々のインバータの負荷電流
■、は、 I   =   1/2  β (V   −V   
)      ・・・(5)L           
     cT(βはMOS)−ランジスタの導伝係数
)として表わすことができ、5個のインバータを接続し
た本実施例では波形増幅用インバータを含めて、6×■
、としてリングオシレータの消費電流を算出でき、チャ
ージポンプ回路として出力V。
Also, the load current of each inverter of the ring oscillator is I = 1/2 β (V - V
)...(5)L
cT (β is MOS) - conduction coefficient of transistor), and in this example where five inverters are connected, including the inverter for waveform amplification, 6×■
The current consumption of the ring oscillator can be calculated as , and the output V as a charge pump circuit.

を得る最低限の消費電流で動作する構成となっている。It is configured to operate with the minimum current consumption to obtain the desired results.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、リングオシレータをvC
o構成にしたことにより、所望の出力電圧V。を得るた
めに必要な最小限の消費電流でチャージポンプ回路を実
現するとができ、IC内蔵化の極めて有効な手段である
As explained above, the present invention provides a ring oscillator with vC
o configuration, the desired output voltage V can be achieved. It is possible to realize a charge pump circuit with the minimum current consumption necessary to obtain the above, and is an extremely effective means of incorporating the IC.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の一実施例を示す構成図、第2図は、
第1図に示した構成の内部詳細回路図、第3図は、第1
図に示したチャージポンプ回路の3倍電圧昇圧回路を示
す図、第4図は、第1図に示したチャージポンプ回路の
1/2倍昇圧回路を示す図、第5図は、従来のチャージ
ポンプ回路を示す図、第6図は、従来の基準電圧をチャ
ージポンプする回路を示す図である。 1・・・チャージポンプ回路 2・・・分圧回路     3・・・誤差増幅器4・・
・VCO5・・・負荷 T 〜T22・・・MO3I−ランジスタC〜C3・・
・コンデンサ r1〜r4・・・抵抗 4               、/ノ 第2図 50                       
   5ノ第6図
FIG. 1 is a configuration diagram showing one embodiment of the present invention, and FIG.
The detailed internal circuit diagram of the configuration shown in Fig. 1 is shown in Fig. 3.
Figure 4 shows a 1/2 voltage booster circuit of the charge pump circuit shown in Figure 1, and Figure 5 shows a conventional charge pump circuit. FIG. 6 is a diagram showing a conventional circuit for charge pumping a reference voltage. 1...Charge pump circuit 2...Voltage divider circuit 3...Error amplifier 4...
・VCO5...load T ~T22...MO3I-ransistor C~C3...
・Capacitors r1 to r4...Resistance 4, /no Figure 2 50
Figure 6 of 5

Claims (2)

【特許請求の範囲】[Claims] (1)パルスをスイッチングして、コンデンサの充電を
行ない、直流電圧を昇圧ないし降圧するチャージポンプ
回路において、 チャージポンプ回路の負荷の度合により、チャージポン
プ回路入力のスイッチング周波数を変調する帰還部と、
帰還部の出力を電圧制御信号とし、チャージポンプのス
イッチング信号を出力するVCO(VoltageCo
ntrolledOscillator)とを有するこ
とを特徴とするチャージポンプ回路。
(1) In a charge pump circuit that charges a capacitor by switching pulses to step up or step down a DC voltage, a feedback section that modulates the switching frequency of the input to the charge pump circuit depending on the degree of load on the charge pump circuit;
A VCO (Voltage Co., Ltd.) uses the output of the feedback section as a voltage control signal and outputs a charge pump switching signal.
What is claimed is: 1. A charge pump circuit comprising:
(2)前記帰還部は、分圧回路と、誤差増幅器とを有し
、 分圧回路は、チャージポンプ回路出力を分圧するもので
あり、 誤差増幅器は、分圧回路出力と基準電圧とを比較し、V
COに対する電圧制御信号を出力するものであることを
特徴とする請求項第(1)項記載のチャージポンプ回路
(2) The feedback section includes a voltage dividing circuit and an error amplifier, the voltage dividing circuit divides the charge pump circuit output, and the error amplifier compares the voltage dividing circuit output with a reference voltage. S,V
2. The charge pump circuit according to claim 1, wherein the charge pump circuit outputs a voltage control signal for CO.
JP2287806A 1990-10-25 1990-10-25 Charge pump device Expired - Fee Related JP2614938B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2287806A JP2614938B2 (en) 1990-10-25 1990-10-25 Charge pump device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2287806A JP2614938B2 (en) 1990-10-25 1990-10-25 Charge pump device

Publications (2)

Publication Number Publication Date
JPH04162560A true JPH04162560A (en) 1992-06-08
JP2614938B2 JP2614938B2 (en) 1997-05-28

Family

ID=17721997

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2287806A Expired - Fee Related JP2614938B2 (en) 1990-10-25 1990-10-25 Charge pump device

Country Status (1)

Country Link
JP (1) JP2614938B2 (en)

Cited By (7)

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US5568083A (en) * 1993-07-02 1996-10-22 Hitachi, Ltd. Semiconductor integrated circuit device having an internally produced operation voltage matched to operation speed of circuit
JP2001257318A (en) * 2000-02-04 2001-09-21 Lucent Technol Inc Active inductor used in ic
US6459330B2 (en) 2000-01-25 2002-10-01 Seiko Epson Corporation DC-DC voltage boosting method and power supply circuit using the same
KR100426401B1 (en) * 2000-02-25 2004-04-08 엔이씨 일렉트로닉스 코포레이션 High voltage generating circuit improved in parasitic capacitance of voltage-dividing resistance
KR100603516B1 (en) * 1999-04-20 2006-07-20 페어차일드코리아반도체 주식회사 Switching regulator with charge pump circuit
CN107464579A (en) * 2017-08-22 2017-12-12 四川泓芯科技有限公司 Clock signal generating circuit and charge pump system
US10298120B2 (en) 2016-12-13 2019-05-21 Lapis Semiconductor Co., Ltd. Charge pump circuit and boosting circuit

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JP4311687B2 (en) * 2006-10-06 2009-08-12 日本テキサス・インスツルメンツ株式会社 Power supply circuit and battery device
JP5072731B2 (en) * 2008-06-23 2012-11-14 株式会社東芝 Constant voltage boost power supply
JP5554910B2 (en) * 2008-09-08 2014-07-23 ローム株式会社 Control circuit for charge pump circuit and power supply circuit using them

Citations (2)

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JPS60103659A (en) * 1983-10-27 1985-06-07 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Substrate voltage generating circuit in semiconductor substrate
JPS60128650A (en) * 1983-12-15 1985-07-09 Toshiba Corp Substrate bias generating circuit of semiconductor integrated circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60103659A (en) * 1983-10-27 1985-06-07 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Substrate voltage generating circuit in semiconductor substrate
JPS60128650A (en) * 1983-12-15 1985-07-09 Toshiba Corp Substrate bias generating circuit of semiconductor integrated circuit

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5568083A (en) * 1993-07-02 1996-10-22 Hitachi, Ltd. Semiconductor integrated circuit device having an internally produced operation voltage matched to operation speed of circuit
KR100603516B1 (en) * 1999-04-20 2006-07-20 페어차일드코리아반도체 주식회사 Switching regulator with charge pump circuit
US6459330B2 (en) 2000-01-25 2002-10-01 Seiko Epson Corporation DC-DC voltage boosting method and power supply circuit using the same
JP2001257318A (en) * 2000-02-04 2001-09-21 Lucent Technol Inc Active inductor used in ic
KR100426401B1 (en) * 2000-02-25 2004-04-08 엔이씨 일렉트로닉스 코포레이션 High voltage generating circuit improved in parasitic capacitance of voltage-dividing resistance
US10298120B2 (en) 2016-12-13 2019-05-21 Lapis Semiconductor Co., Ltd. Charge pump circuit and boosting circuit
CN107464579A (en) * 2017-08-22 2017-12-12 四川泓芯科技有限公司 Clock signal generating circuit and charge pump system
CN107464579B (en) * 2017-08-22 2023-06-02 珠海博雅科技股份有限公司 Clock signal generating circuit and charge pump system

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