JPH04145891A - Motor controller - Google Patents

Abstract

PURPOSE:To improve the degree of freedom and reliability in the setting of dead time by using a digital counter which can program the setting time of the dead time for forming the dead time. CONSTITUTION:While the timing for changing a signal 22 front a high level to a low level is specified by means of the time-out timing of a counter 1, it is not possible to change the set value NA1 of a counter 2 for forming dead time, since the timing specifies the turning-on time of a motor 39. Therefore, the dead time is formed by controlling the set value of a counter 3. Since the time at which a signal 20 is changed from a low level to a high level is the time-out timing of the counter 3, the dead time can be formed by delaying the time-out timing of the counter 3 by the time required for turning off a transistor QA1 front the time-out timing of the counter 1.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to a motor control device for, for example, a DC servo motor that drives a robot arm, and in particular, when a power circuit that supplies power to the motor employs a pulse width modulation method, the circuit This invention relates to improvements in forming dead time necessary for switching operations of power conversion elements used.

[Conventional technology]

Conventionally, in motor control, taking a DC servo motor as an example, an H-type bridge as shown in Figure 4 is constructed, and a power conversion element Q Al such as a power FET is connected with an appropriate pulse width.
and Q11□ or turn on Q B1 and Q
A PWM system is widely used, which controls the rotation and direction of the motor depending on whether A2 is turned on. FIG. 5A shows the waveform of the drive signal of the transistor when the motor rotates in the forward direction, and FIG. 5B shows the waveform of the drive signal when the motor rotates in the reverse direction. In both forward and reverse rotation, as shown in the figure, current is applied to the motor 39 during which of the overlapping on-times of Q A1 and Q, or during the overlapping on-times of Q A2 and QB. The flow causes the motor to rotate forward or reverse. In such a pulse width modulation method, the period of the signal is constant, and by changing the duty ratio within the period, the motor 3
Controls the generated torque of 9. In FIGS. 5A and 5B, the necessity of dead time generation is determined when QAl is off (on) and QA2 is on (off).
or when QB+ is off (on) Q8□
At the critical timing when is turned on (off), Q Al and QA (or Q Bl and Q ,
) turn on at the same time, resulting in a short circuit. That is, in actual operation, power conversion element QA1.
QA2 (or Q6..Q[1,) has a turn-on time T. There is a delay time N, turn-on time T OFF. And Mt.
To, ToNkuT. F. It is. Therefore, the actual on/off timing differs from that in Figure 5. For example, when Q Al changes from on to on and Q A2 changes from on to off, Q
There are cases where the off of A2 is delayed and QAI changes from off to on while Q A2 remains on. In other words, there is a time when QA, and QA□ are on at the same time, resulting in a short-circuit condition, and the transistor QA
This will lead to permanent destruction of l l Q A 2. Therefore, in -M terms, when the above two transistors turn on/off (or turn off/on) each other, both transistors It is necessary to forcibly set the off time (dead time). Conventionally, this dead time T.
, and diodes 33 and 34.

[Problems to be solved by the invention]

However, when dead timing occurs in such conventional analog circuits,
is different. Therefore, it is necessary to change the dead time to an appropriate value depending on the element, whereas in the conventional method, it is necessary to change the circuit constant, which has the disadvantage of being time-consuming. Also, ■: In analog parts, actually,
In addition to variations in circuit constants, constant changes occur due to aging and temperature changes, so it may not be possible to obtain the dead time as designed. The present invention has been made from this point of view, and its purpose is to propose a motor control device with improved flexibility and reliability in setting dead time.

[Means and operations for solving the problem] A motor control device for achieving the above problem programs a set time to form a dead time in switching of a power conversion element of a power circuit that supplies power to a motor. A special feature that uses a digital counter that can

[One Embodiment] A preferred embodiment to which the present invention is applied will be described below. FIG. 1 is a circuit diagram of the motor control device of this embodiment. In the figure, the same number as the conventional device shown in FIG. 4 is the same as that of the conventional device. The DC motor 39 has a power FET QA and Q B 2
Its rotation and direction are controlled by turning on Q u + and QA□. These elements constitute an H-bridge. In Figure 1,
1 to 5 are counters whose initial preset values can be freely changed from an external CPU (not shown) via a bus. That is, these counters are set to the initial value N set from the pass line while the GATE signal is high, and then counted by the common clock signal CLK. Then, a high level signal is output until the initial value N set above is satisfied. The output of counter 1 is connected to Q At via gate 10, and the output of counter 4 is connected to gate 1.
3 to QB1, respectively. Further, the output of the counter 3 is inputted to QA2 via the inverter 12, and the output of the counter 5 is inputted to Q8□ via the inverter 14. On the other hand, the output of counter 2 that generates dead time is inputted to one input of each of gates 10 and 13 via inverter 11. In FIG. 1, Q Al is the output signal 2 of gate 10
2. The input of gate 10 is counter 1
This is the inverted version of the output of counter 2. That is, Q
A+ is not turned on while counter 2 is outputting high even if counter 1 is outputting high. on the other hand,
Q A 2 is turned on when the output signal 20 of the inverter 12 is high. Further, QB2 is turned on only while the output of the counter 5 is low and the output of the inverter 14 is high. The above is an outline of the operation of the transistors QAl and QIl□, which are turned on when the motor 39 rotates forward. When reversing the motor 39, QA□+Qa+ is turned on. Q B+ is driven by the output signal 23 of gate 13. The input of gate 13 is the inverted output of counter 4 and counter 2. That is, Q Il
l is output from counter 2 even if counter 4 outputs high.
It is not turned on while outputting high. Also, QA
2 is turned on only while the output of counter 3 is low. Generally, the time T for each counter to output high. is expressed by the following formula. TC2NXTcLx +++++++++ (4
) However, T CLM is one cycle of clock signal CLK (T
GATE) is the period in which the signal GATE is "°1'°," and ToLX (T6.TE is assumed.) Therefore, the count values set in the five counters (1, 2, 3° 4.5) are Assuming that N A l . In the figure, the time T.N during which current flows through the motor 39
(Count value N.N) is NoN=NA1-NB□
...... It is expressed as (2). Also, the duty ratio of the time when the current flows through the motor 239 is:
Count value N set in counter 1, (3, 4) 5
A+, (NA3°NA4) Depends only on NA6. In other words, in order to control the torque generated in the motor 39, it is necessary to control only NA1 and NB2. Therefore, the problem is how to determine the count value NA2 to be set in the counter 3 in order to prevent the transistors Q Al and Q A2 from being short-circuited. In FIG. 6, when the value NA□ is set in the counter 3, the signal 20 controlling the transistor QA2 becomes high while the counter 3 outputs low. When the signal 20 changes from high to low, the signal 22 that turns on the transistor QAl is controlled by the counter 2 for a time TD2 (=
Set value N. It changes from low to high with a delay during 2). Therefore, when the GATE signal becomes high and a value is set in the counter (timing T in FIG. 2), there is no problem of short circuit between transistors Q A l and QA2. In other words, the value N to be set in counter 2
. 2 may be any value that corresponds to the time required for transistor QA2 to turn off. Furthermore, since it takes time to turn on transistor QA1, theoretically, "fo2
is' T, , -T. Set what corresponds to TI. On the other hand, when signal 22 changes from high to low,
Consider formation of dead time to prevent short circuit when 0 changes from low to high (timing T2 in FIG. 2). Although the timing at which the signal 22 changes from high to low is defined by the timeout timing of the counter l, this timing is the on-time T of the motor 39. Since the set value N Al of the counter 2 cannot be changed for the purpose of dead time formation. Therefore, a dead time is created by controlling the set value NA2 set in the counter 3 by 1. As is clear from FIG. 6, when the signal 20 changes from low to high, it is time for the counter 3 to time out. Further than the time TcA+ (= set value NA+) required for timeout, the time T required for transistor QAl to turn off, , (
= set value N0. ). That is, NA□=N A l +N D I . By doing this, the timing at which the transistor QA2 turns on is T longer than the timing at which the transistor QAl turns off. There will be a delay of 1. Note that, as in the case of Te3, Tl111 may be set to correspond to 'T OFF ToN'. In general, since the characteristics of transistors used in circuits are similar, N o1 Therefore, according to the above fact #11, the dead time T
DI and T. 2, the numerical value can be arbitrarily changed by the set value of the counter. Furthermore, since a counter is used, the dead time can be maintained at the designed value without changing over time. The present invention can be modified in various ways without departing from the spirit thereof. FIG. 3 is a circuit diagram of a control circuit when the present invention is applied to a brushless morph. In contrast to the DC servo motor described above, the number of drive phases is increased by one, resulting in a three-phase structure. The dead time creation method is the same as in the above embodiment. [Effects of the Invention] As explained above, according to the motor control device of the present invention,
The degree of freedom and reliability in setting the dead time is improved.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram explaining a preferred embodiment of the present invention, FIG. 2 is a timing chart explaining the operation of the embodiment in FIG. 1, FIG. 3 is a circuit diagram explaining a modified example, and FIG. The circuit diagrams of the conventional example, FIGS. 5A and 5B, are timing charts explaining why dead time formation is necessary. In the figure, 1.2, 3, 4.5... counter, 6, 7, 8°9.
...Power FET, 10, 11, 12, 13.14...
・Gate, 31.32...Resistance, 35.36...Capacitor, 33.34...Diode, 39...D
It is a C motor. Procedural Amendment 11 dated November 29, 1990 to the Commissioner of the Japan Patent Office ■, Indication of Case Patent Application No. 2-263793 2, Title of Invention Motor Control Device Canon Co., Ltd. 4, Agent Address: 105 Toranomon, Minato-ku, Tokyo 2-5-215, Detailed description of the invention column C of the specification to be amended Contents of amendment (1) "On" in the second line of page 5 of the specification is corrected to "off". (2) "Figure 6" on page 9, line 16 of the specification is corrected to "Figure 2." (3) “Figure 6” on page 10, line 12 of the specification
Corrected to ``Figure''. (4) “Figure 6” on page 11, line 19 of the specification
Corrected to ``Figure''.

Claims (2)

[Claims] (1) A motor control device characterized in that, in switching a power conversion element of a power circuit that supplies electric power to the motor, a digital counter that can program the dead time is used to create the dead time. (2) The power circuit includes two power elements for forward rotation (
Q_A_1, Q_B_2) and two power elements for reversal (Q_A_2, Q_B_1) are formed into an H-shape.
A counter (CTR_A_1) that controls the on-time of Q_A_2 and a counter (CTR_A_1) that controls the on-time of Q_A_2.
_A_2), a counter (CTR_B_1) that controls the on-time of Q_B_1, a counter (CTR_B_2) that controls the on-time of Q_B_2, and a counter (CTR_D) that forms a dead time. is driven by the AND of the high output of the counter CTR_D and the low output of the counter CTR_D,
Element Q_B_1 is driven by the AND of the high output of counter CTR_B_1 and the low output of counter CTR_D,
The element Q_A_2 is driven by the low output of the counter CTR_A_2, the element Q_B_2 is driven by the low output of the counter CTR_B_2, and a dead time suitable for the element used is inputted to the counter CTR_D as an initial value. The motor control device according to item 1.