JPH04122126A - Frequency conversion circuit - Google Patents
Frequency conversion circuitInfo
- Publication number
- JPH04122126A JPH04122126A JP2243160A JP24316090A JPH04122126A JP H04122126 A JPH04122126 A JP H04122126A JP 2243160 A JP2243160 A JP 2243160A JP 24316090 A JP24316090 A JP 24316090A JP H04122126 A JPH04122126 A JP H04122126A
- Authority
- JP
- Japan
- Prior art keywords
- oscillator
- power supply
- output signal
- frequency
- frequency divider
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 title claims description 7
- 230000010355 oscillation Effects 0.000 claims description 7
- 230000001052 transient effect Effects 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 2
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は周波数変換回路に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a frequency conversion circuit.
従来の周波数変換回路は、第3図に示すように、発振器
1と、その出力信号を分周する分周器2と、電圧制御発
振器4の出力信号を分周器2で分周した信号と分周器1
の分周信号との位相差を検出しこの位相差をゼロに近付
けるように電圧制御発振器4の発振周波数を制御する位
相比較器3とを有し、電源6から各部へ同時に電源電圧
を供給している。As shown in FIG. 3, the conventional frequency conversion circuit includes an oscillator 1, a frequency divider 2 that divides the output signal of the oscillator, and a signal obtained by dividing the output signal of the voltage controlled oscillator 4 by the frequency divider 2. Frequency divider 1
It has a phase comparator 3 that detects a phase difference with the frequency-divided signal of ing.
この従来の周波数変換回路では、発振器1と電圧制御発
振器4とに同時に電源電圧がかかるため、電源投入して
から安定するまでの過渡状態で電圧制御発振器4から同
期はずれの信号が出力されるという問題点がある。In this conventional frequency conversion circuit, since the power supply voltage is applied to the oscillator 1 and the voltage-controlled oscillator 4 at the same time, an out-of-synchronization signal is output from the voltage-controlled oscillator 4 in a transient state from when the power is turned on until it stabilizes. There is a problem.
本発明の周波数変換回路は、発振器と該発振器の出力信
号を分周する第1の分周器とをもつ発振回路と、電圧制
御発振器と該電圧制御発振器の出力信号を分周する第2
の分周器と前記第1および第2の分周器の両分周信号の
位相差に応答して前記電圧制御発振器の発振周波数を制
御する電圧信号を発生する位相比較器とをもつ位相同期
ループと、前記発振器の出力信号が予め設定したレベル
に達したときに切替制御信号を発生するレベル検出器と
、前記発振回路へ電源供給接続されており且つ前記位相
同期ループへ供給するための電源電圧を発する電源と、
該電源から前記位相同期ループへの電源供給線の途中に
介設されており前記切替え制御信号に応答して該電源供
給線の接続をオン状態に切替えるスイッチとを備えてい
る。The frequency conversion circuit of the present invention includes an oscillation circuit having an oscillator and a first frequency divider that divides the output signal of the oscillator, a voltage controlled oscillator, and a second frequency divider that divides the output signal of the voltage controlled oscillator.
and a phase comparator that generates a voltage signal for controlling the oscillation frequency of the voltage controlled oscillator in response to a phase difference between the divided signals of the first and second frequency dividers. a level detector that generates a switching control signal when the output signal of the oscillator reaches a preset level; and a power supply connected to the oscillation circuit and for supplying the phase-locked loop. A power source that emits voltage,
A switch is provided in the middle of a power supply line from the power source to the phase locked loop, and switches the connection of the power supply line to an on state in response to the switching control signal.
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例の回路図であり、第2図(a
)〜(c)は本実施例の動作を示す信号波形図である。FIG. 1 is a circuit diagram of one embodiment of the present invention, and FIG.
) to (c) are signal waveform diagrams showing the operation of this embodiment.
電源6からの電源電圧が発振器1、分周器2に供給され
、発振器1の出力信号は分周器2、レベル検出器7に入
力される。レベル検出器7は、発振器1の出力信号があ
る一定しベルP1に達したときに出力信号を出力し、電
源6と電圧制御発振器4、分周器5とをつなぐスイッチ
8の接続をオン状態に切替える。これに応じて電源電圧
Voが分周器5、電圧制御発振器4に供給され、電圧制
御発振器4からの出力信号を分周器5で分周し、分周器
2からの出力信号とともに位相比較器3に入力して、両
分周信号の位相差に応じて電圧制御発振器4の発振周波
数を制御するよう、位相同期ループの動作が開始する。A power supply voltage from a power supply 6 is supplied to an oscillator 1 and a frequency divider 2, and an output signal of the oscillator 1 is input to a frequency divider 2 and a level detector 7. The level detector 7 outputs an output signal when the output signal of the oscillator 1 reaches a certain level P1, and turns on the connection of the switch 8 that connects the power supply 6, the voltage-controlled oscillator 4, and the frequency divider 5. Switch to Accordingly, the power supply voltage Vo is supplied to the frequency divider 5 and the voltage controlled oscillator 4, and the frequency of the output signal from the voltage controlled oscillator 4 is divided by the frequency divider 5, and the phase is compared with the output signal from the frequency divider 2. The phase-locked loop starts operating to control the oscillation frequency of the voltage-controlled oscillator 4 according to the phase difference between the two frequency-divided signals.
従って本実施例では発振器1の出力信号が一定のレベル
になり安定化したときに、位相同期ループへの電源電圧
供給が開始され、電源投入時の過渡状態時に同期はずれ
の信号が出力されるのを防止できる。Therefore, in this embodiment, when the output signal of the oscillator 1 reaches a certain level and stabilizes, the power supply voltage supply to the phase-locked loop is started, and an out-of-synchronization signal is output during the transient state when the power is turned on. can be prevented.
以上説明したように本発明は、発振器の出力信号が一定
レベルに達したときに位相同期ループの各部への電源電
圧供給を開始することにより、電源投入時における同期
はずれ出力が無くなるという効果がある。As explained above, the present invention has the effect of eliminating out-of-synchronization output when the power is turned on by starting supplying power supply voltage to each part of the phase-locked loop when the output signal of the oscillator reaches a certain level. .
第1図は本発明の一実施例の回路図、第2図(a)〜(
c)は本発明の実施例での信号波形図、第3図は従来の
周波数変換回路の回路図である。
1・・・発振器、2,5・・・分周器、3・・・位相比
較器、4・・・電圧制御発振器、6・・・電源、7・・
・レベル検出器、8・・・スイッチ。FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2(a) to (
c) is a signal waveform diagram in an embodiment of the present invention, and FIG. 3 is a circuit diagram of a conventional frequency conversion circuit. 1... Oscillator, 2, 5... Frequency divider, 3... Phase comparator, 4... Voltage controlled oscillator, 6... Power supply, 7...
・Level detector, 8...switch.
Claims (1)
をもつ発振回路と、電圧制御発振器と該電圧制御発振器
の出力信号を分周する第2の分周器と前記第1および第
2の分周器の両分周信号の位相差に応答して前記電圧制
御発振器の発振周波数を制御する電圧信号を発生する位
相比較器とをもつ位相同期ループと、前記発振器の出力
信号が予め設定したレベルに達したときに切替制御信号
を発生するレベル検出器と、前記発振回路へ電源供給接
続されており且つ前記位相同期ループへ供給するための
電源電圧を発する電源と、該電源から前記位相同期ルー
プへの電源供給線の途中に介設されており前記切替え制
御信号に応答して該電源供給線の接続をオン状態に切替
えるスイッチとを備えていることを特徴とする周波数変
換回路。an oscillation circuit having an oscillator and a first frequency divider that frequency-divides an output signal of the oscillator; a voltage-controlled oscillator; a second frequency divider that frequency-divides the output signal of the voltage-controlled oscillator; a phase-locked loop having a phase comparator for generating a voltage signal for controlling the oscillation frequency of the voltage-controlled oscillator in response to a phase difference between both frequency-divided signals of a second frequency divider; a level detector that generates a switching control signal when a preset level is reached; a power supply that is connected to the oscillation circuit and generates a power supply voltage to be supplied to the phase-locked loop; A frequency conversion circuit comprising: a switch that is interposed in the middle of a power supply line to the phase-locked loop and switches the connection of the power supply line to an on state in response to the switching control signal. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2243160A JPH04122126A (en) | 1990-09-13 | 1990-09-13 | Frequency conversion circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2243160A JPH04122126A (en) | 1990-09-13 | 1990-09-13 | Frequency conversion circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04122126A true JPH04122126A (en) | 1992-04-22 |
Family
ID=17099701
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2243160A Pending JPH04122126A (en) | 1990-09-13 | 1990-09-13 | Frequency conversion circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04122126A (en) |
-
1990
- 1990-09-13 JP JP2243160A patent/JPH04122126A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100299600B1 (en) | Phase-locked loop frequency synthesizer and fast frequency lock method using it | |
JPH0993100A (en) | Phase comparator | |
KR960028380A (en) | Clock Delay Compensation and Duty Control System for Phase-locked Loop Circuits | |
EP0552753B1 (en) | PLL frequency synthesizer having power saving function | |
GB2258960A (en) | Power saving frequency synthesiser with fast pull-in feature | |
JPH04122126A (en) | Frequency conversion circuit | |
JP2919321B2 (en) | PLL synthesizer | |
JPH06276089A (en) | Pll circuit | |
JPH0434589Y2 (en) | ||
JPS5821506B2 (en) | Gaibusingoudou Kigatahenkansouchi | |
JPS5846586Y2 (en) | Circuit with phase locked loop | |
JP3160904B2 (en) | Phase-locked oscillation circuit device | |
JP2927801B2 (en) | PLL circuit | |
JPH0361371B2 (en) | ||
JPH02174421A (en) | Pll circuit | |
JPH0786931A (en) | Frequency synthesizer | |
JP2745060B2 (en) | PLL frequency synthesizer | |
JP2002314411A (en) | Pll frequency synthesizer | |
JPH06276096A (en) | High-speed pull-in PLL type frequency synthesizer | |
JPH10224217A (en) | Frequency synthesizer | |
JPH09261046A (en) | PLL frequency synthesizer | |
JPH0449718A (en) | Frequency conversion circuit | |
JPH042217A (en) | Pll frequency synthesizer | |
JPH09153797A (en) | Pll circuit | |
JPH07297712A (en) | Phase locked loop synthesizer |