JPH0410631A - Semiconductor chip sucking jig - Google Patents

Abstract

PURPOSE:To suppress warpage due to heat at the time of die bonding and curtail the die bonding time by providing a plurality of absorbing portions for semiconductor chip. CONSTITUTION:A chip absorbing part 2 is formed at the end portion of a collect 1 in conformity with the shape of a semiconductor chip A4 and a semiconductor chip B5, and moreover with the position of die bonding 7 of a semiconductor chip A of a die pad 6 of a package and the position of die bonding 8 of a semiconductor chip B. Since a plurality of sucking parts 2 are provided for semiconductor chip, a plurality of semiconductor chips are treated simultaneously, warpage by heat at the time of die bonding is suppressed, the die bonding time can be curtailed. Moreover, variation in distance between semiconductor chips can be suppressed and distance between chips can be curtailed by forming a plurality of sucking portions 2 for semiconductor chips in conformity with the arrangement and shape of desired semiconductor chips.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a suction jig (hereinafter referred to as a collet) for handling microwave semiconductor chips, and particularly provides a structure of a chip suction part.

[Conventional technology]

FIG. 4 shows a perspective view of a conventional collet. This structure consists of a suction part (2) formed at the tip of the collet (1) according to the shape of the chip to be suctioned, and a vacuum hole (3) for vacuum suction of the semiconductor element inside this suction part (2).
).

In this collet, when a semiconductor chip is mounted on a carrier, package, etc., the semiconductor chip is vacuum-suctioned by a suction part (2) through a vacuum hole (3), and one chip is transported and various processes are carried out. However, as shown in the cross-sectional view of Figure 5(a), there is a structure in which a thick gold-plated layer (10) serving as a ground electrode and a heat sink layer is formed on the back surface of an ultra-thin GaAs substrate (9) with a thickness of about 30 μm. When die-bonding a semiconductor chip to the die pad portion (6) of the package using Au8n solder, etc., the difference in thermal expansion coefficient between the Ga A8 substrate (9) and the gold plating layer (10) usually causes
Since the heating during die bonding causes a warpage of (12)K, the chip is cooled by pressing the GaAs substrate (9) with the collet (1) as shown in FIG. It was suppressed.

[Problem to be solved by the invention]

Conventional collets were constructed as described above, so when it is necessary to bond multiple semiconductor chips of the same type to a package, etc., the semiconductor chips that are soldered first are used when the semiconductor chips are die-bonded later. There were many problems, such as warping, long working time as each chip was handled one at a time, and variations in the distance between semiconductor chips.

This invention was made to solve the above-mentioned problems, and by handling multiple semiconductor elements simultaneously, it shortens die bonding time, suppresses variations in the distance between semiconductor chips, and reduces the distance between semiconductor chips. The object of the present invention is to obtain a semiconductor chip collet that suppresses warping due to heat during shortening and die pounding.

[Means to solve the problem]

The semiconductor chip collet according to the present invention has a plurality of suction parts for the semiconductor chips, and the plurality of suction parts for the semiconductor chips are formed in accordance with the desired arrangement shape of the semiconductor chips.

[Effect]

The semiconductor chip collet of the present invention has a plurality of suction parts for semiconductor chips, thereby handling multiple semiconductor chips at the same time and suppressing warping due to heat during die-pounding, shortening the die-pounding time, and By forming a plurality of adsorption portions in accordance with the desired arrangement shape of the semiconductor chips, it is possible to suppress variations in the distance between semiconductor chips and shorten the distance between the chips.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure shows a cross-sectional view of a collet which is an embodiment of the present invention.

In the figure, (1) is Colette, (2) is Cholera) (
1) Semiconductor chip A (4) and semiconductor chip B are placed at the tip of
This is a chip adsorption section made to match the shape of (5) and the arrangement of the die pad position (7) of the semiconductor chip A and the die pound position (8) of the semiconductor chip B of the die pad section (6) of the package. (3) is a vacuum hole for vacuum suctioning the semiconductor chip A-B.

With this structure, two semiconductor chips A and B can be handled simultaneously, and the GaA3 substrate (9
) This collet (1) can also be used to solder a semiconductor chip with a gold plating layer (10) of about 60 μm on the back side.
By cooling the semiconductor chip while pressing it even after die-pounding, it is possible to suppress warping of the semiconductor chip. Also, in cases other than semiconductor chips with the above structure,
For example, the vacuum hole (3) shown in FIG.
13), it is possible to handle four semiconductor chips at the same time, shorten the die bonding time, suppress variations in the distance between semiconductor chips, and shorten the distance between semiconductor chips.

〔Effect of the invention〕

As described above, according to the present invention, since the number of suction parts for the semiconductor chip is plural, it is possible to suppress warping due to heat during die bonding, shorten the die bonding time, and By forming the suction portion in accordance with the desired arrangement shape of the semiconductor chips, it is possible to suppress variations in the distance between the semiconductor chips, and there is an effect that the distance between the semiconductor chips can be shortened.

[Brief explanation of drawings]

FIG. 1 is an explanatory cross-sectional view of a semiconductor chip collet according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view of a semiconductor chip with a gold plating layer applied to the back surface after being die-pounded using the collet shown in FIG. , FIG. 3 is a perspective view of a collet according to another embodiment of the present invention, FIG. 4 is a perspective view of a conventional collet, and FIGS. It is a sectional view showing a processing state. In the figure, (1) is cholera), (2) is the chip suction part, (3) is the d vacuum hole, (4) is the semiconductor chip A, (5) is the semiconductor chip B, (6) is the die pad part of the package, (7) is the die pound position of semiconductor chip A, (8) is the die pound position of semiconductor chip B, (9
) Ga As substrate, (10) gold plated layer, (1
1) indicates the solder layer, and (13) indicates the distance between semiconductor chips. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] A semiconductor chip suction jig for suctioning and handling a semiconductor chip, characterized in that the suction jig has a plurality of suction parts for semiconductor chips.