JPH039527A - Lateral type bipolar transistor - Google Patents

Abstract

PURPOSE:To obtain a lateral type bipolar transistor whose Early voltage is high by forming an impurity diffusion region having the same conductivity type as a collector region and the concentration lower than the collector region, at the collector end-portion on the side facing an emitter region. CONSTITUTION:At a collector end-portion on the side facing an emitter region 7, an impurity diffusion region 6 having the same conductivity type as the collector region 5 and the concentration lower than the collector region 5 is formed. That is, since the collector concentration of a junction part is low on account of Early effect of a lateral type PNP transistor, the difference between the base concentration and the above collector concentration becomes small. As a result, the depletion layer is prevented from stretching toward the base side, and Early voltage becomes high. Thereby a lateral type bipolar transistor whose Early voltage is high can be obtained.

Description

Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a lateral bipolar transistor used in a bipolar semiconductor integrated circuit device, a BicMO8 type semiconductor integrated circuit device in which a bipolar transistor and an 0MO8 are mixed, and the like. .

(Prior art) Bipolar transistors can be classified from the viewpoint of their structure: vertical transistors, which are formed in the depth direction of the substrate and allow current to flow in the depth direction, and vertical transistors, which are formed in the in-plane direction on the surface of the substrate and which allow current to flow in the depth direction. There are two types of transistors: lateral transistors in which the current flows in the in-plane direction. The characteristics of vertical transistors are mostly determined by the type of impurities and the physical constants of the substrate, whereas the characteristics of lateral transistors are greatly influenced by photolithography conditions and the state of the interface between the substrate and silicon oxide film. tend to become unstable. For example, regarding the early voltage, which is a problem in accuracy in analog circuits, the horizontal 13 NP transistor is about 1/4 to 115 that of the vertical NP transistor.

(Problem to be solved by the invention) Bipolar circuits aimed at highly accurate analog characteristics are NP.
It is constructed using an N-transistor PNP transistor. Although a bipolar circuit can be constructed entirely of vertical transistors, it is common to use vertical NPN transistors and horizontal PNP transistors for the purpose of simplifying the manufacturing process and reducing costs. however,
Horizontal PNP transistors have low early voltage, etc.

The characteristics of the constructed circuit are often limited by the characteristics of the lateral PNP transistor.

An object of the present invention is to provide a lateral bipolar transistor with a high early voltage.

(Means for Solving the Problems) In the lateral bipolar transistor of the present invention, an impurity diffusion region having the same conductivity type as the collector region and having a lower concentration than the collector region is formed at the end of the collector on the side opposite to the emitter region. .

(Function) The Early effect of the lateral PNP transistor will be explained. The same applies to lateral NPN transistors.

The Early effect of bipolar transistors is broadly defined as the base width modulation effect (Base Width Modulation effect).
When a voltage Vcb is applied between the collector base, @wb of the depletion layer extending toward the base side is It is given by solving the first-order Poisson's equation at the base joint. In the case of a one-step junction with uniform impurity distribution, Wb= (2t (Vbi-Vcb)Nc/e-Nb(
It can be expressed as Nb+Nc))1;/2. Here, ε is the dielectric constant of silicon, Vbi is the diffusion potential difference, e is the electron ri+ potential charge, Nb is the base impurity concentration, and Nc is the collector impurity concentration.

Similarly, l11gWc of the depletion layer extending to the collector side is Wc = (2t (Vbi-Vcb)Nb/e-Nc
(Nb+Nc))'/2.

In the conventional horizontal P N P I-transistor, Nb<N
c, the extension of the depletion layer toward the base side is much larger than that toward the collector side, resulting in a low early voltage. On the other hand, in the lateral PNP transistor (the same applies to the lateral NPN transistor) according to the present invention,
Since the collector concentration at the junction is low, the difference with the base concentration becomes small, and the extension of the depletion layer toward the base is suppressed, which in turn lowers the constant of dWb/dVcb due to Nb and Nc, and the Early voltage increases. It gets expensive.

(Embodiment) FIGS. 1 and 2 show an embodiment in which the present invention is applied to a lateral PNP transistor.

An N-type epitaxial layer 3 is formed on the surface of a P-type silicon substrate 1, and a lateral PNP transistor is formed in an epitaxial layer WJ3 surrounded by an element isolation region 4 formed by diffusion of P-type impurities. Here, the specific resistance of the substrate 1 is 4 to 20
It is about Ω・cm, and the resistivity of the epitaxial layer 3 is also 4
~20Ω·am. The thickness of the epitaxial layer 3 is about 10 μm, and an N-type impurity physically doped WJ2 is formed at the boundary between the epitaxial layer 3 and the substrate 1.

The impurity concentration of the buried WJ2 is I x 10"/c'
larger than m3. The surface impurity concentration of the element isolation region 4 is I
It is approximately X 10"/cm'.

The evitabicular calendar 3 becomes a base region, and an emitter region 7 made of a P-type impurity diffusion layer is formed in the center part of its surface, and a collector region 5 made of a P-type impurity diffusion layer surrounds the emitter region 7 on the surface of the evitabicular layer 3.
is formed.

The impurity concentration of emitter region 7 and collector region 5 is I
The collector region 5 and the emitter region 7 face each other in the plane with the base region 3 in between, but at the end where the collector region 5 faces the emitter region 7, A P-type impurity diffusion region 6 connected to the collector region 5 is formed.

The impurity concentration in the region 6 is lower than the concentration in the collector region 5, for example, l x IO” to I x 10”/cm
It is about 3.

3a is an N-type impurity diffusion region that becomes an electrode of the base region 3.

In FIG. 1, illustrations of a silicon oxide film, wiring, etc. formed on the surface are omitted.

Next, a manufacturing method for manufacturing the horizontal PNP transistor of this embodiment together with the vertical NPN transistor will be explained with reference to FIG.

(Δ) After forming an N-type high concentration impurity layer 2 on a P-type silicon substrate 1, an N-type epitaxial layer 3.10 (the epitaxial layers 3 and 10 are the same) is formed by epitaxial growth. Thereafter, a P-type cavity concentration impurity /S4 for element isolation is diffused until it reaches the substrate 1 and driven in. Other methods such as an oxide film isolation method can also be used for element isolation.

(B) The emitter region 7 and collector region 5 of the horizontal type 1) N P transistor and the base region 11 of the vertical type NPN transistor are simultaneously formed by a P-type impurity introduction step.

Next, a P-type impurity region 6 having an impurity concentration lower than that in which the collector region 5 and the like are formed is formed at the emitter side end of the collector region 5.

(C) An N-type impurity region is formed as an emitter region 12 inside the base region 11 of the M-type NPN transistor.

The impurity concentration of the emitter region 12 is IX 10”/c
It is about m3. In a vertical NPN transistor, the epitaxial 1510 becomes the collector region.

Also in FIG. 3, illustrations of the silicon oxide film on the surface and the electrodes and passivation film formed thereafter are omitted.

(Effects of the Invention) In the lateral bipolar transistor of the present invention, an impurity diffusion region of the same conductivity type and with a lower yield than the collector region is formed at the emitter side end of the collector region, so that a lateral bipolar transistor with a high early voltage can be obtained. I can do it.

As a result, highly accurate analog characteristics can be achieved even in analog circuits using lateral bipolar transistors.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing one embodiment, FIG. 2 is a plan view of the same embodiment, and FIG. 3 is a process sectional view showing a manufacturing method of one embodiment. 3...Base region, 5...Collector region, 6...Low concentration impurity diffusion region of collector, 7
...Emitter area. -PNP No. 32

Claims (1)

[Claims] (1) In a lateral bipolar transistor in which a collector region and an emitter region face each other in the plane with the base region in between, the collector end on the side opposite to the emitter region is doped with a concentration of the same conductivity type as the collector region and lower than that of the collector region. A lateral bipolar transistor characterized by having an impurity diffusion region formed therein.