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JPH0369248U - - Google Patents

Info

Publication number
JPH0369248U
JPH0369248U JP1989131231U JP13123189U JPH0369248U JP H0369248 U JPH0369248 U JP H0369248U JP 1989131231 U JP1989131231 U JP 1989131231U JP 13123189 U JP13123189 U JP 13123189U JP H0369248 U JPH0369248 U JP H0369248U
Authority
JP
Japan
Prior art keywords
resin
sealed
lead frame
width
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989131231U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989131231U priority Critical patent/JPH0369248U/ja
Publication of JPH0369248U publication Critical patent/JPH0369248U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】
第１図は本考案の実施例を示す図、第２図は本
考案の他の実施例を示す側面図、第３図および第
４図は従来例の問題点を示す断面図、である。 図において、１……素子載置部、２……半導体
チツプ、３……リードフレーム、４……ボンデイ
グワイヤ、５……封止樹脂、である。

Claims (1)

  1. 【実用新案登録請求の範囲】 半導体チツプとリードフレームの断面を含む上
    半面のみが樹脂封止されてなる樹脂封止型半導体
    装置において、 封止樹脂と接している該リードフレームの上面
    の幅が下面の幅より広いことを特徴とする樹脂封
    止型半導体装置。
JP1989131231U 1989-11-10 1989-11-10 Pending JPH0369248U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989131231U JPH0369248U (ja) 1989-11-10 1989-11-10

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989131231U JPH0369248U (ja) 1989-11-10 1989-11-10

Publications (1)

Publication Number Publication Date
JPH0369248U true JPH0369248U (ja) 1991-07-09

Family

ID=31678753

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989131231U Pending JPH0369248U (ja) 1989-11-10 1989-11-10

Country Status (1)

Country Link
JP (1) JPH0369248U (ja)

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001110945A (ja) * 1999-09-07 2001-04-20 Motorola Inc 半導体素子および半導体素子の製造・パッケージング方法
JP2002118221A (ja) * 2000-10-06 2002-04-19 Rohm Co Ltd 半導体装置およびそれに用いるリードフレーム
JP2004247612A (ja) * 2003-02-14 2004-09-02 Sanyo Electric Co Ltd 半導体装置およびその製造方法
JP2006108306A (ja) * 2004-10-04 2006-04-20 Yamaha Corp リードフレームおよびそれを用いた半導体パッケージ
JP2006210941A (ja) * 2006-03-27 2006-08-10 Renesas Technology Corp 半導体装置
JP2007243220A (ja) * 2007-05-14 2007-09-20 Renesas Technology Corp 樹脂封止型半導体パッケージ
JP2010118712A (ja) * 2010-03-04 2010-05-27 Renesas Technology Corp Ｑｆｎパッケージの製造方法
JP2011222598A (ja) * 2010-04-05 2011-11-04 Shindengen Electric Mfg Co Ltd 磁性体基板の製造方法、磁性体基板、及び、電子回路モジュール
US8691632B1 (en) 2002-11-08 2014-04-08 Amkor Technology, Inc. Wafer level package and fabrication method
JP2014179648A (ja) * 2000-12-28 2014-09-25 Renesas Electronics Corp 半導体装置
JP2015070161A (ja) * 2013-09-30 2015-04-13 ローム株式会社 リードフレーム、半導体装置および半導体装置の製造方法
JP2015103817A (ja) * 2013-11-26 2015-06-04 サムソン エレクトロ−メカニックス カンパニーリミテッド． 電子部品及び電子部品実装回路基板
US9159672B1 (en) 2010-08-02 2015-10-13 Amkor Technology, Inc. Through via connected backside embedded circuit features structure and method
US9324614B1 (en) 2010-04-06 2016-04-26 Amkor Technology, Inc. Through via nub reveal method and structure
US9431323B1 (en) 2011-11-29 2016-08-30 Amkor Technology, Inc. Conductive pad on protruding through electrode
US9496204B2 (en) 2000-12-28 2016-11-15 Renesas Electronics Corporation Semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6381965A (ja) * 1986-09-26 1988-04-12 Hitachi Ltd 電子装置
JPH01106456A (ja) * 1987-10-19 1989-04-24 Matsushita Electric Ind Co Ltd 半導体集積回路装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6381965A (ja) * 1986-09-26 1988-04-12 Hitachi Ltd 電子装置
JPH01106456A (ja) * 1987-10-19 1989-04-24 Matsushita Electric Ind Co Ltd 半導体集積回路装置

Cited By (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001110945A (ja) * 1999-09-07 2001-04-20 Motorola Inc 半導体素子および半導体素子の製造・パッケージング方法
US9472492B2 (en) 2000-10-06 2016-10-18 Rohm Co., Ltd. Semiconductor device with lead terminals having portions thereof extending obliquely
JP2002118221A (ja) * 2000-10-06 2002-04-19 Rohm Co Ltd 半導体装置およびそれに用いるリードフレーム
US9064855B2 (en) 2000-10-06 2015-06-23 Rohm Co., Ltd. Semiconductor device with lead terminals having portions thereof extending obliquely
US10388595B2 (en) 2000-10-06 2019-08-20 Rohm Co., Ltd. Semiconductor device with lead terminals having portions thereof extending obliquely
US8637976B2 (en) 2000-10-06 2014-01-28 Rohm Co., Ltd. Semiconductor device with lead terminals having portions thereof extending obliquely
US9812382B2 (en) 2000-10-06 2017-11-07 Rohm Co., Ltd. Semiconductor device with lead terminals having portions thereof extending obliquely
US8421209B2 (en) 2000-10-06 2013-04-16 Rohm Co., Ltd. Semiconductor device with lead terminals having portions thereof extending obliquely
JP4523138B2 (ja) * 2000-10-06 2010-08-11 ローム株式会社 半導体装置およびそれに用いるリードフレーム
US10886204B2 (en) 2000-10-06 2021-01-05 Rohm Co., Ltd. Semiconductor device with lead terminals having portions thereof extending obliquely
US8026591B2 (en) 2000-10-06 2011-09-27 Rohm Co., Ltd. Semiconductor device with lead terminals having portions thereof extending obliquely
JP2014179648A (ja) * 2000-12-28 2014-09-25 Renesas Electronics Corp 半導体装置
US9496204B2 (en) 2000-12-28 2016-11-15 Renesas Electronics Corporation Semiconductor device
US10115658B2 (en) 2000-12-28 2018-10-30 Renesas Electronics Corporation Semiconductor device
US10490486B2 (en) 2000-12-28 2019-11-26 Renesas Electronics Corporation Semiconductor device
US9406645B1 (en) 2002-11-08 2016-08-02 Amkor Technology, Inc. Wafer level package and fabrication method
US8691632B1 (en) 2002-11-08 2014-04-08 Amkor Technology, Inc. Wafer level package and fabrication method
JP2004247612A (ja) * 2003-02-14 2004-09-02 Sanyo Electric Co Ltd 半導体装置およびその製造方法
JP4522049B2 (ja) * 2003-02-14 2010-08-11 三洋電機株式会社 半導体装置
JP2006108306A (ja) * 2004-10-04 2006-04-20 Yamaha Corp リードフレームおよびそれを用いた半導体パッケージ
JP2006210941A (ja) * 2006-03-27 2006-08-10 Renesas Technology Corp 半導体装置
JP2007243220A (ja) * 2007-05-14 2007-09-20 Renesas Technology Corp 樹脂封止型半導体パッケージ
JP4489791B2 (ja) * 2007-05-14 2010-06-23 株式会社ルネサステクノロジ Ｑｆｎパッケージ
JP2010118712A (ja) * 2010-03-04 2010-05-27 Renesas Technology Corp Ｑｆｎパッケージの製造方法
JP2011222598A (ja) * 2010-04-05 2011-11-04 Shindengen Electric Mfg Co Ltd 磁性体基板の製造方法、磁性体基板、及び、電子回路モジュール
US9324614B1 (en) 2010-04-06 2016-04-26 Amkor Technology, Inc. Through via nub reveal method and structure
US9159672B1 (en) 2010-08-02 2015-10-13 Amkor Technology, Inc. Through via connected backside embedded circuit features structure and method
US9431323B1 (en) 2011-11-29 2016-08-30 Amkor Technology, Inc. Conductive pad on protruding through electrode
JP2015070161A (ja) * 2013-09-30 2015-04-13 ローム株式会社 リードフレーム、半導体装置および半導体装置の製造方法
US10062493B2 (en) 2013-11-26 2018-08-28 Samsung Electro-Mechanics Co., Ltd. Electronic component and circuit board having the same mounted thereon
JP2015103817A (ja) * 2013-11-26 2015-06-04 サムソン エレクトロ−メカニックス カンパニーリミテッド． 電子部品及び電子部品実装回路基板

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