JPH0358228B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image reading device, and more particularly to an image reading device having means for accumulating information on incident light.

The present invention is applied to an image reading unit of a facsimile machine or the like.

[Prior Art] FIG. 3 is a circuit diagram of a conventional image reading device.
However, here, the case of a photosensor array having nine photosensors will be taken as an example.

In the figure, three optical sensors E1 to E9 constitute one block, and three blocks constitute an optical sensor array. The same applies to the capacitors C1 to C9 and the switching transistors T1 to T9 corresponding to the optical sensors E1 to E9, respectively.

One electrode (common electrode) of each of the optical sensors E1 to E9 is connected to the power source 101, and the other electrode (individual electrode) is grounded via capacitors C1 to C9, respectively.

Further, individual electrodes having the same order within each block of photosensors E1 to E9 are connected to common lines 102 to 102 through switching transistors T1 to T9, respectively.
104.

In detail, the first switching transistors T1, T4, T7 of each block are connected to the common line 102.
Then, the second switching transistors T2, T5, T8 of each block are connected to the common line 103, and the third switching transistors T of each block are connected to the common line 103.
3, T6, and T9 are connected to the common line 104, respectively.

Common lines 102-104 are connected to amplifier 10 via switching transistors T10-T12, respectively.
5.

Furthermore, the gate electrodes of the switching transistors T1 to T9 are connected in common for each block, and are connected to the parallel output terminals of the shift register 106, respectively. Since high level signals are sequentially output from the parallel output terminals of the shift register 106 at predetermined timing, the switching transistors T1 to T
9 is turned on sequentially for each block.

In addition, switching transistors T10 to T1
Each gate electrode of the transistors T10 to T12 is connected to a parallel output terminal of the shift register 107, and a high level is sequentially output from the parallel output terminal at a predetermined timing, thereby sequentially turning on the switching transistors T10 to T12.

Furthermore, switching transistors T10 to T
The twelve commonly connected terminals are grounded via a discharging switching transistor T13, and the gate electrode of the switching transistor T13 is connected to the terminal 108.

The operation of a conventional image reading device having such a configuration will be briefly described.

When light enters the optical sensors E1 to E9, the power supply 101 connects the capacitors C1 to C9 depending on the intensity of the light.
Charge is accumulated in the

Subsequently, the shift registers 106 and 107 sequentially output a high level at respective timings, and it is now assumed that a high level is output from the first parallel output terminals of both registers.

Then, the switching transistor T10 connected to the switching transistors T1 to T3 of the first block and the common line 102 is turned on, and the charge accumulated in the capacitor C1 is transferred to the switching transistor T1, the common line 102, and Through the switching transistor T10,
It is input to the amplifier 105 and output as image information.

When the charge stored in the capacitor C1 is read out, a high level is applied to the terminal 108,
Switching transistor T13 is turned on. Thereby, the residual charge in the capacitor C1 is transferred to the switching transistor T1, the common line 10
2, completely discharged through the switching transistor T10 and the switching transistor T13.

Next, while keeping the first parallel output of shift register 106 at high level, shift register 1
07 to turn on the switching transistors T11 and T12 in turn. As a result, the above reading and discharging operations are performed on the capacitors C2 and C3, and the information stored therein is sequentially read out.

When the reading of the information of the first block is completed in this way, the shift register 106 is sequentially shifted, and the reading of the information of the second and third blocks is performed in the same manner as described above.

In this way, the information stored in the capacitors C1 to C9 is serially read out and output from the amplifier 105 as image information.

Since the conventional image reading device shown in FIG. 3 includes a capacitor for storing charge, it is possible to increase the output signal.

In addition, optical sensors E1 to E9, capacitors C1 to
C9 and switching transistors T1-T9
When these are formed on the same substrate using a thin film semiconductor, there are advantages such as being able to reduce the number of connection points with external circuits.

However, thin film transistors (TFTs) have a characteristic of high resistance in the on state. For this purpose, the capacitances of capacitors C1 to C9 and the corresponding switching transistors T1 to
The time constant determined by the resistance value of T9 increases, and the discharge time of capacitors C1 to C9 becomes longer due to the parasitic capacitance and resistance of common lines 102 to 104 and switching transistors T10 to T13. Therefore, such conventional image reading devices have a problem in that it takes time to read information.

Furthermore, the conventional image reading device has a capacitor C
For each of No. 1 to C9, a discharging operation is required after reading each time, so there is also a problem that sufficiently high speed operation cannot be performed.

[Object of the Invention] The present invention has been made in view of the above conventional problems, and its purpose is to provide an image reading device that can operate at high speed and has fewer connection points with external circuits. be.

[Summary of the Invention] In order to achieve the above object, the present invention includes a plurality of photoelectric conversion elements, and an electric charge that is electrically connected to each of the plurality of photoelectric conversion elements and that corresponds to each output signal of the photoelectric conversion element. a plurality of first accumulating means for accumulating a plurality of first accumulating means; a first switching means for forming a desired number of the first accumulating means into one block and simultaneously taking out the charges accumulated in the first accumulating means for each block; The first storage means is an image reading device in which each block in the same order is connected to the same common line through the first switch means, and the first storage means a first discharging switch means for discharging the residual charge of the first storage means for each block; and a first discharging switch means for storing the charge taken out by the first switch means. a plurality of second storage means connected to the common line for the purpose of discharging the residual charge of the second storage means for each block at the same time; The present invention is characterized by comprising: 2 switch means for discharging;

More specifically, the present invention transfers optical information stored in a first capacitor block by block to separate capacitors, sequentially reads the information from those capacitors, and then transfers the optical information stored in the first capacitor and the separate capacitors to each block. Characterized by independent discharge.

[Embodiments of the Invention] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of an image reading device according to the present invention.

However, in this embodiment, the optical sensors E1 to E9,
capacitors C1 to C9, switching transistors T1 to T12, and shift register 106,
107 and the like are the same as the conventional example shown in FIG. 3, so their explanation will be omitted.

In Fig. 1, the optical sensor E, which is a photoelectric conversion element,
Switching transistors ST1 to ST serving as switching means for the first discharge for each of the individual electrodes 1 to E9;
It is grounded via 9. That is, each of switching transistors ST1-ST9 is connected in parallel with capacitors C1-C9, which are first storage means.

The gate electrodes of the switching transistors ST1 to ST9 are similar to the gate electrodes of the switching transistors T1 to T9, which are the first switching means.
Each block is connected in common, and each block is connected to the parallel output terminal of the shift register 201.

Therefore, depending on the shift timing of the shift register 201, the switching transistor
ST1 to ST9 are sequentially turned on for each block.

In addition, in FIG. 1, common lines 102 to 104
are the capacitor C1, which is the second storage means, respectively.
A switching transistor which is grounded through 0 to C12 and serves as a switching means for the second discharge.
It is grounded via CT1 to CT3.

The capacitance of capacitors C10 to C12 is set to be sufficiently larger than that of capacitors C1 to C9.

Each gate electrode of the switching transistors CT1 to CT3 is connected in common to a terminal 108. That is, by applying a high level to the terminal 108, the switching transistor
CT1 to CT3 are turned on at the same time, and the common line 1
02 to 104 will be grounded.

Next, the operation of this embodiment having such a configuration will be explained using the switching transistor T1 shown in FIG.
This will be explained using timing charts of ~T12, CT1~CT3, and ST1~ST9. However, although FIG. 2 shows the timing at which each switching transistor turns on, this timing is, of course, also the timing at which the shift registers 106, 107, and 201 output high levels.

First, when light enters the optical sensors E1 to E9,
From the power supply 101 to the capacitor C1 depending on its strength
Charge is accumulated in ~C9.

Then, first, a high level is output from the first parallel terminal of the shift register 106, and the switching transistors T1 to T3 are turned on [second
Figure a].

By turning on the switching transistors T1 to T3, the charges accumulated in the capacitors C1 to C3 are transferred to the capacitors C10 to C3, respectively.
Transferred to 12.

Subsequently, the high level output from the shift register 107 is shifted, and the switching transistors T10 to T12 are sequentially turned on [second
Figures d-f].

As a result, the first block of optical information transferred to and stored in the capacitors C10 to C12 is sequentially read out through the amplifier 105.

When the information of the first block is read, terminal 1
A high level is applied to 08, and the switching transistors CT1 to CT3 are simultaneously turned on [FIG. 2g].

As a result, the residual charges in the capacitors C10 to C12 are completely discharged.

When the residual charges in the capacitors C10 to C12 are completely discharged, the shift register 106 shifts and a high level is output from the parallel terminals in FIG. As a result, the switching transistors T4 to T6 are turned on [FIG. 2b], and the second
The charges stored in capacitors C4-C6 of the block are transferred to capacitors C10-C12.

At the same time, the first
A high level is output from the parallel terminal of , the switching transistors ST1 to ST3 are turned on [Fig. 2h], and the residual charges in the capacitors C1 to C3 are completely discharged.

In this way, the capacitors C1 to C1 of the first block
Discharging operation of C3 and capacitor C of the second block
The charges accumulated in C4 to C6 are transferred to capacitor C1.
The transfer operation to transfer data from 0 to C12 is performed in parallel.

Then, as in the case of the first block, by shifting the shift register 107, the switching transistors T10 to T12 are sequentially turned on, and the optical information of the second block stored in the capacitors C10 to C12 is sequentially read out. Second
Figures d-f].

Similarly, in the case of the third block, the transfer operation [second
In parallel with the capacitor C of the second block
Discharging operations 4 to C6 are performed [FIG. 2i], and the above operations are similarly repeated for each block.

In this way, by transferring the information stored in the capacitors C1 to C9 for each block, the transfer and discharge operations, which were conventionally required nine times for each block, can be reduced to three in this embodiment. This can shorten the overall reading time.

Also, the information of the next block is transferred to capacitor C10.
In parallel with the operation of transferring data to C12, the capacitor of the block whose reading has been completed can be discharged, and the overall operating time can be further shortened.

In this embodiment, nine optical sensors are divided into three blocks, but the present invention is not limited to this. From this embodiment, a desired number of optical sensors can be easily divided into a desired number of blocks.

[Effects of the Invention] As described above in detail, the image reading device according to the present invention includes a first discharge switch means in parallel with the first charge accumulation means, and further a charge transfer from the first charge accumulation means. To perform the discharging operation and the transfer operation in parallel, in order to have a second accumulating means for accumulating transfer charges that accumulates the information that has been transferred, and a second discharging switch means in parallel with the accumulating means. , and the overall operating speed can be improved.

In addition, since the discharging switch means is provided, the first and second storage means can be completely discharged each time, and each operation of storage, readout, and discharge becomes reliable, thereby increasing the reliability of image reading. improves.

Furthermore, since the information is transferred from the first storage means to the second storage means block by block, the time required for the transfer can be shortened, and the overall operating speed can be improved.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an embodiment of an image reading device according to the present invention, FIG. 2 is a timing chart for explaining the operation of this embodiment, and FIG. 3 is a circuit diagram showing an example of a conventional image reading device. It is. E1-E9... Optical sensor, C1-C12... Capacitor, T1-T12, CT1--CT3, ST
1 to ST9...Switching transistor.

Claims (1)

[Scope of Claims] 1. A plurality of photoelectric conversion elements; and a plurality of first storage means that are electrically connected to each of the plurality of photoelectric conversion elements and accumulate charges according to each output signal of the photoelectric conversion element. and a first switch means for dividing a desired number of the first storage means into one block and simultaneously taking out the charges stored in the first storage means for each block, the first storage means is an image reading device in which each of the blocks in the same order is connected to the same common line through the first switch means, and is electrically connected to the first storage means so that each of the blocks in the same order is connected to the same common line. a first discharging switch means for discharging the residual charge of the first storage means; and a plurality of switch means connected to the common line for storing the charge taken out by the first switch means. a second storage means, and a second discharge switch means electrically connected to the second storage means and configured to simultaneously discharge the residual charge of the second storage means for each block. An image reading device comprising: