JPH0352277B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a recording and reproducing method for a video disc, and more particularly to a recording and reproducing method for recording an audio signal as a digital signal together with a video signal.

Conventionally, in video discs, the video signal is frequency modulated, the audio signal is also frequency modulated, and the respective signals are added or duty cycle modulated to record on the disc. By the way, when an audio signal is recorded on a disk by frequency modulation, its carrier is lost due to dropout of the disk, creating a so-called "pop" noise, which deteriorates the sound quality of reproduction. Furthermore, the reproduced image quality was not sufficiently satisfactory due to beat interference between the frequency modulated signal spectrum of the video signal and the frequency modulated signal of the audio signal.

In view of the above points, it is an object of the present invention to provide a recording and reproducing method that can significantly improve reproduced sound quality and reproduced image quality.

That is, the present invention replaces at least the synchronizing signal portion of a color television signal with a pulse signal having a specific pattern synchronized with a clock signal of a digitized audio signal, and converts the audio signal into a digital signal. placed in the synchronizing signal portion together with the pulse signal having the specific pattern, frequency modulating the color television signal other than the synchronizing signal portion, and adjusting the deviation during this frequency modulation and the color television signal including the synchronizing signal portion. make the deviation at least the same as that when the frequency is adjusted, and record it on a recording medium,
It reads the clock signal from the digitized audio signal data, stably reproduces the synchronized signal part converted to a pulse signal with a specific pattern, and records and reproduces it using frequency modulation. It is possible to increase the S/N ratio of color television signals, reduce the consumption of recording media, and record audio signals as PCM, which greatly improves the playback quality of audio and video signals. It can be done.

An embodiment of the present invention will be described below based on the drawings. FIG. 1 is a block diagram of a recording device, in which a color video signal is supplied to a video input terminal V;
Audio input terminal A is supplied with an audio signal. Although two channels of audio signals can be processed simultaneously by a known method, only one channel is shown in this embodiment.

First, a chroma burst signal is extracted from a color video signal by a burst signal extraction circuit 1, which is composed of a phase comparator 2, a low-grade filter 3, a VCO (voltage controlled oscillator) 4, and a 1/3 frequency divider 5. With the PLL loop, the output of VCO4 is approximately
A continuous signal whose phase is locked to the input burst signal of 3.58 MHz x 8 = 10.7 MHz is obtained. this
The output of VCO4 is approximately
It is converted into a 2.685MHz signal and supplied to adder 8. On the other hand, the color video signal is sent to the FM modulator 7
is frequency modulated and also supplied to the adder 8,
The output of adder 8 is input to limiter 9 to limit the amplitude. As a result, the output of the FM modulator 7 is subjected to duty cycle modulation by the pilot signal that is the output of the frequency divider 6. A pulse generator 10 generates pulses related to the synchronization signal from the color video signal, and supplies a pulse 23 having a width shown as (T ₁ ) in FIG. 2B as the output of the pulse generator 10. Here, this pulse 23 is called a horizontal blanking pulse.

A low frequency filter 12 removes high frequency components (above 20 KHz) from the audio signal, and an A/D converter 13 converts the audio signal into a 14-bit digital signal. The 14-bit parallel digital signal is converted into a serial signal by the shift register 14,
It is input to RAM (random access memory) 15. This RAM 15 is controlled by a ROM (read only memory) 17 and a control circuit 16, and the output of the RAM 15 is converted into a data string whose head is a signal (called a SYNC word) having a specific pulse string called a SYNC bit. It is encoded by the encoding circuit 11. Here, a well-known encoding circuit called 3PM will be used as the encoding circuit 11.

The output of the limiter 9 and the output of the encoding circuit 11 are
It is switched by electronic switch S ₁ in synchronization with the pulse output of pulse generator 10 and is supplied to optical modulator 18 . The laser beam is modulated by the optical modulator 18, and a signal is recorded on the disk 19 by a known method. The signal waveform during this period is schematically shown in FIG. FIG. 2A shows a portion of the input video signal in FIG. 21 is a horizontal synchronization signal, and 22 is a chroma burst signal. Figure 2B
The horizontal synchronization signal 21 and the chroma burst signal 22, which are negative pulses, are converted to the SYNC bit 24.
and data bits 25, and this section is obtained by a horizontal blanking pulse 23. FIG. 2C shows the optical modulator 18 in FIG.
Disk 19 using a laser beam modulated by
This is a horizontal representation of the bits recorded above.
Section 26 is a signal obtained by frequency modulating the video signal,
Section 27 is a digital signal encoded by the 3PM encoding method, and section 28 is a digital signal encoded using the 3PM encoding method.
The same signals as 6 are shown respectively.

In this way, the video signal and pilot signal, the signal obtained by converting the audio signal into a digital signal, and the video signal and pilot signal again are recorded in this order. However, since the pedestal part of the video signal is used as the reference position during playback,
Only a portion is recorded by frequency modulation. Note that the vertical synchronization signal portion is recorded by replacing the synchronization signal portion with SYNC bits having a specific pattern of the digital signal in the same manner as in the method described above.
However, this SYNC bit is the horizontal synchronization signal part.
It consists of a series of SYNC bits equal to the number of equivalent pulses and another vertical synchronization signal identification bit. The structure of the above signal is shown in FIG.

FIG. 3A shows a portion of the input video signal near the vertical synchronization signal. 30 is a horizontal synchronizing signal, 31 is an equivalent pulse, and 32 is a vertical synchronizing signal. In the above embodiment, the signal shown in FIG. 3A is converted into the signal shown in FIG. 3B. That is, the horizontal synchronization signal 30 is sent to the SYNC bit 33 (corresponding to 24 in Figure 2), and the vertical synchronization signal 42 part is sent to the SYNC bit 33 (corresponding to 24 in Figure 2).
As a result, while the amplitude of the signal in Figure 3A was from the SYNC chip to the white peak, the amplitude of the analog portion of the signal in B is as large as the pedestal level to the white peak. You can see that it becomes smaller. In Fig. 3B, 35 is for horizontal synchronization signal identification.
SYNC bit 36 is a data bit for vertical synchronization signal identification.

In this way, the video signal portion of the video signal is frequency-modulated from the analog signal, and the synchronization signal and chroma burst signal portions are replaced with a digitized audio signal containing the SYNC bit.

Next, a specific configuration for digitizing and recording audio signals will be described. To simplify the explanation, here we will use the “consumer
An example using "PCM encoder/decoder" based on the Japan Electronics Machinery Industry Association STC-007 will be explained.

FIG. 4A shows the signal format in the horizontal synchronization period according to the above-mentioned STC-007 standard. data 42
(128 bits) is the data 45 of this embodiment shown in FIG. 4B, and the data synchronization signal 41 is the SYNC bit 44.
(corresponds to 12 bits. Therefore, in this example, (128
+12) bits = 140 bits is shown in Figure 4C.
It is inserted in the section 47 of 0.145H, or about 9.2 μsec. This means that 1-bit synchronization is 9.2/140
≒ 0.066 μs or less. By the way, since the encoding circuit 11 shown in FIG. 1 uses the 3PM code, the minimum bit inversion interval becomes 1.5 times. Therefore, the time can be reduced to 0.066 μs×1.5=0.099 μs or less. In this embodiment, it is more convenient in the reproduction system to set the minimum bit inversion interval, that is, the clock period, to four times the pilot signal (2.685 MHz), so this clock frequency is set to 10.7 MHz (i.e., chroma). (3 times the signal subcarrier). In this way, the minimum bit inversion interval becomes approximately 0.093 μs, and a 140-bit signal can be inserted into the 9.2 μs interval 47. In FIG. 4A, 40 is a horizontal signal, and 43 is a white reference signal. Further, the data signal 46 conforms to the standard STC-007, so a description thereof will be omitted. Also, in the example
Although the block coding method based on STC-007 has been described, other coding methods such as convolutional codes can be similarly implemented.

In the explanation of FIG. 1, it was mentioned that the video signal is frequency modulated and recorded. In this case, in the conventional video disc, as shown in FIG. 5A, the SYNC chip 5
Frequency modulation was performed at levels from 0 to white peak 51. On the other hand, in this example,
Since the SYNC portion of the video signal has all been replaced with a digital signal, the range of frequency modulation can be defined from the pedestal level 52 to the white peak 53, as shown in FIG. 5B. Therefore, if the same frequency change range is provided, in this embodiment, the S/N of the demodulated video signal is improved accordingly. The degree of improvement reaches 20log1.40/1.00=3dB.

Next, a method for reproducing a disc on which signals have been recorded using the above method will be explained. FIG. 6 is a block diagram of the playback device. 60 is a disk on which the above-mentioned signals are recorded, and 61 is a motor for controlling the rotation of the disk 60. 67 is a laser generator,
The laser from this laser generator 67 passes through a lens 66, a beam splitter 64, and a tracking mirror 63, and is focused on the signal on the disk 60 by a reading lens 62, and the reflected light is reflected by the reading lens 62 and tracking mirror 63. 63, the beam passes through a beam splitter 64, passes through a cylindrical lens 65, and is converted into an electrical signal by a photodetector 68. Although not shown here, a TBC mirror for jitter correction is also provided.
The tangential position of the beam spot on disk 60 can also be controlled.

Now, the output of the photo detector 68 is demodulated into a video signal by an FM demodulator 79. At the same time, the bandpass filter 70 is tuned to the pilot signal (2.685MHz), and the pilot signal is obtained at its output, and the phase comparator 71 tunes the signal to 10.7MHz.
The output of the oscillator 74 is compared with a 2.685 MHz reference signal obtained by dividing the frequency by 1/4 by the frequency divider 73, and is supplied to the adder 76 via a suitable equalizer circuit 72. 82 is a comparator, and the comparator 82 slices the digital signal portion of the output of the photodetector 68 at an appropriate level and converts it into a digital signal. 85 is a clock signal generator;
This clock signal generator 86 is connected to a comparator 8.
2 output and 10.7MHz output from oscillator 74
A clock signal that is in phase with the digital signal output from the comparator 82 is generated from the clock signal. 83 is a decoder, which is a 3PM decoding circuit, and its output becomes an NRZ signal. The NRZ signal is input to the shift register circuit 84 together with the clock output signal of the clock signal generator 85, and the NRZ signal is input to the shift register circuit 84.
Bit generator 90 and match detection circuit 89
Outputs a pulse signal every time the SYNC bit is detected. In this way, the SYNC bit was supported.
SYNC pulse is obtained. This SYNC pulse
The signal is supplied to a SYNC pulse generator 92, which generates a vertical synchronization signal, a horizontal synchronization signal, etc. that originally constituted the video signal, which is supplied to a SYNC and burst signal adder 80, and output to a video output terminal 94 as a video output. Output. Shift register circuit 84
The serial output signal is input to a RAM (random access memory) 86 and a D/A converter 87.
The pulse train is arranged in a form that can be converted into an analog signal, and passed through a low-pass filter 88 to the D/A
An audio signal converted into an analog signal by converter 87 is obtained at audio output terminal 95. The control circuit 91 generates signals for controlling the RAM 86 based on the clock signal, SYNC pulse, etc. output from the clock signal generator 85.

On the other hand, the horizontal synchronization signal output obtained by the SYNC generator 92 is input to the F/V converter 93, where it is converted into a voltage indicating the rotational speed of the disk 60, and then passed through the adder 76 and amplified by the DC amplifier 78. is,
The rotation of the disk motor 61 is controlled so that the frequency of the horizontal synchronization signal output from the SYNC generator 92 is always constant.

At the same time, the pilot signal, which is the output of the bandpass filter 70, is passed through the phase comparator 71 to the frequency divider 7.
The signal is phase-compared with the reference signal output from 3, passes through an equalizer 72 and an adder 76, is amplified by a DC amplifier 77, controls the T, B, and C mirrors (mirrors for jitter correction), and focuses on the disk 60. By changing the tangential position of the connecting beams, the phase of the regenerated pilot signal can be adjusted by the frequency divider 7.
It operates so as to be locked to the reference signal which is the output of No. 3.

As a result, the phase of the reproduced digital signal locks with the output of the clock signal generator 85, and the output of the oscillator 74 is divided by 1/3 by the frequency divider 75 and converted into a sine wave by the bandpass filter 81. The 3.58 MHz signal is added to the video signal as a chroma burst signal by the SYNC and burst signal adder 80, and the original color video signal is obtained at the video output terminal 94. Note that the band filter 81 has a phase corrector that corrects the phase with the chroma signal.

In this way, the front and back of the sync signal part of the video signal is converted to a digital signal, the sync signal is replaced with a SYNC word by a digital signal, the audio signal is converted to a digital signal and aligned with the SYNC word, and the chroma burst signal is converted to a digital signal. By recording to a disk using the utility cycle, audio signals can be converted to PCM and recorded.
In addition, since the video signal can be frequency modulated above the pedestal portion, the S/N of the reproduced video signal is improved.
Therefore, the reproduction quality of audio and video signals can be made extremely high.

As explained above, according to the present invention, it is possible to read out a clock signal from digitized audio signal data, stably reproduce the synchronization signal portion converted into a pulse signal having a specific pattern, and also As a result, it is possible to increase the S/N ratio of recorded and reproduced color television signals, reducing the amount of recording media consumed.Furthermore, since audio signals can be recorded as PCM, audio signals and The playback quality of video signals can be significantly improved.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a recording device according to an embodiment of the present invention, FIG. 2 is an explanatory diagram of a signal waveform recorded by the recording device shown in FIG. 1, and FIG. 3 is an explanation of a waveform near a vertical synchronizing signal. 4 is an explanatory diagram of a recording signal format in an embodiment of the present invention,
FIG. 5 is an explanatory diagram of frequency modulation debiasing, and FIG. 6 is a block diagram of a reproducing apparatus according to an embodiment of the present invention. 21, 30, 40...Horizontal synchronization signal, 22...Chroma burst signal, 23...Horizontal blanking pulse, 24, 33, 44...SYNC bit, 25...Data bit, 31...Equivalent pulse, 32...Vertical synchronization signal, 35... SYNC bit for horizontal synchronization signal identification,
36...Data bit for vertical synchronization signal identification, 41...
Data synchronization signal, 42, 45...data, 50...
SYNC chip, 51, 53... White Peak, 5
2...Pedestal level.

Claims (1)

[Scope of Claims] 1. Replace at least a synchronizing signal portion of a color television signal with a pulse signal having a specific pattern synchronized with a clock signal of a digitized audio signal, and convert the audio signal into a digital signal. and placing it in the synchronizing signal part together with the pulse signal having the specific pattern, frequency modulating the color television signal other than the synchronizing signal part, and controlling the deviation during this frequency modulation and the color television signal including the synchronizing signal part. A recording/reproducing method in which signals are recorded on a recording medium and reproduced with at least the same deviation as when frequency modulated. 2. Converting the horizontal synchronizing pulse signal of a color television signal into a digital data signal having a specific pattern, converting the vertical synchronizing signal portion into a digital data signal different from the specific pattern, recording it on a recording medium, and reproducing it. A recording/reproducing method according to claim 1.