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JPH0351089B2 - - Google Patents

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Publication number
JPH0351089B2
JPH0351089B2 JP58020960A JP2096083A JPH0351089B2 JP H0351089 B2 JPH0351089 B2 JP H0351089B2 JP 58020960 A JP58020960 A JP 58020960A JP 2096083 A JP2096083 A JP 2096083A JP H0351089 B2 JPH0351089 B2 JP H0351089B2
Authority
JP
Japan
Prior art keywords
silicon
gas
type
semiconductor
indium
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58020960A
Other languages
Japanese (ja)
Other versions
JPS59147427A (en
Inventor
Kazunobu Tanaka
Akihisa Matsuda
Masamichi Kohitsu
Takao Kaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP58020960A priority Critical patent/JPS59147427A/en
Publication of JPS59147427A publication Critical patent/JPS59147427A/en
Publication of JPH0351089B2 publication Critical patent/JPH0351089B2/ja
Granted legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/0021Reactive sputtering or evaporation
    • C23C14/0036Reactive sputtering
    • C23C14/0057Reactive sputtering using reactive gases other than O2, H2O, N2, NH3 or CH4
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Photovoltaic Devices (AREA)

Description

【発明の詳細な説明】 本発明は、四弗化珪素含有原料ガスをグロー放
電下に分解して基板上にシリコン半導体を生成さ
せる際、同時にインジウムをドープすることによ
り得られるシリコン半導体、特に、補償された真
性の(以下、i型という。)シリコン半導体及び
p型シリコン半導体並びにそれら半導体の製法に
関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a silicon semiconductor obtained by doping indium at the same time when a silicon tetrafluoride-containing raw material gas is decomposed under glow discharge to produce a silicon semiconductor on a substrate. The present invention relates to compensated intrinsic (hereinafter referred to as i-type) silicon semiconductors, p-type silicon semiconductors, and methods of manufacturing these semiconductors.

シリコン半導体は、かなり以前からよく知られ
ているが、近年になつて、太陽電池素子、電子写
真用感光体、光センサ、薄膜トランジスター、そ
の他各種の用途が見出されるに及び非晶質シリコ
ン半導体の開発及び研究も盛んとなつている。非
晶質シリコン半導体としては、これにドープされ
る元素の種類に応じて、暗電気伝導度が1×
10-9Ω-1・cm-1程度以上のn型とp型のものがよ
く知られているが、この他に特に太陽電池の製作
に用いられるi型の非晶質シリコン半導体の開発
が進められている。
Silicon semiconductors have been well known for quite some time, but in recent years, amorphous silicon semiconductors have been found to be used in solar cell elements, electrophotographic photoreceptors, optical sensors, thin film transistors, and various other applications. Development and research are also active. As an amorphous silicon semiconductor, the dark electric conductivity is 1× depending on the type of element doped with it.
N-type and p-type semiconductors with a resistance of about 10 -9 Ω -1 cm -1 or higher are well known, but in addition to these, the development of i-type amorphous silicon semiconductors, which are particularly used in the production of solar cells, is underway. It is progressing.

i型の非晶質シリコン半導体は暗電気伝導度が
1×10-10〜10-12Ω-1・cm-1程度であり、通常弱
n型の非晶質シリコン半導体に、原子価3の金
属、例えば硼素をドープすることにより造られ
る。また、その際、硼素のドープ量を増大させる
ことによりp型の非晶質シリコン半導体も造られ
ている。
An i-type amorphous silicon semiconductor has a dark electrical conductivity of about 1×10 -10 to 10 -12 Ω -1 cm -1 , and a weak n-type amorphous silicon semiconductor usually has a valence of 3. It is made by doping a metal, for example boron. At that time, p-type amorphous silicon semiconductors are also produced by increasing the amount of boron doped.

非晶質シリコン半導体は特にその用途において
薄膜状で使用されることが多いために、珪素含有
原料ガスを分解して基板上に化学蒸着させる方法
(以下、CVD法という。)により一般に造られる。
しかし、珪素含有原料のガスの種類及び製法の相
違に応じて得られる非晶質シリコン半導体の性
質、性能等が相違し、各種の非晶質シリコン半導
体及びその製法に係わる提案がみられるが、いず
れも未だ充分でない。比較的好ましいものとして
は、シラン、ジシラン等シラン系ガスからプラズ
マCVD法により得られるものが知られている。
この方法により得られる非晶質シリコン半導体は
弱n型のものであり、珪素原子に結合した形態で
少量の水素原子を含む。この水素原子は、ダング
リングボンドターミネーター(dangling bond
terminator)と呼ばれている。
Since amorphous silicon semiconductors are often used in the form of thin films, they are generally produced by a method of decomposing silicon-containing raw material gas and chemical vapor deposition on a substrate (hereinafter referred to as CVD method).
However, the properties, performance, etc. of the amorphous silicon semiconductors obtained vary depending on the type of gas used as the silicon-containing raw material and the manufacturing method, and there are various proposals regarding amorphous silicon semiconductors and their manufacturing methods. Both are still insufficient. Relatively preferable materials are those obtained from silane-based gases such as silane and disilane by plasma CVD.
The amorphous silicon semiconductor obtained by this method is of weak n-type and contains a small amount of hydrogen atoms bonded to silicon atoms. This hydrogen atom acts as a dangling bond terminator.
terminator).

上記シラン系ガスからプラズマCVD法で得ら
れる非晶質シリコン半導体には、硼素を、例え
ば、上記シラン系ガスにボランを混じて上記方法
を行なうことにより、容易にドープすることがで
き、硼素のドープ量に応じてi型及びp型の半導
体が容易に得られる。しかし、上記シラン系ガス
からプラズマCVD法で得られる非晶質シリコン
半導体は、用途によつては、例えば、太陽電池用
としては、光起電力等半導体特性及び耐紫外線劣
化性等が充分でなく、その改良が望まれている。
The amorphous silicon semiconductor obtained from the silane gas by plasma CVD can be easily doped with boron, for example, by mixing borane with the silane gas and performing the above method. I-type and p-type semiconductors can be easily obtained depending on the doping amount. However, the amorphous silicon semiconductor obtained from the above-mentioned silane gas by the plasma CVD method may not have sufficient semiconductor properties such as photovoltaic power and UV deterioration resistance for some applications, such as solar cells. , its improvement is desired.

クロロシランからも上記同様のプラズマCVD
法で非晶質シリコン半導体が得られるが、やはり
これも半導体特性が充分でない。一方四弗化珪素
からは、プラズマCVD法では蒸着膜が生成しに
くいが四弗化珪素含有ガス、例えば、四弗化珪素
とシランとの混合ガスからグロー放電下のCVD
法で得られる非晶質半導体は、やはり、ダングリ
ングボンドターミネーターとして弗素原子及び水
素原子を含有する弱n型のものであり、上記シラ
ン系又はクロロシランガスからのものより半導体
特性が優れ好ましいものである。しかるに四弗化
珪素含有ガスにジボラン、弗化硼素等を混じてプ
ラズマCVD法で非晶質シリコン半導体を造つて
も硼素が有効にドープされず、i型またはp型の
良質の半導体が得られない。
Plasma CVD similar to the above from chlorosilane
Although an amorphous silicon semiconductor can be obtained by this method, it also does not have sufficient semiconductor properties. On the other hand, silicon tetrafluoride is difficult to form a vapor deposited film using plasma CVD, but silicon tetrafluoride-containing gas, such as a mixed gas of silicon tetrafluoride and silane, can be used for CVD under glow discharge.
The amorphous semiconductor obtained by this method is also a weak n-type semiconductor containing fluorine atoms and hydrogen atoms as dangling bond terminators, and is preferable because it has better semiconductor properties than those made from the above-mentioned silane-based or chlorosilane gas. be. However, even if an amorphous silicon semiconductor is produced by a plasma CVD method by mixing diborane, boron fluoride, etc. with a silicon tetrafluoride-containing gas, boron is not effectively doped, and a high-quality i-type or p-type semiconductor cannot be obtained. do not have.

本発明者らは、四弗化珪素含有ガスからプラズ
マCVD法により得られる非晶質シリコン半導体
に、硼素以外の元素をドープすることを着想し、
ドープ元素としてインジウムに着目したが、イン
ジウムの水素化物はいまだ存在しないことを知
り、詳しい研究を行なつた結果、金属インジウム
を上記グロー放電のカソード電極として用い、四
弗化珪素とシランガスの混合ガスに更にアルゴン
ガスを混じたものを用いてグロー放電下のCVD
法を行なうと、アルゴンガスが金属インジウムに
スパツタリングを起こさせる作用をし、シリコン
半導体中にインジウムがドープされ、先ずi型の
ものが、更にドープ量を増大させると、p型のも
のが得られることを見出した。
The present inventors came up with the idea of doping an element other than boron into an amorphous silicon semiconductor obtained by plasma CVD from a silicon tetrafluoride-containing gas,
We focused on indium as a doping element, but learned that indium hydride does not yet exist.As a result of detailed research, we used metallic indium as the cathode electrode of the glow discharge described above, and created a mixed gas of silicon tetrafluoride and silane gas. CVD under glow discharge using argon gas mixed with
When this process is performed, argon gas acts to cause sputtering of metallic indium, and indium is doped into the silicon semiconductor. First, an i-type semiconductor is obtained, and when the amount of doping is further increased, a p-type semiconductor is obtained. I discovered that.

本発明の目的は、半導体特性、耐紫外線劣化性
等に優れる新規なシリコン半導体、特に、そのi
型及びp型の半導体の製法を提供することにあ
る。
The object of the present invention is to provide a novel silicon semiconductor with excellent semiconductor properties, ultraviolet deterioration resistance, etc., especially its i.
An object of the present invention is to provide a method for manufacturing semiconductors of type and p-type.

本発明のシリコン半導体の製法は、金属インジ
ウムからなるカソードと基板電極を対置した反応
室内に、四弗化珪素含有原料ガスとスパツタリン
グガスを供給し、該両ガスの存在下前記カソード
と基板電極との間にグロー放電を起こさせること
を特徴とするものである。
In the method for manufacturing a silicon semiconductor of the present invention, a raw material gas containing silicon tetrafluoride and a sputtering gas are supplied into a reaction chamber in which a cathode made of metal indium and a substrate electrode are placed opposite each other, and in the presence of both gases, the cathode and substrate electrode are placed opposite each other. It is characterized by causing glow discharge between the electrode and the electrode.

本発明の製法に用いられる四弗化珪素含有原料
ガスは四弗化珪素ガスと他のガスとの混合物であ
り、上記他のガスとしては、水素、モノシラン
(SiH4)、ジシラン(Si2H6)、高次シラン
(SinH2n+2)等シラン系ガス又はこれらの混合物
が挙げられる。これら原料ガスとしては不純成分
を含まないものが用いられる。本発明の製法に用
いられる上記原料ガスは、四弗化珪素を必ず含有
し、これによつて、生成したシリコン半導体は、
ダングリングボンドターミネーターとして弗素原
子を珪素原子に結合した形態で微量含有し、その
半導体特性が優れたものとなる。上記原料ガスの
組成については制限を要しないが、約40〜60容量
%の四弗化珪素を含有するシランと四弗化珪素の
混合ガスが好ましい。本発明の製法に用いられる
スパツタリングガスは、上記原料ガス中でグロー
放電を起こさせた際、カソード電極の金属インジ
ウムをドープに適する形態の粒子としてたたき出
す作用をし、通常、好ましいドープを行なわせる
には、上記原料ガスをグロー放電によつて分解す
ると同時に金属インジウムにもスパツタリングを
起こさせる必要があり、グロー放電を起こさせる
反応室には、上記原料ガスとスパツタリングガス
が共存するように両ガスは供給される。スパツタ
リングガスの例としては、アルゴン、ネオン等が
挙げられる。グロー放電が起こる際、原料ガスに
対する共存スパツタリングガスの比率は、生成す
るシリコン半導体中のインジウムのドープ量に影
響を与え、上記比率が小さいとドープ量が小さ
く、従つて生成半導体はi型となり、上記比率が
大きいとドープ量が大きくなり、従つて生成半導
体はp型となる。通常、好ましいi型及びp型の
半導体を得るには、原料ガスに対するスパツタリ
ングガスの上記比率としては、例えばアルゴンで
は容積比で2〜20程度が好ましい。
The silicon tetrafluoride-containing raw material gas used in the production method of the present invention is a mixture of silicon tetrafluoride gas and other gases, and the other gases include hydrogen, monosilane (SiH 4 ), disilane (Si 2 H 6 ), silane-based gases such as higher-order silane (SinH 2 n +2 ), or mixtures thereof. These raw material gases are those that do not contain impurity components. The raw material gas used in the production method of the present invention always contains silicon tetrafluoride, so that the silicon semiconductor produced is
It contains a trace amount of fluorine atoms bonded to silicon atoms as a dangling bond terminator, giving it excellent semiconductor properties. Although there are no restrictions on the composition of the raw material gas, a mixed gas of silane and silicon tetrafluoride containing about 40 to 60% by volume of silicon tetrafluoride is preferred. The sputtering gas used in the production method of the present invention has the effect of knocking out the metallic indium of the cathode electrode as particles in a form suitable for doping when glow discharge is caused in the above-mentioned raw material gas, and usually performs the preferable doping. In order to achieve this, it is necessary to decompose the raw material gas by glow discharge and at the same time cause sputtering to occur in metallic indium, and the reaction chamber in which the glow discharge is caused must be designed so that the raw material gas and the sputtering gas coexist. Both gases are supplied. Examples of sputtering gases include argon, neon, and the like. When glow discharge occurs, the ratio of the coexisting sputtering gas to the raw material gas affects the amount of indium doped in the silicon semiconductor that is produced; if the above ratio is small, the amount of doping is small, and therefore the semiconductor that is produced is i-type. Therefore, when the above ratio is large, the amount of doping becomes large, and therefore the generated semiconductor becomes p-type. Normally, in order to obtain preferred i-type and p-type semiconductors, the ratio of the sputtering gas to the raw material gas is preferably about 2 to 20 in terms of volume ratio for argon, for example.

前記の如く、シラン系ガス又はこれとジボラン
ガスとの混合物からプラズマCVD法で非晶質シ
リコン半導体を得ることは従来から行なわれてお
り、この方法に用いる装置は既に知られている。
この装置は、通常、原料ガスの導入口及び分解ガ
スの排出口を備え、外気を遮断できる反応室と、
該室内にグロー放電を起こさせるためのカソード
と、それと対向する位置にシリコンが蒸着するた
めの基板、或いは更に該基板を載置固定するため
の基板電極と、上記基板を加熱するための装置
と、電極間に直流又は高周波の高電界を印加する
ための装置と、反応室内を減圧にするための真空
ポンプとこれら装置、要素を連結、作動、正常運
転させるための要素を備えたものである。本発明
の方法を実施するための装置は、上記従来の装置
を若干変更することにより容易に得られる。すな
わち、上記従来のカソード電極を金属インジウム
製のものにとり替え、更に要すれば、反応室にス
パツタリングガス導入口を設けることにより得ら
れる。電極として用いられる金属インジウムとし
ては、純度99.99%程度のもので充分である。従
つて本発明の新規なシリコン半導体の製法の特徴
は、金属インジウムからなるカソードと基板電極
を対置した反応室に、前記四弗化珪素含有原料ガ
スとスパツタリングガスを供給し、該両ガスの存
在下上記カソードと基板電極との間にグロー放電
を起こさせることにある。
As mentioned above, it has been conventional to obtain an amorphous silicon semiconductor from a silane-based gas or a mixture of silane-based gas and diborane gas by the plasma CVD method, and the equipment used for this method is already known.
This device usually includes a reaction chamber that is equipped with an inlet for raw material gas and an outlet for decomposed gas, and can be shut off from outside air.
A cathode for causing glow discharge in the chamber, a substrate for depositing silicon at a position facing the cathode, or a substrate electrode for mounting and fixing the substrate, and a device for heating the substrate. It is equipped with a device for applying a direct current or high frequency high electric field between electrodes, a vacuum pump to reduce the pressure inside the reaction chamber, and elements for connecting, operating, and normal operation of these devices and elements. . An apparatus for carrying out the method of the invention can be easily obtained by slightly modifying the conventional apparatus described above. That is, it can be obtained by replacing the conventional cathode electrode with one made of metal indium and, if necessary, providing a sputtering gas inlet in the reaction chamber. Metallic indium with a purity of about 99.99% is sufficient for use as an electrode. Therefore, the feature of the novel silicon semiconductor manufacturing method of the present invention is that the silicon tetrafluoride-containing raw material gas and the sputtering gas are supplied to a reaction chamber in which a cathode made of metal indium and a substrate electrode are placed opposite each other. The purpose is to cause a glow discharge between the cathode and the substrate electrode in the presence of the cathode.

本発明の製法において、カソードの金属インジ
ウムは、四弗化珪素含有原料ガスとスパツタリン
グガスの存在下グロー放電を行なわせた際、単に
電極としてのみならず、分解によつて生じたシリ
コンに混じて、蒸着シリコン中にドープできる形
態のインジウムを該電極から放出する作用をす
る。従つて、一定の放電が続くと一様にインジウ
ムがドープされたシリコン層が基板上に形成され
る。本発明の製法に用いられる基板は通常のもの
でよく、材質の例としては、ガラス、ステンレス
鋼、耐熱性プラスチツク等が挙げられる。基板の
温度としては、通常400℃以下、好ましくは200な
いし350℃程度がよい。本発明の製法に用いられ
る反応室も通常のものでよく、その材質としても
ステンレス鋼、石英ガラス等、生成半導体に汚染
をもたらさないもので充分である。グロー放電
は、基板が電気絶縁体のときは、それを載置して
いる台板を電気伝導体とすることにより行なわれ
る。グロー放電のための印加電界は通常数百ボル
トないし千ボルト程度、電源としては直流、高周
波交流いずれでもよい。通常、グロー放電は、約
10ないし100ミリトル(mTorr)の供給ガスに基
ずく圧力下に行なわれる。グロー放電を継続し、
連続的に蒸着シリコン層の厚みを増大させるに
は、原料ガス及びスパツタリングガスを連続的に
反応室内に供給し、グロー放電によつて生じた分
解ガスと未分解供給ガスの混合物が連続的に反応
室から排出され、その間定常状態が維持される方
法により行なわれる。カソードに金属インジウム
を使用しても、原料ガスのみの存在下のグロー放
電では、蒸着シリコン半導体中にインジウムがド
ープされず、i型及びp型のものはいずれも得ら
れない。スパツタリングガスの共存下では、イン
ジウムのドープ量は、前記の如くスパツタリング
ガス濃度の他に、グロー放電のための印加電界、
反応室内供給ガス圧、基板温度等によつて影響さ
れるので、これらの条件を適宜組合せることによ
り調節することができる。
In the manufacturing method of the present invention, the metal indium of the cathode not only acts as an electrode when glow discharge is performed in the presence of a silicon tetrafluoride-containing raw material gas and a sputtering gas, but also acts as an electrode for the silicon produced by decomposition. The mixture acts to release indium from the electrode in a form that can be doped into the deposited silicon. Therefore, as a certain discharge continues, a silicon layer uniformly doped with indium is formed on the substrate. The substrate used in the manufacturing method of the present invention may be any ordinary substrate, and examples of the material include glass, stainless steel, and heat-resistant plastic. The temperature of the substrate is usually 400°C or less, preferably about 200 to 350°C. The reaction chamber used in the manufacturing method of the present invention may also be of a conventional type, and its material may be stainless steel, quartz glass, or other material that does not cause contamination to the produced semiconductor. When the substrate is an electrical insulator, glow discharge is performed by making the base plate on which it is placed an electrical conductor. The electric field applied for glow discharge is usually on the order of several hundred volts to a thousand volts, and the power source may be either direct current or high frequency alternating current. Typically, a glow discharge is approximately
It is carried out under a pressure based on a feed gas of 10 to 100 mTorr. Continue the glow discharge,
In order to continuously increase the thickness of the deposited silicon layer, the raw material gas and the sputtering gas are continuously supplied into the reaction chamber, and the mixture of decomposed gas and undecomposed feed gas produced by glow discharge is continuously supplied. The reaction chamber is then evacuated from the reaction chamber, during which time a steady state is maintained. Even if metallic indium is used for the cathode, in glow discharge in the presence of only source gas, indium is not doped into the deposited silicon semiconductor, and neither i-type nor p-type semiconductors can be obtained. In the presence of sputtering gas, the amount of indium doped is determined by the applied electric field for glow discharge, in addition to the sputtering gas concentration as described above.
Since it is affected by the gas pressure supplied in the reaction chamber, the substrate temperature, etc., it can be adjusted by appropriately combining these conditions.

かくして、本発明の製法によれば、インジウム
のドープ量を調節することにより、i型又はp型
のシリコン半導体を基板上に生成させることがで
き、通常、上記連続的製法によれば、厚み方向約
50ないし1200Å/分の速度で薄膜が得られる。本
発明の製法により得られる半導体は、化学分析を
要せずに、暗電気伝導度を測定することにより、
直接にインジウムのドープ量に対応するi型又は
p型のいずれの半導体かを判別できる。また、n
型とp型のいずれに属するかは、常法により熱起
電力を測定することにより判別できる。本発明の
製法により得られる半導体としては、その製造条
件に応じて非晶質、微結晶質のいずれも得られ、
共に有用である。また、得られたシリコン半導体
は、通常、ダングリングボンドターミネーターと
して珪素原子に結合した弗素原子及び水素原子を
含むが、その量としては、弗素0.2〜2アトミツ
ク%、水素5〜20アトミツク%が好ましい。本発
明のシリコン半導体は、ダングリングボンドター
ミネーターとして珪素原子に結合した弗素原子を
含有するにもかゝわらず、インジウムがドープさ
れたものであり、優れた性能を示す。
Thus, according to the manufacturing method of the present invention, an i-type or p-type silicon semiconductor can be produced on a substrate by adjusting the amount of indium doped. about
Thin films are obtained at speeds of 50 to 1200 Å/min. The semiconductor obtained by the manufacturing method of the present invention can be determined by measuring dark electrical conductivity without the need for chemical analysis.
It is possible to directly determine whether the semiconductor is i-type or p-type, which corresponds to the amount of indium doped. Also, n
Whether the material belongs to type or p-type can be determined by measuring thermoelectromotive force using a conventional method. The semiconductor obtained by the manufacturing method of the present invention can be either amorphous or microcrystalline depending on the manufacturing conditions,
Both are useful. In addition, the obtained silicon semiconductor usually contains fluorine atoms and hydrogen atoms bonded to silicon atoms as dangling bond terminators, and the amount thereof is preferably 0.2 to 2 atomic percent fluorine and 5 to 20 atomic percent hydrogen. . Although the silicon semiconductor of the present invention contains fluorine atoms bonded to silicon atoms as dangling bond terminators, it is doped with indium and exhibits excellent performance.

以下、比較例に続いて、実施例を挙げて説明す
るが、本発明の技術的範囲はこれに限定されな
い。
Examples will be described below following comparative examples, but the technical scope of the present invention is not limited thereto.

比較例 1 原料ガス導入口、アルゴンガス導入口及び分解
ガス排気口を有し、金属インジウムからなるカソ
ード電極を備えたステンレス鋼製反応室内のステ
ンレス鋼製台盤上に、コーニング7059のガラス板
を基板として設置し、反応室内を高性能真空ポン
プを用いて排気すると共に、基板温度が300℃と
なるよう加熱した。次いで、原料ガス導入口から
標準状態換算0.5ml/分で四弗化珪素ガスと同じ
く0.5ml/分でモノシランガスを供給しながら、
真空ポンプに接続する分解ガス排気口バルブの開
度を調節し、印加電界600ボルト、出力54ワツト、
周波数13.56メガヘルツで高周波グロー放電を行
ないつつ反応室内を20ミリトル(mTorr)に30
分間維持することにより、シリコン薄膜を基板上
に形成させた。
Comparative Example 1 A Corning 7059 glass plate was placed on a stainless steel base in a stainless steel reaction chamber that had a raw material gas inlet, an argon gas inlet, and a cracked gas exhaust port, and was equipped with a cathode electrode made of metallic indium. The reaction chamber was evacuated using a high-performance vacuum pump and heated to a substrate temperature of 300°C. Next, while supplying monosilane gas from the raw material gas inlet at a rate of 0.5 ml/min (converted to standard conditions) and silicon tetrafluoride gas at a rate of 0.5 ml/min,
Adjust the opening of the decomposed gas exhaust valve connected to the vacuum pump, apply an electric field of 600 volts, output 54 watts,
The reaction chamber was heated to 20 mTorr (30 mTorr) while performing a high-frequency glow discharge at a frequency of 13.56 MHz.
A silicon thin film was formed on the substrate by maintaining the temperature for 1 minute.

次いで、上記シリコン薄膜に真空蒸着法によ
り、アルミニウムを蒸着させ、ギヤツプ型アルミ
ニウム電極を形成させ、ケスレー社製エレクトロ
メーターを用いて上記シリコン薄膜の暗電気伝導
度を測定したところ、1.50×10-9Ω-1・cm-1であ
つた。更に上記薄膜について、上記エレクトロメ
ーターを用いて熱起電力を測定したところ加熱電
極側に正の電力が生じ弱n型半導体であることを
認めた。
Next, aluminum was deposited on the silicon thin film by vacuum evaporation to form a gap-type aluminum electrode, and the dark electrical conductivity of the silicon thin film was measured using a Kesley electrometer and found to be 1.50×10 -9 It was Ω -1・cm -1 . Furthermore, when the thermoelectromotive force of the thin film was measured using the electrometer, positive power was generated on the heating electrode side, indicating that it was a weak n-type semiconductor.

比轄例 2 比較例1において、更にスパツタリングガスと
してアルゴンガスを、標準状態換算1ml/分で反
応室内に供給した他は上記比較例1と全く同様に
してシリコン薄膜を形成させ、暗電気伝導度を測
定したところ、3.6×10-9Ω-1・cm-1を示し、熱起
電力測定結果もやはり弱n型半導体膜であること
を示した。
Comparative Example 2 A silicon thin film was formed in the same manner as in Comparative Example 1 above, except that argon gas was further supplied as a sputtering gas into the reaction chamber at a rate of 1 ml/min in terms of standard conditions. When the conductivity was measured, it was found to be 3.6×10 −9 Ω −1 ·cm −1 , and the thermoelectromotive force measurement results also showed that it was a weak n-type semiconductor film.

実施例 1 比較例2におけるアルゴンガス供給量を、標準
状態換算6ml/分に変えた他は全く同様にして、
シリコン薄膜を形成させ、その暗電気伝導度を測
定したところ3.3×10-12Ω-1・cm-1を示し、i型
半導体が得られたことを認めた。
Example 1 The same procedure as in Comparative Example 2 was carried out except that the argon gas supply amount was changed to 6 ml/min in terms of standard conditions.
A silicon thin film was formed, and its dark electrical conductivity was measured to be 3.3×10 −12 Ω −1 ·cm −1 , confirming that an i-type semiconductor was obtained.

実施例 2 比較例2におけるアルゴンガス供給量を、標準
状態換算10ml/分に変えた他は全く同様にしてシ
リコン薄膜を形成させ、その暗電気伝導度を測定
したところ、6.6×10-11Ω-1・cm-1を示し、この
薄膜もi型半導体であつた。
Example 2 A silicon thin film was formed in the same manner as in Comparative Example 2 except that the argon gas supply rate was changed to 10 ml/min in standard conditions, and its dark electrical conductivity was measured to be 6.6×10 -11 Ω. -1 ·cm -1 , indicating that this thin film was also an i-type semiconductor.

実施例 3 比較例2におけるアルゴンガス供給量を、標準
状態換算15ml/分に変えた他は全く同様にしてシ
リコン薄膜を形成させ、その暗電気伝導度を測定
したところ、3.5×10-9Ω-1・cm-1を示し、熱起電
力測定結果、この膜はp型半導体であることを認
めた。
Example 3 A silicon thin film was formed in the same manner as in Comparative Example 2, except that the argon gas supply rate was changed to 15 ml/min in standard conditions, and its dark electrical conductivity was measured to be 3.5 × 10 -9 Ω. -1 ·cm -1 , and the thermoelectromotive force measurement results confirmed that this film was a p-type semiconductor.

上記比較例2と実施例1〜3の結果は、原料ガ
スに対するアルゴンガスの供給比率の増大と共
に、弱n型半導体からi型半導体へ、更にp型半
導体へと変ることを示している。
The results of Comparative Example 2 and Examples 1 to 3 above show that as the supply ratio of argon gas to the raw material gas increases, the weak n-type semiconductor changes to an i-type semiconductor and then to a p-type semiconductor.

本発明の新規半導体は、その原料ガスに由来し
て、ダングリングボンドターミネーターとして珪
素原子に結合した弗素原子を含有するために、半
導体特性及び耐紫外線劣化性に優れ、これを使用
すると性能の優れた太陽電池が得られる。
The novel semiconductor of the present invention has excellent semiconductor characteristics and UV deterioration resistance because it contains fluorine atoms bonded to silicon atoms as dangling bond terminators derived from its raw material gas, and when used, it has excellent performance. A solar cell can be obtained.

太陽電池は、p型、i型及びn型の厚さ約1μ
の半導体膜をその順に接合することによつて得ら
れる。従つて、本発明の方法により、先ず、基板
上にp型半導体膜を生成させ、引き続きその上
に、製造条件を変えるのみで、i型の半導体を生
成させることができ、p型とi型の半導体膜の接
合したものが得られる。更に、この上に、n型半
導体生成原料ガス、例えば前記原料ガスにホスフ
インを混じたガスからプラズマCVD法を適用す
ることにより、n型半導体膜を生成させることが
でき、p型、i型及びn型半導体膜がその順に接
合したもの、即ち太陽電池が容易に得られる。
Solar cells are p-type, i-type, and n-type with a thickness of about 1μ.
is obtained by bonding semiconductor films in that order. Therefore, by the method of the present invention, it is possible to first form a p-type semiconductor film on a substrate, and then to form an i-type semiconductor thereon simply by changing the manufacturing conditions, and to form p-type and i-type semiconductors. A bonded semiconductor film is obtained. Further, by applying a plasma CVD method using an n-type semiconductor generation raw material gas, for example, a gas in which phosphine is mixed with the raw material gas, an n-type semiconductor film can be generated, and p-type, i-type and A device in which n-type semiconductor films are bonded in that order, that is, a solar cell can be easily obtained.

Claims (1)

【特許請求の範囲】[Claims] 1 金属インジウムからなるカソードと基板電極
を対置した反応室内に、四弗化珪素含有原料ガス
とスパツタリングガスを供給し、該両ガスの存在
下前記カソードと基板電極との間にグロー放電を
起こさせることを特徴とする珪素原子に結合した
弗素原子を含有しかつインジウムがドープされた
シリコン半導体の製法。
1 A raw material gas containing silicon tetrafluoride and a sputtering gas are supplied into a reaction chamber in which a cathode made of metallic indium and a substrate electrode are placed opposite each other, and a glow discharge is generated between the cathode and the substrate electrode in the presence of both gases. 1. A method for producing a silicon semiconductor doped with indium and containing fluorine atoms bonded to silicon atoms.
JP58020960A 1983-02-10 1983-02-10 Novel silicon semiconductor and manufacture thereof Granted JPS59147427A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58020960A JPS59147427A (en) 1983-02-10 1983-02-10 Novel silicon semiconductor and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58020960A JPS59147427A (en) 1983-02-10 1983-02-10 Novel silicon semiconductor and manufacture thereof

Publications (2)

Publication Number Publication Date
JPS59147427A JPS59147427A (en) 1984-08-23
JPH0351089B2 true JPH0351089B2 (en) 1991-08-05

Family

ID=12041739

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58020960A Granted JPS59147427A (en) 1983-02-10 1983-02-10 Novel silicon semiconductor and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS59147427A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56107551A (en) * 1980-01-30 1981-08-26 Fuji Photo Film Co Ltd Amorphous semiconductor having chemical modification
JPS57115558A (en) * 1981-01-09 1982-07-19 Canon Inc Photoconductive material

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56107551A (en) * 1980-01-30 1981-08-26 Fuji Photo Film Co Ltd Amorphous semiconductor having chemical modification
JPS57115558A (en) * 1981-01-09 1982-07-19 Canon Inc Photoconductive material

Also Published As

Publication number Publication date
JPS59147427A (en) 1984-08-23

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