JPH0346407A - Variable gain amplifier - Google Patents

Abstract

PURPOSE:To obtain a variable gain amplifier whose output phase is not inverted by providing a voltage limit circuit to a 3rd transistor(TR) pair which synthesizes outputs of 1st and 2nd TR pairs different in gain and controls the DC current to control the gain. CONSTITUTION:First and second TR pairs 9, 20 and 21, 22 are different in gain and collector signals in inverted relation are synthesized and outputted. Common base amplifiers 25, 26 are used as loads to the said TR pairs to improve the frequency characteristic. Moreover, 3rd TR pairs 23, 24 with a voltage control circuit limiting a DC current and a constant current source 9 are provided as the constant current source of the said TRs. Since one base potential is not lower than the other base potential with diodes 27, 28 of the voltage limit circuit, the gain control voltage is limited. Thus, the inversion of the output phase is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a variable gain amplifier, and more particularly to a variable gain amplifier that amplifies a multilevel baseband signal obtained by demodulating a modulated wave of a digital carrier transmission system.

[Conventional technology]

A variable gain amplifier that amplifies the multilevel baseband signal obtained by demodulating the modulated wave of the digital carrier transmission system requires constant gain from the DC component to the frequency corresponding to the band of the multilevel baseband signal. , -a are used with direct-coupled amplifiers.

FIG. 2 is a circuit diagram showing an example of a conventional variable gain amplifier.

In this figure, the demodulated multilevel baseband signal is
The signals are input to input terminals 14 and 15 as input signals having a phase difference of 180° from each other.

At this time, the input terminal 14 is connected to the collector of the transistor 5.
A signal of opposite phase appears to the input signal of the transistor, and a signal of positive phase appears to the collector of the transistor.

That is, transistors 5 and 6 operate as a differential amplifier with transistors 1.2 and 3.4 as loads, respectively.

Transistors 1 to 4 operate as four base-grounded amplifiers that receive the negative phase and positive phase signals appearing at the collectors of transistors 5 and 6, but in the configuration shown in this figure,
Since the collectors of transistors 1 and 3 and transistors 2 and 4 are connected to each other, the signals appearing at the output terminals 16 and 17 are opposite in phase to the signals appearing at the collectors of transistors 5 and 6.

This is the bottom of the phase signal.

Now, the bias voltage V1□ given to the gain control terminals 12 and 13, ■1.が■１□〉■１． , and considering the case where transistors 2 and 3 are cut off, no signal appears at the collector of transistor 2.3, and the output terminal 16
．． 17 is a transistor l.

The same signal that appears at the collector of transistor 5.4 is output, the gain being largely determined by the current flowing through resistors 7-9 and transistor 5.6.

Also, if VI□(v13) and transistors 1 and 4 are cut off, then transistor 2
．． The same signal that appears on the collector of 3 is output terminal 1.
6.17, and the amplitude gain is the same as when v1□〉■,3.

(-L7, VIt) V+3 and V, t(V, ff(
7), the amplitude of the output signal is the same in all cases, but the phase with respect to the input signal is 1.
They differ by 80 degrees. That is, when VIt>V's and the transistors 2 and 3 are cut off, the output signal of the output terminal 16 has a negative phase with respect to the input signal of the input terminal 14, and the output signal of the output terminal 17 has a positive phase.

Further, when the transistors 1 and 4 are cut off at V lt (V t

Furthermore, Vl! = VI3, and transistors l and 2
．． If the transistors 3 and 4 each have the same amplification factor, no signal appears at the output terminals 16 and 17 because the positive and negative phase signals cancel each other out, and the gain of the amplifier becomes infinitely small.

As described above, the conventional amplifier can change the gain from a finite gain to an infinitesimal gain by adjusting the potential difference between the bias voltages applied to the gain control terminal 12 and the terminal 13. It works as.

However, as mentioned above, V + t > V
The output phase is reversed in the case of I3 and ■1□(vlff, but this is due to the transistors 2, 3 or 1.4
Even if V l is not the cutoff, V l ! = V l
3, the output phase is inverted in the states of v1□>V, ff and VI□<vl.

Therefore, to avoid phase inversion, V+z≧
It is necessary to add a voltage limiting circuit to the gain control terminals 12 or 13 so that only one of the states VI I 3 or VIZ≦VI3 can be taken, but the gain control terminals 12 and 13
The change in gain and the phase inversion phenomenon with respect to the potential difference are caused by the pace emitter diode characteristics of the transistors 1 to 4, and therefore show a rapid change in response to a slight change in potential difference.

Therefore, the added voltage limiting circuit becomes large-scale and complicated, which is impractical.

[Problem to be solved by the invention]

As described above, conventional amplifiers can operate as variable gain amplifiers, but because the output phase is inverted depending on the bias voltage that determines the gain, variable gain amplifiers that amplify demodulated baseband signals of digital carrier transmission systems are not suitable. It is inappropriate as such.

An object of the present invention is to provide a variable gain amplifier which can be used as a variable gain amplifier for amplifying this type of baseband signal and which prevents output phase inversion.

[Means to solve the problem]

The variable gain amplifier of the present invention has mutually different gains,
and a first and second transistor pair that output collector signals having an opposite phase relationship, a common-base amplifier that acts as a load for these transistor pairs and improves frequency characteristics, and serves as a constant current source for each of the transistor pairs. a third transistor pair with a voltage limiting circuit that controls the value of the direct current;
It is equipped with a constant current source.

[Effect]

In this configuration, a difference occurs between the gains of the first and second transistor pairs, and a voltage limiting circuit that limits the gain control voltage causes the output phase to change to the gain side. Prevents inversion due to B voltage.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of the variable gain amplifier of the present invention. In the figure, numerals 19 and 20 are transistors each receiving a multilevel baseband signal and having an emitter resistor 29 and 30, which constitute a first transistor pair. Further, 21 and 22 input the same signal as the first transistor pair, and the emitter resistor 2
9. Emitter resistor 31. of a value different from 30. ．． 32, and these transistors constitute a second transistor pair. The collectors of each of the first and second transistor pairs cross-connect transistors 19, 20 and 21, 22, and output a collector composite output signal having an antiphase relationship with each other. Then, each collector has two transistors 2 that receive this composite output signal as input.
A common base amplifier consisting of 5.26 is connected. Furthermore, a third transistor pair consisting of transistors 23 and 24 is connected to the terminals of the first and second transistor pairs, respectively. This third transistor pair is configured as a constant current source with a voltage limiting circuit that prevents the base potential of one transistor from becoming lower than the base potential of the other transistor by means of voltage control diodes 27 and 28. moreover,
Each transistor 23.24 of this third transistor pair
A constant current source 9 is connected to the emitter of the constant current source 9 via resistors 33 and 34.

In addition, 37 is a constant voltage source, 38.39 is an input terminal, 40.
41 is an output terminal, 44 is a gain control terminal, 45 is a bias terminal, and I8 is a t source terminal.

In this configuration, the input signals input from the input terminals 38 and 39 are the signals input from the input terminal 39 and the signals input from the input terminal 39 are
It is assumed that the phase differs by 180° with respect to the signals of 8 and 8.

The input signals input from the input terminals 38 and 39 are amplified by the first pair of transistors (transistors 19 and 20) and the second pair of transistors (transistors 21 and 22), respectively. Since the collectors of the transistors 2o and 22 are connected, the emitters of the transistors 25 and 26 receive a signal obtained by combining the signals amplified by the first and second transistor pairs.

Transistors 25 and 26 improve the frequency characteristics of the amplifier and widen the band. That is, transistors 25 and 2
Since the input impedance including the emitters of transistors 6 and 6 is sufficiently low, the product of the combined collector capacitance of transistors 19 and 21 and transistors 20 and 21 and the input impedance of transistors 25 and 26 is
This is smaller than the product of the combined collector capacitance of transistors 20 and 21 and load resistances 42 and 43, making it possible to widen the band of the amplifier.

Now, the bias voltage V44 applied to the gain control terminal 44
is sufficiently higher than the voltage V3'F of the constant voltage source 37,
Since the voltage control diode 27 is equivalent to being open,
The bias voltage V44 is directly applied to the base of the transistor 23. On the other hand, the base voltage of the transistor 24 is independent of the voltage V44 of the gain control terminal 44.
If the operating voltage of the diode 28 is vo, is it V3? v
, becomes.

Therefore, when Va<>Vat VD and transistor 24 is cut off, no current flows through transistor 24 and no current flows through transistors 21 and 22, so the collector of the second transistor pair is open. be equivalent.

Therefore, the signal appearing at the output terminal 40.41 is the first
The signal is amplified by a gain approximately determined by the transistor pair, the emitter resistance 29.30, the load resistance 42.43, and the flowing current value. At this time, the output terminal 40 has an opposite phase with respect to the phase of the input signal at the input terminal 38.
The output terminal 41 becomes a positive phase signal.

Next, V44””Vff? When VD, equal currents flow through the transistors 23 and 24, so the first and second transistor pairs amplify the input signal with a gain determined by each emitter resistance, negative resistance, and flowing current, but as described above, Since the collectors of the transistors 19 and 21 and the transistors 20 and 22 are connected, the output terminals 40 and 41 have the first . A signal is obtained by combining the signals amplified by the second transistor pair.

At this time, if the emitter resistors 29, 30, 31. ! =R:l. If <Rff+=R3t, the gain of the first transistor pair becomes larger than the gain of the second transistor pair, and as a result, the gain of the difference between the gain of the first transistor pair and the gain of the second transistor pair is amplified. The resulting signals are output from output terminals 40 and 41.

In the above explanation, the rate of change in gain with respect to the voltage at the gain control terminal 44, that is, the gain control sensitivity, is
3.24 can be varied by the emitter resistance of the third transistor pair. Therefore, the sensitivity can be set to be sufficient to make the voltage limiting circuit work.

In addition, when the voltage 44 at the gain control terminal 44 further decreases to V 44 (V x 7 V D), the voltage limiting diode 27 becomes conductive, so the base potential of the transistor 23 becomes 'I''IT VD That is, the base potential of the transistor 24 is not lower than that of the base potential of the transistor 24.

Also, diodes 27 and 28 and transistors 23°24
Even if the current flowing through transistor 23 is slightly reduced by the current flowing through transistor 24 due to a mismatch in the characteristics of Unless the current flowing through the transistor 23 decreases to the extent that it becomes less than the gain of the second transistor pair, the output phase will not be inverted or the gain will not be infinitely small.

Generally, when transistors and diodes of the same standard are used, the above-mentioned mismatch in characteristics is so small that it can be ignored, so the output phase will not be reversed. Increasing,
When the circuit of the present invention is implemented as an LSI, the matching of each element becomes extremely good, so the phenomenon of phase inversion as described above does not occur.

The above explanation deals with the case where the gain of the first transistor pair is larger than the gain of the second transistor pair, but the essential point also applies to the case where the gain of the second transistor pair is larger than the first transistor pair. In general, there is no difference; the phase of the output signal is reversed, and the polarity of the voltage limiting diode can be reversed.

Further, in this embodiment, a positive power supply voltage is applied to the power supply terminal 18, but even if the power supply terminal 1 is grounded and the ground shown in FIG. The thing is clear.

[Effects of the Invention] As explained above, the present invention combines the outputs of the first transistor pair and the second transistor pair with different gains, improves the frequency characteristics with a common base amplifier, and Since a voltage limiting circuit is provided in the third transistor pair that can control the gain by controlling the direct current of the first and second transistor pairs, the gain can be changed without the output phase being reversed by the gain control voltage. A possible variable gain amplifier can be constructed. In addition, this configuration does not use a coupling capacitor or the like, and the circuit can basically be configured with transistors and resistors, so it is easy to form a monolithic IC, and the amplifier can be made smaller and more highly integrated.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2 is a circuit diagram of a conventional variable gain amplifier. 1 to 6...transistor, 7.8...resistance, 9...
・Constant current source, 10.11...Resistance, 12.13...
Gain control terminal, 14.15...Input terminal, 16.17
...Output terminal, 18...Power terminal, 19.20...
・Transistor (first transistor pair), 21.22
...Transistor (second transistor pair), 23.24...Transistor (common base amplifier),
25.26... Transistor (third transistor pair), 27 29-36 38 39 42 43 45... High 28... Voltage control diode,... Resistor, 37... Constant voltage source, ...Input terminal, 40.41...Output terminal, ...Load resistance, 44...Gain control terminal, As terminal. Diagram

Claims (1)

[Claims] 1. In a variable gain amplifier that amplifies a multilevel baseband signal obtained by demodulating a modulated wave of a digital carrier transmission system, a first transistor pair that receives a multilevel baseband signal as input and has an emitter resistance; a second transistor pair which receives the same signal as that of the first transistor pair and has an emitter resistance of a value different from that of the first transistor pair; and a collector output signal having a mutually opposite phase relationship between the first and second transistor pairs. two common base amplifiers receiving the composite signal synthesized by the first and second base amplifiers;
a third transistor pair that serves as a constant current source for the transistor pair and has a voltage limiting circuit that prevents the base potential of one from becoming lower than the base potential of the other, and supplies current to each transistor of the third transistor pair through a resistor. A variable gain amplifier comprising a constant current source.