JPH0327526A - Manufacture of semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To clean the surface of a lower wiring film to improve and stabilize contact with an upper wiring film by a method wherein when the upper wiring film is to be formed on an interlayer insulation film provided on the lower wiring film, a substrate is heated in vacuum and then etched. CONSTITUTION:A first layer of aluminum wiring 13 is formed on a silicon substrate 11, and low temperature oxide silicon films 14, 16 containing organic silicon compound 15 are formed thereon. Then a through hole 17 reaching the wiring 13 is formed on parts of the films 14, 16. At this time aluminum oxide 18 or etching reaction product 19 exists on the surface of the wiring 13. After the substrate is heated in vacuum to degas from the compound 15, it is etched to remove the oxide 18 and the product 13 to clean the surface of the wiring 13. Then a second layer of aluminum wiring 20 is formed. Thus contact between upper and lower wirings can be improved and stabilized while deterioration in wiring quality can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor integrated circuit device, and particularly to a method for manufacturing a semiconductor integrated circuit device having a multilayer wiring structure.

[Conventional technology]

2. Description of the Related Art In manufacturing large-scale semiconductor integrated circuits (LSI), a multilayer wiring structure is adopted due to the demand for high density and high speed. That is, after forming an interlayer insulating film on a first wiring metal film and forming an opening that will become a through hole in a part of this interlayer insulating film, a second wiring metal film is formed on the interlayer insulating film. Give form.

Thereafter, if necessary, interlayer insulating films and wiring metal films are alternately formed to form a multilayer wiring structure.

Usually, aluminum, aluminum alloy, or the like is often used for the wiring metal film, and silicon oxide, silicon nitride, or the like is often used for the interlayer insulating film. In addition, in the case of a multilayer wiring structure, for the purpose of planarization, an organic silicon compound such as a silica film is interposed between these insulating films, or an organic silicon compound such as silicon bolide is used in combination. There is.

By the way, in such a multilayer wiring structure, after forming an interlayer insulating film on the nth wiring and opening a through hole, when forming the n+1th wiring metal film, the gap between both wiring films is The following method is used to improve the open contact of ξ.

That is, first, by sputter etching in a vacuum, the oxide (formed by the reaction between the metal film and oxygen in the atmosphere) in the through hole on the surface of the nth wiring metal film and the through hole opening process are removed. , after removing reaction products adhering to the through-hole portion (those adhering during the through-hole etching process and not being removed during the subsequent resist removal process), the n+1
This method prevents the wiring metal film number L1 from getting stuck in sputtering.

In addition, in order to improve the coverage of the underlying step portion of the wiring metal film, the substrate force D is normally set to about 150" to 250°C immediately before sputtering, and in some cases even during sputtering.
Performing heat.

As described above, electrical connections between the multilayer wiring films are established by performing sputter etching → substrate heating → sputtering in the same vacuum.

[Problem to be solved by the invention]

However, in the conventional manufacturing method described above, especially when an organic silicon compound such as a silica film is sandwiched between an insulating film such as silicon oxide or silicon nitride as an interlayer insulating film,
Alternatively, if organic silicon compounds such as silicone solids are used together, gas generation from the through-hole openings may cause unstable contact between multilayer wiring films, or the wiring at the through-hole area may become unstable. There is a problem in that it may cause deterioration of the film.

In addition, when deterioration of the wiring film occurs in the through-hole area, if the organic silicon compound is on the top layer of the interlayer insulating film, gas is generated from the entire surface of the substrate, causing the wiring metal on the interlayer insulating film to There is also the problem that the adhesion of meditation becomes poor.

Here, it is presumed that the reason why the ohmic contact becomes unstable is that the gas generated from the organic silicon compound at the through-hole opening recombines with the wiring metal film at the through-hole area due to substrate heating immediately before sputtering. .

SUMMARY OF THE INVENTION An object of the present invention is to provide a manufacturing method that makes the open contact stable and good and prevents deterioration of the wiring film at the through-hole portion.

[Means to solve the problem]

In the manufacturing method of the present invention, when forming an upper (n+1) wiring film on an interlayer insulating film provided on a lower (n-th) wiring film, the semiconductor substrate is heated in a vacuum and then sputter etched. After that, the upper wiring film is formed.

[Effect]

In this manufacturing method, the substrate is heated to release gas before sputter etching, so the surface of the lower wiring can be kept clean after sputter etching, and good contact with the upper wiring can be achieved.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to (C) are cross-sectional views showing the first embodiment of the present invention in the order of manufacturing steps. An example is shown. Further, here, a case of a two-layer wiring structure (n-1) is shown.

First, in FIG. 1(a), 11 is a silicon substrate;
2 is, for example, oxidized silicon IJ formed by thermal oxidation, 1
3 is the first layer wiring, which is argonium wiring here. First, low-temperature silicon oxide 14 is formed thereon by plasma chemical vapor deposition or bias sputtering, and an organic silicon compound 15 such as a silica film is applied, followed by heat treatment and planarization. At this time, etching back is also performed if necessary. After that, low-temperature silicon oxide layer 1 is placed on top of this again.
6 is formed to form an interlayer insulating film.

Here, the low-temperature silicon oxide 14, 16 may be low-temperature silicon nitride or low-temperature silicon oxynitride produced by a plasma chemical vapor deposition method.

Next, as shown in FIG. 1(b), a through hole 17 is opened in the interlayer insulating film by a photolithography process. Here, examples are shown in which openings are formed by isotropic etching and anisotropic etching. At this time, the surface of the first layer aluminum wiring l3 reacts with oxygen in the atmosphere and becomes aluminum oxide l8. Furthermore, when reactive ion etching is used to open through-holes, the resist and etching gas react and reaction products 19 such as fluorinated polymers adhere to the periphery of the through-holes, resulting in complete removal of the resist during the resist removal process. It remains in a state where it cannot be removed completely.

Next, as shown in FIG. 1(c), before sputtering the wiring layer 11 of the second layer 11, the substrate is first heated in a vacuum chamber to raise the substrate temperature to 150°C or more.
The temperature is kept at about 200"C for several minutes. Gas is then vented from the organic silicon compound 15 at the through-hole opening 17. Next, after evacuating the inside of the chamber, an inert gas such as argon is introduced. 2mTorr~6m
Sputter etching is performed by high-frequency discharge under a pressure of Torr to remove the aluminum oxide 18 and reactive substances 19 in the through-hole opening 17.

Next, after evacuating the inside of the chamber, inert gas such as argon is introduced again, and the temperature is 2 to 10 mTor.
The aluminum film 20 as a second layer wiring metal film is deposited by sputtering by discharging under a pressure of approximately r. At this time, in order to improve the degree of coverage at the base step, the substrate is heated again just before sputtering, if necessary, to bring the substrate temperature to about 150°C to 250°C.

Although this example shows an example in which the substrate heating for the initial gas release, sputter etching, and sputtering are performed in the same chamber, they may also be performed in different chambers with independent exhaust devices. good. Further, the first substrate heating for gas release may be performed in an inert gas atmosphere in a chamber for sputter etching, for example, but gas release is more effective when performed in a vacuum. In this way, since the substrate is first heated and gas is sufficiently released, the surface of the first layer aluminum wiring 13 in the through hole portion is kept clean after sputter etching, and as a result, a stable oak contact can be obtained. In addition, gas is no longer released from the organic silicon compound in the through-hole portion during heat treatment in a post-process, and deterioration of the wiring film due to this can be prevented.

Note that if the amount of reactive substances 19 is large, it cannot be completely removed by spasota etching, so when opening a through hole using reactive ion etching, conditions must be set to suppress the reactive substances as much as possible. Must be optimized.

In addition, in the case of multilayer wiring (n≧2) with three or more layers of wiring, after further interlayer insulation film formation, through hole 1; .

As described above, O≧Tsuku contact 1~ is good,
Moreover, it is possible to form a multilayer wiring without deterioration of the wiring film at the through-hole portion.

FIGS. 2(a) to 2() are cross-sectional views showing the second embodiment of the present invention in the order of steps, in which two layers of an organic silicon compound such as silicon polyimide and silicon oxynitride are used as the interlayer insulating film. Moreover, the case where it is applied to a three-layer wiring structure (n=2) is shown.

First, as shown in FIG. 2(a), a second layer aluminum wiring 20 is formed in exactly the same manner as in the first embodiment, and then low-temperature silicon oxynitride 21 is deposited thereon by a plasma chemical vapor deposition method. An organic silicon compound 22 that can be formed into a thick film, such as silicon polyimide, is coated and heat treated to planarize the structure and form an interlayer insulating film.

Here, the low-temperature silicon oxynitride 21 may be low-temperature silicon nitride produced by a plasma chemical vapor deposition method, or low-temperature silicon oxide produced by the same method or a high-ass sputtering method.

Next, as shown in FIG. 2(b), a through hole 23 is opened in the interlayer insulating film through a photolithography process. Here, an example is shown in which the etching mask is made of low-temperature silicon oxynitride or the like, and openings are formed in two stages by isotropic etching and anisotropic etching. Note that the low-temperature silicon oxynitride of the mask is removed in the second stage of etching.

Also, the surface of the second layer aluminum wiring 20 is made of aluminum oxide 24, as in the first embodiment, but in this embodiment, a resist is used as an etching mask when opening the through hole. Since no chemical substances are used, almost no reaction products are generated as in the first embodiment.

Next, as shown in FIG. 2(c), a titanium/platinum film 25 is deposited as a third layer wiring metal film by heating the substrate, sputter etching, and sputtering in the same manner as in the first embodiment. In this case, since the organic silicon compound 22 such as silicon polyimide is exposed over the entire surface of the substrate, it is necessary to heat the substrate sufficiently for gas release. In addition, in order to stabilize the film quality of the deposited metal, substrate heating, sputter etching,
It is preferable to perform sputtering in different chambers, each with its own exhaust system. The sputter etching and sputtering methods are exactly the same as in the first embodiment.

After this, gold 26 is plated on the titanium/platinum film 25 by, for example, a plating method, and reactive ion etching or ion noble ring is performed using this as a mask to form the third layer titanium/platinum/gold wiring 27. .

In the manner described above, it is possible to form a multilayer interconnection with good open contact and no deterioration of the interconnection film at the through-hole portion.

〔Effect of the invention〕

As explained above, the present invention provides interlayer! ! ! ! When forming the upper wiring film on the edge film, sputter etching is performed after heating the semiconductor substrate in vacuum, and then the upper wiring film is formed, so the lower wiring film is formed after sputter etching. To manufacture a semiconductor integrated circuit device with high yield and reliability by keeping the surface clean, making stable and good contact with the upper wiring, and preventing deterioration of the wiring film at the through-hole part. Can be done.

[Brief explanation of drawings]

FIGS. 1(a) to (C) are cross-sectional views showing the first embodiment of the present invention in the order of manufacturing steps, and FIGS. 2(a) to (C) are cross-sectional views showing the second embodiment of the present invention in the order of the manufacturing steps. It is a diagram. 11...Silicon substrate, l2...Silicon oxide, 1
3...First layer aluminum wiring, l4...Low temperature oxidation 1L l2 silicon, 15...Organic silicon compound, 16...
Low temperature silicon oxide, 17...Through hole, 18...
・Aluminum oxide, 19...Reactive substance, 20・
...Layer aluminum ξ wiring, 2l...Low temperature silicon oxynitride, 22...Organic silicon compound, 23...Through hole, 24...Aluminum oxide, 25...
・Titanium/platinum film, 26...Plated gold, 27...Third layer titanium/platinum/gold wiring. 13 -185-

Claims (1)

[Claims] 1. After forming the nth wiring on the semiconductor substrate, forming an insulating film containing at least one layer of an organic silicon compound on this wiring as an interlayer insulating film, and forming a part of this interlayer insulating film. forming an opening reaching the surface of the n-th wiring; and forming an (n+1)th wiring film electrically connected to the n-th wiring on the interlayer insulating film including the opening. When forming the n+1th wiring film, the semiconductor substrate is heated in a vacuum and then sputter etching is performed, and then the n+1th wiring film is formed. manufacturing method.