JPH03209776A - Semiconductor element - Google Patents

Abstract

PURPOSE:To make a semiconductor element hardly destroyable by heat so as to obviate the need of an externally fitted diode to be connected in parallel between the drain and source of the MOSFET and incorporate peripheral circuits in the same chip by using the surface of a P-type semiconductor between an extension drain area and source contact area as a channel area and providing a gate electrode on a gate oxide film formed on the channel area. CONSTITUTION:An extension drain area 10 is formed adjacently to a drain contact area 11 between a source contact area 7 and the area 11 and the surface of a P-type semiconductor substrate 9 between the areas 10 and 7 is used as a channel area 6. Then a P-type area 12, the concentration of which is higher than that of the P-type semiconductor substrate, is formed between the area 11 and substrate 9 and the joined surface of the drain contact area 11 with the high-concentration P-type area 12 is made flat. Therefore, the yield strength obtained when a transmission voltage is applied across the drain and source of this MOSFET decides the concentration of the high-concentration P-type area 12.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device that can be used as a power device for an igniter.

[Prior Art] Currently, a bipolar type Darlington transistor with a built-in diode is mainly used as a power element for an igniter.

Incidentally, a conventional bipolar type Darlington transistor is shown in FIG. That is, FIG. 3(a) is an example using a bipolar transistor, and FIG. 3(b) is an example using a MOS.
This is an example using FET. 3(a) and (b), 13 is a transformer, 14 is a diode (with built-in bipolar transistor), 15 is a bipolar transistor, 16 is a power transistor drive circuit, 17
indicates the ignition point. 18 is an external diode, 1
9 is a MOSFET (metal-oxide semiconductor field effect transistor), 20 is a MOSFET drive circuit,
21 indicates a firing point, and 22 indicates a transformer.

Next, the operation of the prior art will be explained.

As shown in FIG. 3(a), when the power element stopped, the built-in diode broke down and released the energy stored in the primary side of the transformer. In some cases, a MOSFET is used instead of the bipolar type Darlington transistor shown in 32 above, but a diode is connected between the drain and source as shown in Figure 3(b) to prevent breakdown between the drain and source. They are used in parallel connection.

[Problems to be Solved by the Invention] However, with the above-mentioned conventional technology, in the case of bipolar transistors, there is a risk of thermal runaway when the transistor chip becomes high temperature, and although it is not suitable as an electrical component that requires high reliability. The problem is that there is no.

Further, in the case of MOSFET, an external diode is required, resulting in an increase in the number of components.

Furthermore, bipolar Darlington transistors also use MOSFETs, especially the currently used vertical MO3
With FETs, it is difficult to integrate peripheral circuits, and in addition, it is difficult to provide these elements with functions such as overcurrent detection and temperature detection.

In order to solve the problems of the prior art described above, the present invention provides a semiconductor element that is less likely to be destroyed by heat, and a MOSFET.
The purpose of the present invention is to provide a semiconductor element that does not require an external diode to be connected in parallel between the drain and source of the MOSFET, and that allows peripheral circuits to be built into the same chip, making it easy to realize higher functionality of MOSFETs. shall be.

[Means for Solving the Problems] In order to achieve the above object, the present invention has the following configuration. That is, in the present invention, an extended drain region is provided between the source contact region and the drain contact region of a lateral N-channel MOSFET in contact with the drain contact region, and an extended drain region is provided between the drain contact region and the P-type semiconductor substrate. A highly doped P-type head region is provided, the P-type semiconductor surface between the extended drain region and the source contact region is used as a channel region, a gate oxide film is provided on this channel region, and a gate electrode is provided on the gate oxide film. This is a semiconductor device characterized by being provided with. [Function] According to the configuration of the present invention described above, a diode consisting of a highly doped P-type region on the drain contact region exists between the drain and source of the MOSFET, and when a reverse voltage is applied between the drain and source, this diode The junction of this diode is flat and the vertical M
Unlike OSFET, it causes bipolar operation when it breaks down and is less susceptible to thermal damage.
There is no need for an external diode connected in parallel between the drain and source of the OSFET. In addition, since the P-type semiconductor substrate is grounded, it is possible to create eight CMO circuits on the same substrate, so peripheral circuits can be built into the same chip, and MOS
High functionality of the FET can be easily achieved.

[Example] The present invention will be described in more detail below using an example. Note that the present invention is not limited to the following example.

FIG. 1 is a sectional view showing one embodiment of the semiconductor device of the present invention. In FIG. 1, 1 is a source terminal, 2 is a gate terminal, 3 is a drain terminal, 4 is a silicon oxide film, 5 is a gate oxide film (for example, polycrystalline silicon), 6 is a channel portion, 7 is a source contact region, 8 1 is a contact region with the substrate, 9 is a P-type semiconductor substrate, 10 is an extended drain region, 11 is a drain contact region, and 12 is a P-type head region having a higher concentration than the substrate.

Next, the operation of one embodiment of the semiconductor device of the present invention having the above configuration will be described.

As shown in FIG. 1, a horizontal N-channel MO is mounted on a P-type substrate 9.
Form an SFET. In order to achieve high breakdown voltage, this lateral N08FET has an extended drain region 10 formed between the source contact region 7 and the drain contact region 11 in contact with the drain contact region, and a P-type semiconductor substrate between the extended drain region 10 and the source contact region 7. The surface is defined as a channel region 6. Then, drain contact region 11 and P
P type semiconductor substrate 9 has a higher concentration of P than the P type semiconductor substrate.
A type head region 12 is formed, and the junction surface between the drain contact region 11 and the high concentration P type head region 12 is flat, and this MOS
The concentration of the high concentration P-type head region 12 is determined so that the breakdown when a transmission voltage is applied between the drain and source of the FET is exceeded at the above junction.

Next, FIG. 2 will be explained.

FIG. 2 shows a cross section of a semiconductor device in which a MOSFET and a CMO3 circuit according to the present invention are formed on the same substrate within one chip.

59 indicates a CMOS channel transistor, where 23 is a drain terminal, 24 is a gate terminal, 25 is a source terminal, 26 is a drain electrode, 27 is a source electrode, 28 is polycrystalline silicon for the gate, 29 is a drain region, and 30 is a The source region 31 indicates a contact region with the substrate.

60 indicates a CMO8P channel transistor, where 32 is a drain terminal, 33 is a gate terminal, 34 is a source terminal, 35 is a drain electrode, 3-6 is a source electrode, 37
is polycrystalline silicon for gate, 38 is drain region, 39
40 is a source region, 40 is an N-well region, 62 is a contact region with the N-well, and 41 is a silicon oxide film.

61 indicates a horizontal N-channel high voltage MOSFET, where 42.46 is a source terminal, 43.45 is a gate terminal, 44 is a drain terminal, 47.49 is a source electrode, and 48
are drain electrodes, 5o and 57 are contact regions with the substrate, 51.56 are source regions, 52.55 are extended drain regions, 53 are drain contact regions, 54 are P-type head regions with higher concentration than the substrate, 58 indicates a P-type semiconductor substrate.

Next, the operation of FIG. 2 will be explained.

The concentration of the P-type head region in contact with the drain contact region is set to 6.
By setting it as 5×10 14 cm', the breakdown voltage of the diode between the drain and the substrate was 380V. ,Also,
The concentration of the P-type semiconductor substrate was 3×10 14 am′, and the length of the extended drain region (distance 1 from the end of the drain contact region to the end of the channel region) was 20 μm. MOSF
The ON resistance of ET was 0.2Ω. Furthermore, by incorporating the 0M08 circuit into the same substrate, an overcurrent detection circuit, an overheating protection circuit, and a logic circuit for stopping the power MOSFET in the event of an abnormality were created on the same chip.

According to the above embodiment, a diode consisting of a drain contact region 11 and a heavily doped P-type head region 12 exists between the drain and source of the MOSFET, and when a reverse voltage is applied between the drain and source, this diode breaks down. Therefore, the junction of this diode is flat, and the vertical type M
Unlike OSFET, it causes bipolar operation when it breaks down and is less susceptible to thermal damage.
There is no need for an external diode connected in parallel between the drain and source of the OSFET. Also, the P-type semiconductor substrate 9
Since it is grounded, a 0M08 circuit can be created on the same board, so peripheral circuits can be built into the same chip, and MO
High functionality of SFET can be easily realized.

[Effects of the Invention] The semiconductor element of the present invention described above has resistance to thermal breakdown (<,
In addition, as a power element for the igniter, MOSFET can be used without using any external parts, which not only improves reliability, but also has the special effect of being able to easily incorporate the 0M08 circuit on the same chip, increasing functionality. can be achieved.

[Brief explanation of drawings]

FIG. 1 is a sectional view of a MOSFET according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view of a MOSFET according to an embodiment of the present invention.
and 0M08 circuit formed on the same substrate. Figure 3 is a circuit diagram schematically showing a conventional igniter circuit, and Figure 3 (a) is an example using a bipolar transistor. , FIG. 3(b) is an example using MOSFET. DESCRIPTION OF SYMBOLS 1... Source terminal, 2... Gate terminal, 3... Drain terminal, 4... Silicon oxide film, 5... Gate oxide film, 6... Channel region, 7... Source contact Region 8...Collect region with substrate, 9...P-type semiconductor substrate, 10...Extended drain region, 11...
Drain contact region, 12... P-type head region, 59.
...CMOS channel transistor, 60...CM
O8P channel transistor, 61...horizontal N-channel high voltage MOFET0

Claims (1)

[Claims] (1) An extended drain region is provided between the source contact region and the drain contact region of the lateral N-channel MOSFET in contact with the drain contact region, and a height higher than the P-type semiconductor substrate is provided between the drain contact region and the P-type semiconductor substrate. A P-type region with a high concentration is provided, the P-type semiconductor surface between the extended drain region and the source contact region is used as a channel region, a gate oxide film is provided on the channel region, and a gate electrode is provided on the gate oxide film. A semiconductor device characterized by: