JPH03194658A - Logical circuit diagram input/output device - Google Patents

Abstract

PURPOSE:To efficiently add and alter information on the prescribed form of a symbol by providing a cell library file, a net list file, a form information generation means, a logical circuit diagram generation means and a logical circuit diagram editing means. CONSTITUTION:The form information generation means 10c obtains information on the graphic of the symbol stored in the cell library file 11, calculates the coordinate of a connectable part on the prescribed form and automatically generates information on the prescribed form showing the size of the symbol required for the generation of a logical circuit diagram and the position of the connectable part of the symbol. Then, the logical circuit diagram generation means 10b automatically generates the logical circuit diagram based on information on the net list stored in the net list file 12, the prescribed form showing the size of the symbol and the position of the connectable part of the symbol. The logical circuit diagram, editing means 10a edits the generated logical circuit diagram.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a system for automatically drawing a logic circuit diagram, and relates to a logic circuit diagram that automatically generates a logic circuit diagram using a predetermined shape representing the size of a symbol. It is related to input/output devices.

[Conventional technology]

Conventionally, various methods have been proposed for automatic logic circuit diagram generation systems.
It is described in Japanese Patent Application Laid-Open No. 60-205672, etc. Normally, in automatic logic circuit diagram generation systems,
When automatically placing and routing symbols, the placement and routing process is performed using a predetermined shape that represents the size of the symbol, but in conventional systems, information about the shape of the symbol is always held in the automatic logic circuit diagram generation system and processing is performed. Ta. Also,
The predetermined shape has usually been created manually.

[Problem to be solved by the invention]

In the above configuration, when the information regarding the shape of the symbol used when outputting a drawing is changed, the information regarding the predetermined shape of the symbol must also be changed to correspond to that information, which creates a complicated task of associating information. The problem was that it had to be done.

Furthermore, since the information regarding the predetermined shape of the symbol is input manually, there is a problem in that incorrect information may be input.

An object of the present invention is to create a logic circuit diagram that can automatically create information regarding a predetermined shape of a symbol used in creating a logic circuit diagram, and eliminate the need for associating symbol shapes with their corresponding predetermined shapes. The purpose is to provide a graphic input/output device.

[Means to solve the problem]

The logic circuit diagram input/output device according to claim fil includes a cell library file storing a cell library representing graphical information of symbols used in the logic circuit diagram, and a netlist storing a netlist representing connection information of the logic circuit. a file, a shape information creation means for creating a predetermined shape representing the size of the symbol and information on the position of a connectable part of the symbol from information regarding the shape of the symbol stored in the cell library file; and the netlist and the symbol. logic circuit diagram generation means for generating a logic circuit diagram using a predetermined shape representing the size of the symbol and information on the position of connectable points of the symbol; and a logic circuit diagram editing means for editing a logic circuit diagram configured using the logic circuit diagram.

The logic circuit diagram input/output device according to claim (2) is defined in claim +
1) A first function in which the shape information creation means extracts symbols from a cell library file storing a cell library representing graphic information of symbols used in a logic circuit diagram; and a symbol extracted by the first function. a second function that extracts figure data from the figure; a third function that calculates the size of a rectangle circumscribing the figure from the figure data extracted by the second function; a fourth function that registers the size of the rectangle extracted by the second function; a fifth function that calculates the coordinates of a connectable location of the symbol from the graphic data extracted by the second function; and a sixth function of registering the coordinates of the connectable points of the symbols.

[For production]

According to the configuration of this invention, the shape information creation means
A logic circuit diagram can be created by determining a predetermined shape that includes a symbol from information about the symbol's shape, such as the size and relative coordinates of the symbol's shape stored in a cell library file, and by calculating the coordinates of connectable points on the predetermined shape. A predetermined shape representing the size of the symbol required for generation and information on the position of the symbol's connectable parts are automatically created. Then, a logic circuit diagram is automatically generated by the logic circuit diagram generation means based on the netlist stored in the netlist file, a predetermined shape representing the size of the symbol, and information on the position of the connectable part of the symbol. .

Further, the logic circuit diagram generated by the logic circuit diagram generation means is edited by the logic circuit diagram editing means into a logic circuit diagram configured using symbols.

At this time, the shape information creation means extracts a symbol from the cell library file, extracts its shape data from the extracted symbol, and further calculates the size of a rectangle circumscribing the shape from the shape data and registers it. . Additionally, the coordinates of the connectable locations of the symbols are calculated and registered. As a result, a predetermined shape representing the size of the symbol used in the automatic logic circuit diagram generation process and the position where it should be connected to the outside, that is, the position of the connectable part, are determined from the information regarding the shape of the symbol used in the logic circuit diagram. It becomes possible to automatically generate information.

By doing the above, a logic circuit diagram can be generated by automatically creating information on the predetermined shape indicating the size of the symbol used for creating the logic circuit diagram and the position of the symbol's connectable parts. .

As a result, there is no need to make new correspondence between the information regarding the figure of the symbol itself and the information about the predetermined shape representing the size of the symbol. Furthermore, by eliminating the need to manually input information representing the predetermined shape of the symbol, it is possible to efficiently add or change information regarding the predetermined shape of the symbol.

〔Example〕

FIG. 1 is a block diagram showing the configuration of a logic circuit input/output device according to an embodiment of the present invention. In FIG. 1, 11 is a cell library file that stores a cell library that shows information such as the graphic 2 function of symbols used in the logic circuit diagram, and 12 is a netlist that shows information that shows the connection relationships of symbols in the logic circuit. A netlist file 13 stores a logic circuit diagram, and a logic circuit diagram file 13 stores a logic circuit diagram.

17 is a CPU, and 10 is a ROM containing programs necessary for processing by the CPU 17. As a program built into this ROM10, for example, logic circuit diagram file 1
The logic circuit diagram stored in 3 is saved in cell library file 1.
The graphical information of the cell library symbols stored in the cell library 1 can be displayed on the CRT display 14, and the logic circuit diagram corrected with the input device 16 can be displayed in the logic circuit diagram file 13.
It is possible to connect the logic circuit diagram editing processing program IOa (constituting the logic circuit diagram editing means) stored in A logic circuit diagram generation processing program (configuring logic circuit diagram generation means) 10b that generates a logic circuit diagram based on location information and stores it in the logic circuit diagram file 13, and a cell library file l! The predetermined shape of the symbol (
For example, it consists of a shape information creation processing program (constituting shape information creation means) IOc that creates information on the position of a connectable part of the symbol (rectangle containing the symbol) and the position of the connectable part of the symbol.

In this logic circuit diagram input/output device, a cell library file 11 is created by a shape information creation program 10c.
By determining the predetermined shape that includes the symbol from the size and relative coordinates of the graphical information of the symbol stored in , and by calculating the coordinates of connectable points on the predetermined shape, the size of the symbol necessary for generating a logic circuit diagram can be calculated. automatically creates information on the predetermined shape representing the symbol and the position of the connectable part (terminal) of the symbol. Then, the logic circuit diagram generation processing program 10b automatically generates a logic circuit diagram based on the netlist stored in the netlist file 12, a predetermined shape representing the size of the symbol, and information on the position of the connectable part of the symbol. generated. Further, by the logic circuit diagram editing processing program loa, the logic circuit diagram generated by the logic circuit diagram generation processing program 10b is edited into a logic circuit diagram configured using symbols.

Note that the CPU 17 can also output the logic circuit diagram etc. stored in the logic circuit diagram file 13 through the printer 15 according to a command from the input device 16. Further, the temporary file 18 is a working file necessary for the processing of the CPU 17, and the RAM 19 is a working RAM necessary for the processing of the CPU 17.

FIG. 2 is an example of symbol graphic information stored in the cell library file 11. This figure information is usually stored in a logic circuit diagram editing system (Schemata Ink Editor)
etc.

20 to 22 in the figure are symbols (in the figure, two-man NAND
) is a figure representing the terminal. As shown in Figure 2, the shape of the symbol is given orthogonal coordinates with X in the horizontal direction and y in the vertical direction, and the reference point within the symbol (for example, the input terminal with the minimum center coordinate; in this example, , terminal 21) as the origin.

FIG. 3 is an example of a predetermined shape corresponding to the symbol shown in FIG. In FIG. 3, the predetermined shape 30 is the smallest rectangle that includes the symbol 31, and the size of the rectangle is given by the coordinates of each vertex of the rectangle. However, the position of the terminal is the center coordinate of the figure representing the terminal.

Table 1 is an example of a netlist representing the data of the predetermined shape of the symbol and the position of the terminal stored in the temporary file 18. In this example, the symbol size (i.e. 5ize) and the input terminal position [i.e. 1n(i), 1n(ia)] as shown in FIG.
)) and the position of the output terminal [i.e. out(o)
) are shown in the above-mentioned relative coordinates. However, the size is indicated by a pair of minimum and maximum coordinates of the vertices of a rectangle circumscribing the symbol.

(Margins below) Table 1 Next, using the shape information creation processing program 10c,
The procedure for creating data in a predetermined shape as shown in Table 1 from the symbols shown in FIG. 2 will be explained.

[1] First, the logic circuit diagram generation processing program Jo is created from the cell library file 11 that stores symbol information.
Select the symbols that need to be created in a predetermined shape (in this example, a rectangle) representing the required symbol size in b, and determine the creation order. 0 The creation order can be any order. However, this example uses alphavent order for ease of processing. In addition to the symbols necessary for processing, the cell library file 11
A predetermined shape may be created that represents the size of all the symbols present in the image.

[2] According to the order of symbols determined in (1) above,
The size of the rectangle occupied by each symbol when placed in the logic circuit diagram is determined.

(1) First, the coordinates representing the smallest rectangle containing the symbol are calculated from the relative coordinate values included in the graphic information of the symbol stored in the cell library file 11.

(2) From the relative coordinates of the rectangle of the symbol obtained in the above (1), select a set of relative coordinates of vertices (for example, A11 of the apex with the minimum coordinate and maximum coordinate) that allows the rectangle to be specified.

(3) Convert the relative coordinates obtained from (1) to (2) above into a coordinate system used by the logic circuit diagram generation processing program 10b, and store it in the RAM 19.

[3] Find the position on the rectangle of the terminal of each symbol when arranging it in the logic circuit diagram according to the order of the symbols determined in [1] above.

(1) First, information regarding the graphics of all terminals is extracted from the symbol, and the following processing is performed for each terminal.

(2) Find the smallest rectangle that encloses the terminal from the information regarding the shape of the terminal, and calculate the relative coordinates of the rectangle.

(3) Find the coordinates of the center of the rectangle from the relative coordinates of the rectangle obtained in (2) above.

(4) Convert the relative coordinates of the terminal obtained from steps 111 to (3) above into a coordinate system used by the logic circuit diagram generation processing program 10b, and store it in the RAM 19.

[4] Output the symbol and terminal coordinates obtained in [1] to [3] above to the temporary file 18 in the format shown in Table 1.

By executing steps [1] to [4] above, the predetermined shape of the symbol used in the logical port JI diagram automatic generation system and the position of the connectable part of the symbol are determined. Further, the above steps are performed by the shape information creation processing program 10c stored in the ROM10.

FIG. 4 is a flowchart showing the processing flow of the shape information creation processing program 10c for creating a predetermined shape.

First, symbols for creating a predetermined shape are extracted from the cell library file 11 (processing 51).

Next, the symbols are rearranged in alphabetical order (process 52). It is determined whether or not the predetermined shape creation of all symbols has been completed (step 53), and if it has been completed, the process ends. If not, process 5 to extract data related to the shape of the symbol from the cell library file 11.
4) Find the size of the smallest rectangle containing the symbol from the relative coordinates of the graphic data of the symbol (process 55), and find the pair of coordinates of the upper left and lower right of the rectangle (process 56).
, convert the coordinates to the coordinate system used by the logic circuit diagram generation processing program 10b57), RAMI
9 (processing 58).

Next, process 59) to extract all graphic data of the terminals of the symbol, process 60) to determine whether coordinate calculation processing has been completed for all terminals, and if not, extract the terminal from the terminal graphic data. Process to extract the coordinates of the rectangle included 61), process to calculate the coordinates of the center of the rectangle 62), process to convert the coordinates to the coordinate system used in the logic circuit diagram generation processing program 10b 63), and store in the RAM 19. Register (process 64).

If the coordinate calculation process for all terminals has been completed, the size of the symbol registered in process 58 and process 6
The terminal position and symbol name registered in step 4 are written to the temporary file 18 (process 65).

+, and after performing the above processing for all symbols, the processing ends.

By performing the above-described processing, it is possible to automatically generate information regarding the predetermined shapes of symbols used in creating a logic circuit diagram, thereby generating a logic circuit diagram. As a result, there is no need to re-correlate information on the shape of the symbol itself with information on the predetermined shape representing the size of the symbol, and the work of manually inputting information representing the predetermined shape of the symbol is eliminated. Information on a predetermined shape of a symbol can be added or changed efficiently.

〔Effect of the invention〕

According to the logic circuit diagram input/output device of the present invention, the shape information creation means determines a predetermined shape indicating the size of the symbol from the information regarding the shape of the symbol stored in the cell library file, and also enables connection on the predetermined shape. Since the positions of the parts are calculated, it is possible to automatically create information on the predetermined shape representing the size of the symbol necessary for generating the logic circuit diagram and the position of the connectable parts of the symbol.

In addition, information on the predetermined shape representing the size of the symbol necessary for generating a logic circuit diagram and the position of the symbol's connectable parts can be automatically created. To efficiently add or change information on a predetermined shape of a symbol by eliminating the need to make a new correspondence with the information on the predetermined shape represented, and eliminating the work of manually inputting information representing the predetermined shape of the symbol. I can do it.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a logic circuit input/output device according to an embodiment of the present invention, FIG. 2 is a diagram showing an example of a symbol shape, and FIG. 3 is a diagram showing an example of a predetermined shape of a symbol. , FIG. 4 is a flowchart of a process for determining a predetermined shape of a symbol. lO...ROM, 10a...Logic circuit diagram editing processing program (logic circuit diagram editing means), 10b...Logic circuit diagram generation processing program (logic circuit diagram generation means), 10
c... shape information creation processing program (shape information creation means), 11... cell library file, 12...
Netlist file, 13...Logic circuit diagram file, 14...Printer, 15...CRT display, 16...Input device, 17...CPU, 18...
Temporary File 11 Figure 3 1]b Figure Figure 1

Claims (2)

[Claims] (1) A cell library file that stores a cell library that represents graphical information of symbols used in a logic circuit diagram, a netlist file that stores a netlist that represents connection information of logic circuits, and a shape information creation means for creating a predetermined shape representing the size of the symbol and information on the positions of connectable parts of the symbol from information regarding the shape of the symbol; a logic circuit diagram generation unit that generates a logic circuit diagram using information on the positions of connectable points; and a logic circuit diagram obtained by the logic circuit diagram generation unit, which is edited into a logic circuit diagram configured using symbols. A logic circuit diagram input/output device comprising a logic circuit diagram editing means. (2) The shape information creation means has a first function of extracting symbols from a cell library file storing a cell library representing graphic information of symbols used in a logic circuit diagram; a second function that extracts figure data from the symbol extracted by the second function; a third function that calculates the size of a rectangle circumscribing the figure from the figure data extracted by the second function; a fourth function that registers the size of the calculated rectangle; a fifth function that calculates the coordinates of a connectable location of the symbol from the graphic data extracted by the second function; The logic circuit diagram input/output device according to claim 1, further comprising a sixth function of registering the coordinates of the calculated symbol connectable locations.