JPH03173131A - Manufacturing method of semiconductor device - Google Patents

Abstract

PURPOSE:To restrain a crystal defect of a semiconductor element from being produced by a method wherein a high-concentration diffusion layer of impurities forming a second conductivity type or a semiconductor layer containing impurities is formed, as a getter layer, on a second main face on the opposite side of a semiconductor substrate. CONSTITUTION:A thermal oxide film 2 is formed on an n-type Si wafer 1 in an atmosphere. In a state that the surface of the wafer is covered with a photoresist, the wafer is treated with an HF-based etchant; the oxide film on the rear side of the wafer is removed. In succession, boron is deposited and diffused; a boron silicide layer 7 and a high-concentration diffusion layer 8 are formed on the rear of the wafer. After B has been diffused to the rear of the wafer, a window is opened in one part of the oxide film 2 on the surface by using a photoresist mask 3; ions of boron are implanted through an opening part 4; a p-type impurity deposition layer 5 is formed. Then, the photoresist mask 3 is removed by a plasma ashing method and an ozone sulfuric acid method. The layer is etched and cleaned; a well region 6 is formed by a diffusion treatment in an oxidizing atmosphere.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a technology for suppressing crystal defects in a semiconductor substrate.

[Conventional technology]

The manufacturing process of semiconductor elements such as transistors and ICs is
It consists of a combination of various processes such as oxidation treatment at the semiconductor wafer stage, etching using a photoresist process, impurity ion implantation, and further diffusion treatment.

For example, in the manufacture of power MO3FETs, a conventional method of forming a wafer diffusion layer using impurities of different conductivity types on one main surface of a wafer is carried out as shown in the process chart of FIG.

That is, please refer to the cross-sectional views of each process in FIGS. 2 to 5 corresponding to this process chart. 1) N-type Si
A thermal oxide film (Si02) 2 is formed on the wafer l, a photoresist 3 is applied thereon, and an opening 14 for forming the wafer is formed in a part by masking (Fig. 2), (2)
Forming a deposited eyebrow 5 of boron, which is a p-type impurity, on the surface of the opening 4 (FIG. 3); (3) removing the photoresist 3 by a plasma asher method or an ozone nitric acid method (
(Fig. 4), (4) Clean with HF-based etchant and heat to 1200°C.
Then, a well diffusion region 6 is formed by a diffusion treatment in an oxidizing atmosphere for several hours (FIG. 5).

In the process described above, at the same time the pollutant Fe
s Cu and other heavy metals are introduced into the Si substrate, which may cause various crystal defects in the well region 6 and its surroundings, resulting in poor device characteristics.

In order to prevent the occurrence of such crystal defects, a method is sometimes taken in which a getter sink is provided on the back side of the wafer to absorb heavy metals introduced during the process.

Regarding gettering, see "Electronic Materials Series" Silicon Crystal and Doping P published by Maruzen on June 25, 1983.
, 115-119. Typical gettering methods include (1) mechanical methods such as sandblasting and laser irradiation, and (2) physicochemical methods such as impurity ion implantation and stress using a nitride film.

[Problem to be solved by the invention]

In the gettering method, mechanical methods have problems such as requiring special dedicated equipment, difficulty in controllability, and introducing other contamination. on the other hand,
The physicochemical method uses an expensive ion implantation device and is a special process, which inevitably leads to high costs, and the problem is that its effects are relatively small.

The present invention has been made to overcome the above-mentioned problems, and its purpose is to getter the heavy metal contamination introduced during the process relatively easily and more economically, thereby improving the crystallization of semiconductor devices. [Means for Solving the Problem] In order to achieve the above object, the present invention provides a method for manufacturing a semiconductor device, comprising: a semiconductor substrate having a first conductivity type; In forming a pn junction as an active region on the first main surface of
A high concentration diffusion layer of an impurity that creates a second conductivity type or a semiconductor layer containing the impurity is formed as a getter layer on the second main surface, which is the opposite side of the semiconductor substrate.

The present invention also provides a method for manufacturing the semiconductor device, comprising: n
A silicon oxide film is formed on one main surface of a mold silicon wafer, and an impurity boron silicide is deposited on the other main surface of the wafer by a vapor phase chemical reaction, and from this boron is diffused into the silicon. A pn junction, which becomes an active element, is formed by opening a part of the oxide film on one main surface and implanting, doping, or diffusing impurity ions.

[Effect]

By forming a boron silicide layer on the back surface (other main surface) of the semiconductor wafer, crystal defects inside the wafer formed by diffusion from the front surface of the wafer and heavy metal contamination existing in the high concentration boron diffusion layer are removed during heat treatment. Gettering progresses as it is absorbed into the boron silicide layer. As a result, the amount of heavy metals introduced into the semiconductor during the semiconductor device manufacturing process is reduced, the occurrence of crystal defects is suppressed, and leak current defects caused by this are reduced.

Embodiment C] Hereinafter, an embodiment of the present invention will be described in order of steps with reference to the drawings.

FIG. 6 is a process flowchart up to the formation of the well diffusion region of the power MO3FET.

7 to 11 are partial cross-sectional views of the semiconductor at each step corresponding to FIG. 6.

(1) A thermal oxide film 2 is formed on an n-type Si wafer 1 in a wet O atmosphere at 1000°C (FIG. 7).

(2) The oxide film on the back side of the wafer is removed by treating the wafer surface with a HF-based etchant while covering the wafer surface with a photoresist (not shown). Next, boron deposition and diffusion are performed to form a boron silicide layer 7 and a high concentration diffusion layer (p+ type layer) 8 on the back surface of the wafer (Fig. 8).
.

Figure 12 (longitudinal cross-sectional view) shows the boron deposition at this time.
, a boron deposition apparatus as shown in FIG. 13 (cross-sectional view) is used. In the figure, 11 is a reaction tube (quartz)
, 12 is boron nitride (BN) serving as an impurity source, 13
is a BN jig.

Reference numeral 9 denotes an n-type St wafer having a SiOλ film on its front side and from which Si02 has been removed on its back side.

In order to stand up this wafer 9, a wafer jig 10 (a rod-shaped 5
i02 with a split groove), the BN serving as the source 12 is inserted into the center of the BN jig 13 and introduced into the reaction tube 11, and its opening 14 is closed with a camp 15. , vacuum is drawn from the gas supply port 16 side to bring the inside of the reaction tube into a reduced pressure state. Thereafter, the inside of the reaction tube is subjected to a predetermined temperature treatment using the furnace heater 17 to perform B deposition. The treatment conditions at this time are shown in the fourteenth temperature change curve over time. This is the first heat treatment, and then a second heat treatment is performed under the treatment conditions shown in FIG. 15 to obtain a highly concentrated boron diffusion layer 8 inside the back surface of the wafer.

In this case, the concentration of the diffusion layer is 10"/cd or more,
The concentration is comparable to that of the isolation layer.

(3) After B is diffused to the back surface of the wafer, a part of the oxide film 2 on the front surface is opened using a photoresist mask 3, and boron ions are implanted through the opening 4 to form a p-type impurity deposition layer 5. (Figure 9).

(4) Next, the photoresist mask 3 is removed by a plasma asher method and an ozone sulfuric acid method (FIG. 10).

(5) Etch cleaning solution using HF-based etchant, 1200℃
A well region 6 is formed by diffusion treatment in an oxidizing atmosphere for several hours (FIG. 11).

In addition to the process described above that uses the backside of the wafer,
Similar to the previous embodiment, a boron silicide layer and a high concentration boron diffusion layer are selectively formed by mask processing in the isolation layer separating elements on the wafer surface or in the scribe region which is the boundary part separating pellets. obtain the effect of Furthermore, it is very effective to use both methods in combination.

〔Effect of the invention〕

Due to the gettering effect of the highly concentrated poron diffusion layer and boron silicide layer formed on the back surface of the wafer, the occurrence of crystal defects introduced into Si during the device formation process is suppressed, and leakage current defects caused by these are suppressed. This contributes to improving the yield and quality of semiconductor products.

FIG. 1 is a flowchart showing a conventional process up to the formation of a well diffusion layer of a power MOS FET.

2 to 5 are cross-sectional views of the semiconductor at each step corresponding to the process shown in FIG. 1.

FIG. 6 is a flowchart illustrating one embodiment of the present invention for a power MO5FET process.

7 to 11 are cross-sectional views of the semiconductor at each step corresponding to the process shown in FIG. 6.

FIGS. 12 and 13 are a vertical cross-sectional view and a cross-sectional view of a boron deposition apparatus used for depositing boron on the back surface of a wafer.

FIGS. 14 and 15 are curve diagrams showing the temperature conditions during the boron deposition described above.

1...St wafer, 2...thermal oxide film, 3...
Photoresist, 5... Ion implantation layer, 6... Well diffusion layer, 7... Boron silicide layer, 8...
High concentration poron diffusion layer.

No. 5 figure vinegar No. Figure 12 ―■ No. figure No. figure No. 5 figure 2

Claims (1)

[Claims] 1. In forming a pn junction as an active region on the first main surface of a semiconductor substrate having a first conductivity type, a second conductivity type is formed on a second main surface, which is the opposite side of the semiconductor substrate. 1. A method of manufacturing a semiconductor device, characterized in that a high concentration diffusion layer of impurities that produce impurities or a semiconductor layer containing the above-mentioned impurities is formed as a getter layer. 2. A method for manufacturing a semiconductor device according to claim 1, comprising:
A silicon oxide film is formed on one main surface of an n-type silicon wafer, and boron silicide, an impurity, is deposited on the other main surface of the wafer by a vapor phase chemical reaction, and boron is diffused into the silicon. A part of the oxide film on one main surface of the substrate is opened and a pn junction, which becomes an active element, is formed by implanting, doping, or diffusing impurity ions.