JPH03153024A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To provide a high degree resistance and a low sheet resistance against diffusion of metal atoms in a metal interconnection layer into a semiconductor substrate by providing the following: a barrier metal layer having a multilayer structure where high-concentration oxygen layers and low-concentration oxygen layers have been laminated alternately on the semiconductor substrate; and the metal interconnection layer on it. CONSTITUTION:A TiN layer 19 on a semiconductor substrate is heat-treated in an atmosphere of N2 containing a small amount of oxygen by using a lamp-annealing apparatus. It is transformed into a first TiN layer 22 of a structure where a low- concentration oxygen layer of a concentration of, e.g. several % is situated between high-concentration oxygen layers 22a, 22b of a concentration of, e.g. 10% or higher. A TiN layer 23 is deposited and formed on the first TiN layer 22; it is heat-treated in the same manner as the first TiN layer 22. The TiN layer 23 is transformed into a second TiN layer 24 composed of a low-concentration oxygen layer 24c between high-concentration oxygen layers 24a, 24b; a barrier metal layer 25 composed of the first and second TiN layers 22, 24 is obtained. After that, a metal interconnection layer 26 is formed on the second TiN layer 24; it is patterned to a prescribed shape and, after that, is covered with a passivation film.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device such as a large-scale integrated circuit and a method for manufacturing the same, and particularly relates to a structure of a contact portion of a metal wiring layer with a substrate.

[Conventional technology]

In semiconductor devices such as large-scale integrated circuits, AI is generally used as a wiring layer material, but the AI wiring layer and the underlying S
In order to suppress interdiffusion of AI and Si due to alloy reaction at the contact area with the t-substrate and polycrystalline Si layer,
Usually, 1 wt % (weight %) of Si is added to the AI wiring layer.

That is, the solid solubility of Si in AI at 450°C, which is the general maximum heat treatment temperature after forming the AI wiring layer, is 0.4.
8wt%, about half of the added St becomes a solid solution, and the heat treatment after forming the AI wiring layer reduces the A I /
Diffusion of Si into AI at the Si interface is prevented,
The thermal stability of the contact area is improved.

However, since the solid solubility of St in AI at room temperature is almost zero, the St dissolved in AI due to heat treatment precipitates during the cooling process, and since the base of Ail is crystalline, St selectively grows epitaxially in the contact area between All and Sl, resulting in A! '
The /Si interface is covered with grown Si, and this becomes more noticeable as the structure of the contact portion becomes finer, for example, when the contact hole is 1 μm or less.

Moreover, since it contains a small amount of A2, p-type Si is epitaxially grown, and if the underlying Si is n-type, there is a disadvantage that the contact resistance increases significantly.

Therefore, in order to eliminate such inconvenience,
As disclosed in Publication No. 8-46631, it has been considered to provide a barrier metal between the underlying St and AI wiring layer and connect the underlying St and AI wiring layer through the barrier metal. This type of semiconductor device, for example,
It is configured as shown in Figure 2.

That is, as shown in FIG.
After an iO2 film 2 is formed, a part of the S t 02 film 2 is removed to form an opening 3, and an impurity is diffused into the surface of the Si substrate 1 exposed in this opening 3 to form an impurity diffusion layer. , on the S I Oz film 2 within the opening 3 and around the periphery of the opening 3, for example, as a reaction gas (A r + N 2
) is used to form a barrier metal layer 4 made of TiN with a thickness of about 1100 nm, and an AI wiring layer 5 is formed on this barrier metal layer 4.

Here, in FIG. 12, 6 is a metal silicide layer such as TiSi2, which is formed by an alloy reaction occurring during the process.

In this way, by providing the barrier metal layer 4 below the AI wiring layer 5, even when St is added to the AI wiring layer 5, epitaxial growth of St on the surface of the underlying impurity diffusion layer can be prevented, and the above-mentioned problem can be prevented. It is possible to prevent an increase in contact resistance.

By the way, when the wiring width of the AI wiring layer 5 is wide, the AI
The cross-sectional area of Si grains precipitated in the wiring layer 5 is
can be ignored and has no effect on the cross-sectional area of There is a high probability that the cross-sectional area of the wiring layer 5 is approximately the same as the cross-sectional area of the AI wiring layer 5.

At this time, while the specific resistance of All is 2.7×10-6 Ω, the specific resistance of precipitated Si is on the order of 10-2 Ω. If there are Si grains in the area, the effective AI wiring layer 5
The cross-sectional area of the A9 wiring layer 5 becomes smaller in the St precipitated portion, and as a result, the current density of the A9 wiring layer 5 locally increases, which may lead to a decrease in electromigration resistance.

However, if there is a barrier metal layer 4 under the AI wiring layer 5, even if a disconnection occurs in the A1 wiring layer 5 due to electromigration, conduction is ensured by the lower barrier metal layer 4, but normally the barrier metal layer 4 is thinner than the AI wiring layer 5, and a material having a specific resistance of 10 times or more that of All is often used as the barrier metal layer 4. Therefore, electromigration of the AI wiring layer 5 and the accompanying wiring resistance are reduced. The problem of rising cannot be eradicated.

Therefore, when the AI wiring layer 5 is to be miniaturized, it is desirable to use pure AI to which Si is not added, or pure AI with Cu and Ti added to lower the resistance, as the material for the AI wiring layer 5. .

On the other hand, since the AI wiring layer 5 does not contain SL, the p-n junction formed between the impurity diffusion layer and the Si substrate 1, especially in the contact area between the impurity diffusion layer of the Si substrate 1 and the barrier metal layer 4, is Si substrate 1 and AI accompanying alloy reaction
In order to prevent the barrier metal layer 4 from being destroyed by interdiffusion with the wiring layer 5, the upper layer /l is used as the material for the barrier metal layer 4.
) and the lower layer S11, and a material that forms a stable interface with silicide, which is also used for wiring, etc., must be selected. Conventionally, such barrier metal materials include Ti, Ta, W, Nitride of high melting point metal such as Mo (
Among these high melting point metals, W, simple substance of Mo, TiW, etc. are well known.

Among them, the TIN mentioned above is All in bulk.

Because of its good heat resistance against St, it is often used as a material for the barrier metal layer 4, and can be obtained by thermal nitriding of Ti, reactive sputtering using a Ti target, reactive vapor deposition, CVD, etc. Many cases have been reported so far.

However, the thin film of TiN formed as the barrier metal layer 4 by the method described above is a crystalline substance having a columnar structure in the direction perpendicular to the Si substrate 1, and this thin film of TiN has a structure in which there are holes that penetrate from the top surface to the bottom surface. There are many grain boundaries, and M
, A, N1colet, Th1n 5old Fil
MS. do.

That is, as shown in FIG. 13, the All
AfI in the wiring layer 5 diffuses into the underlying Si substrate 1, and an alloy 8 is generated in the impurity diffusion layer by an alloy reaction between the diffused Al and St in the Si substrate 1.
The pn junction between the two ends up being destroyed.

Therefore, as shown by the X mark in FIG. 14, a so-called stuffed pariah is used in which oxygen 9 is segregated at the grain boundaries 7 of the TiN barrier metal layer 4 to prevent the diffusion of AI into St. Such stuffed pariahs have been proposed, for example, by S., Ivabuchi e.
tal,,VLSI Inter,5yIip,Pr
198B, 55 (198B), it can be formed by mixing a trace amount of oxygen when depositing TiN by sputtering Ti in (Ar + N 2 ) gas. .

However, the stuffed pariah formed in this way,
In other words, TiN containing oxygen has the disadvantage of high sheet resistance in the direction parallel to the film surface, so in the event that the upper AN wiring layer 5 is disconnected due to electromigration, it can serve as a low-resistance current path. The AJ2 wiring layer 5 does not achieve the desired performance, and the Joule heating value is large.
The temperature rises intensively at the disconnected portion, and the AI in the vicinity of the disconnected portion melts, resulting in the inconvenience that the AI wiring layer 5 is completely blown out.

By the way, the reason why the sheet resistance of TiN containing oxygen increases is that, as shown in FIG. 14, the grain boundaries 7 where oxygen is segregated are perpendicular to the current flowing in the direction parallel to the TiN film surface. Therefore, the reflection coefficient for electrons at the grain boundaries 7 becomes large.Theoretical consideration of the relationship between oxygen segregated at the grain boundaries 7 and the reflection coefficient for electrons is given by A.F. Mayadas. and MJhatz
kes, Phys, Rev., B1.1382 (197
0).

In order to investigate the relationship between the oxygen concentration (atomic ratio) and heat resistance in the TiN film, the barrier metal layer 4 in FIG. A TiN film is formed and pure A is formed on it.
9 wiring layer 5 was formed and a thermal acceleration test was conducted at 450° C. for 10 hours, and an n-3t impurity diffusion layer and a p Si substrate 1 were formed.
The junction leakage current distribution in the pn junction was measured before heating and after heating at 450°C for 10 hours.
The structure is now shown in FIG. 1 and FIG. 16, respectively.

At this time, the size of the contact part of the measured sample was 1 μm x 1 μm, and the number of contacts was 130,000. Figures 15 and 16 show the results when the oxygen concentration was less than 10% and 2%, respectively. Each figure (a) is before heating, each figure (b) is 4
These are the results after heating at 50°C for 10 hours, and are shown in Figure 16 (b).
) The dashed line in ) indicates that the leakage IO current is greater than 5X10 A.

As is clear from Figures 15 and 16, when heating at 450°C for 10 hours when the oxygen concentration is low, the barrier properties for the diffusion of AI into St through grain boundaries deteriorate. ,
While the leakage current of a pn junction tends to increase, when the oxygen concentration is high, the leakage current hardly increases even after heating at 450°C for 10 hours, and it has excellent barrier properties against heat. You can see that

In addition, by the so-called four-terminal method, T
When the sheet resistance of the iN film was measured, it was 8Ω before heating.
/ What was the mouth was 450 degrees Celsius.

After 10 hours of heating, the resistance increased significantly to 150Ω/mouth.
Expressing this in terms of specific resistance, 80 μΩ1 rose to 1.5 mΩ1.

[Problem to be solved by the invention]

In conventional semiconductor devices, in order to ensure barrier properties against diffusion of AN in the AI wiring layer 5 into the St substrate 1, TiN, which has a high oxygen concentration, is used as the material for the barrier metal layer 4 even at the cost of sheet resistance. In addition, the Joule heating value increases due to the high sheet resistance of the barrier metal layer 4 as described above.

There is a problem in that it is not possible to prevent the occurrence of problems such as temperature rise and melting of the All wiring layer due to this.

This invention was made in order to solve the above-mentioned problems, and it is a barrier metal that has a high barrier property against diffusion of metal atoms of a metal wiring layer such as AI into a semiconductor substrate and has a low sheet resistance. The aim is to obtain layers.

[Means to solve the problem]

A semiconductor device according to the present invention includes a barrier metal layer formed on a semiconductor substrate and having a multilayer structure in which high oxygen concentration layers and low oxygen concentration layers are alternately laminated, and a metal wiring formed on the barrier metal layer. It is characterized by having a layer.

Further, the manufacturing method includes a step of forming a low oxygen concentration layer for barrier metal when forming the barrier metal layer;
It is effective to repeat the steps of heat-treating the low oxygen concentration layer in an atmosphere containing oxygen and forming a high oxygen concentration layer on the low oxygen concentration layer multiple times.

[Effect]

In the semiconductor device according to the present invention, the high oxygen concentration layer of the barrier metal layer has high barrier properties against diffusion of metal atoms of the metal wiring layer into the semiconductor substrate, and the low oxygen concentration layer has sheet resistance of the barrier metal layer. A barrier metal layer having high barrier properties against diffusion and low sheet resistance can be obtained.

Also, a step of forming a low oxygen concentration layer for barrier metal,
By repeating the process of heat treating the surface of the low oxygen concentration layer in an oxygen atmosphere to form a high oxygen concentration layer multiple times,
A barrier metal layer having a multilayer structure in which high oxygen concentration layers and low oxygen concentration layers are alternately stacked can be obtained.

〔Example〕

FIG. 1 shows an embodiment of the semiconductor device and method for manufacturing the same according to the present invention, and each step will be explained below.

First, as shown in FIG. 1(a), a p+ layer 11 for a channel stopper is formed in a desired region on the main surface of a p-type Si substrate 10, which is a semiconductor substrate, and on this p+ layer 11, for example, A relatively thick field SiO2 layer 12 for device isolation is formed by a thermal oxidation method, and the SiO2 layer 12 of the substrate 10 is
An n+ type impurity diffusion layer 13 is formed on the main surface surrounded by the two layers 12 by ion implantation and heat treatment, and a SiO2 layer 1 is formed on the impurity diffusion layer 13 by thermal oxidation or CVD.
4 is formed, S t 02 layer 12.14 J, m C
A relatively thick interlayer insulating layer 15 containing P, B, etc. is formed by the VD method.

At this time, P on the SiO□ film 14 and on the interlayer insulating layer 15
, B are prevented from diffusing into the substrate 10.

Next, as shown in FIG. 1(b), Si is etched at a predetermined position on the impurity diffusion layer 13 by photolithography or etching.
After the O□ layer 14 and the interlayer insulating layer 15 are removed to form a contact hole 16 and the impurity diffusion layer 13 is exposed to the contact hole 16, the impurity diffusion layer 13 exposed to the contact hole 16 is removed by ion implantation and heat treatment.
Then, an impurity diffusion layer 17 of the same n+ conductivity type is formed.

Here, the impurity diffusion layer 17 maintains the characteristics of a pn junction in a portion where there is little margin between the contact hole 16 and the field S 102 film 12.

Thereafter, as shown in FIG. 1(c), a layer of approximately 20 nm in thickness is deposited on the interlayer insulating layer 15, on the peripheral surface of the contact hole 16, and on the impurity diffusion layer 17 exposed in the contact hole 16.
A Tt layer 18 is formed, for example, Tt layer 18 in Ar gas.
It is formed by a sputtering method using an i-target.

At this time, in order to remove the natural oxide film on the bottom of the contact hole 16, diluted H
A light etching process using F is performed.

After forming the Ti layer 18, as shown in FIG. 1(d), a Ti8 layer 19 with a thickness of about 50 nm is formed on the Ti layer 18.
For example, (Ar + N2) gas is introduced into a vacuum chamber with a base pressure of about 10-8 Torr so that the total pressure is 3 mTorr at a flow rate ratio of about 1:1, and by the DC magnetron method, about 4 W /c- DC power is applied to the Ti target to form it at a rate of about 50 nm/min, and then it is heated at 800°C for about 30 seconds in an N2 atmosphere containing a trace amount of oxygen using a lamp annealing device using a halogen lamp as the light source. As shown in FIG. 1(e), a Ti512 layer 20 is formed by an alloy reaction between St in the impurity diffusion layer 17 and Ti in the Ti film 18 in the contact hole 16, and a Tt layer 20 is formed. 1
8 is thermally nitrided to become a TiN layer 21, and by heat treatment, the Ti8 layer 19 is also changed to a first TiN layer 22 having a different quality as will be described in detail later.

Furthermore, as shown in FIG. 1(r), after the iN layer 23 on the first TiN layer 2 is formed in the same manner as the TiN layer 19, the same heat treatment is performed using the lamp annealing apparatus described above. As shown in the same figure (g), the first TiN
As in the case of layer 22, TiN layer 23 has a second layer of different quality.
The first TiN layer 24 is changed to the first one. Second TiN layer 22.
A barrier metal layer 25 consisting of 24 is formed, and then pure A is formed on the second TiN layer 2 and 4 by sputtering.
I, AJSi, or these Cu, Ti, Pd.

A metal wiring layer 26 is formed by adding PT, etc., and after this is patterned into a predetermined shape,
Although not shown, the passivation film allows
A patterned metal wiring layer 26 is coated.

By the way, changes in the TiN layer 19.degree. 23 due to the heat treatment described above will be explained using FIG. Here, Fig. 2 (a), (b), (c), and (d) are the first
Parts of figures (d), (e), (r), and (g) are shown.

Now, as shown in FIG. 2(a), a Ti8 layer 19 is formed on the Ti layer 18 by the DC magnetron method described above.
Since the oxygen concentration is extremely low, its specific resistance is approximately 60 μΩ.
The distribution of oxygen in the depth direction in the TiN layer before heat treatment was investigated using Auger electron spectroscopy, as shown in Figure 3(a). It can be seen that the distribution is almost uniform.

Here, the horizontal axis of FIGS. 3(a) to (C) is the sputtering time, which is proportional to the depth from the surface, and the vertical axis is an arbitrary unit.

Next, as described above, when the Ti8 layer 19 is heat-treated in an N2 atmosphere containing a trace amount of oxygen using a lamp annealing device, as shown in FIG. 2(b), the Ti8 layer 19 is
A structure in which oxygen in the layer 19 is segregated near the surface or the interface with the lower layer, and a low oxygen concentration layer 22c with a concentration of, for example, several percent is located between the high oxygen concentration layers 22a and 22b with a concentration of, for example, 10% or more. The first TiN layer 22 of FIG.

However, during heat treatment, the oxygen concentration in the chamber of the lamp annealing device is approximately 10 ppm, and the temperature is 200°C.
Heat treatment of the chip is started when the temperature reaches a certain temperature. N2 gas with a concentration of 1 ppm or less is used as the atmospheric gas along with water and oxygen. There is.

At this time, since TiN is very easily oxidized reflecting the chemically active properties of Ti, the high oxygen concentration layer 22b is formed on the surface side of the first TiN layer 22 rather than due to segregation. The main cause is thought to be oxidation due to trace amounts of oxygen during annealing and oxygen in the atmosphere immediately after being taken out of the chamber.

By the way, as mentioned above, by heat treatment, the shape shown in FIG.
), an alloy reaction between Ti in the Ti layer 18 below the first TiN layer 22 and Si in the impurity diffusion layer 17 causes T
While the iS t 220 is formed, the Ti layer 18 is thermally nitrided to form the TiN layer 21.

In this way, the spectrum representing the distribution of oxygen in the depth direction obtained by Auger electron spectroscopy of the TiN layer after heat treatment is as shown in Fig. 3(b), and the spectrum showing the distribution of oxygen in the depth direction of the TiN layer with the lower layer is as shown in Fig. 3(b). It can be seen that the oxygen concentration on the surface side is higher.

Furthermore, as shown in FIG. 2(C), the first TiN layer 2
Depositing an iN layer 23 on the top layer 2 and forming the first TiN layer 22
When heat treatment is performed in the same manner, as shown in Figure 2(d),
The TiN layer 23 is changed into a second TiN layer 24 consisting of a low oxygen concentration layer 24c between high oxygen concentration layers 24a and 24b, and the first TiN layer 23 is replaced by a second TiN layer 24 consisting of a low oxygen concentration layer 24c between high oxygen concentration layers 24a and 24b. A barrier metal layer 25 consisting of a second TiN layer 22, 24 is obtained.

At this time, when a TiN layer is further formed on the heat-treated TiN layer and this is heat-treated, the spectrum measured by Auger electron spectroscopy showing the distribution of oxygen in the depth direction of both TiN layers is shown in Figure 3 ( As shown in e), the lower T
On the back side of the iN layer, near the interface of both TiN layers and in the upper layer
The oxygen concentration on the surface side of the N layer is high.

However, FIG. 3(C) shows the results for a sample in which the total thickness of both TiN layers is the same as the thickness of the - layer TiN layer in FIGS. 3(a) and 3(b).

On the other hand, the oxygen concentration in the TiN layer can be controlled by heat treatment conditions and TiN sputtering conditions.
It is clear that the oxygen concentration in the N layer can be controlled.
Regarding the latter sputtering condition, the total pressure during sputtering is T
The oxygen concentration in the TiN layer can be controlled by appropriately selecting the total pressure conditions during sputtering, since it greatly affects the oxygen concentration in the iN layer.

Therefore, when we investigated the relationship between the total pressure and the composition ratio during the formation of a TiN film, we found the results shown in Figures 4 and 5.
The figure shows the relationship between the atomic ratio of oxygen and Ti (0/Ti) with respect to the total pressure, and Figure 5 shows the relationship between the atomic ratio of nitrogen and Ti (N
/Ti), and from these figures, it can be seen that O/Ti increases as the total pressure increases, while N/Ti decreases as the total pressure increases.
It can be seen that the oxygen concentration in the layer increases when the total pressure during TiN sputtering is high, and decreases when the total pressure is low, so that the amount of oxygen segregated during annealing is proportional to the total pressure.

Next, the first. second TiN
When paying attention to the crystal structure of layers 22 and 24, both TiN layers 2
A schematic representation of the grain boundaries of 2.24 is shown in FIG. 6, where grain boundaries 27 and 28 occur in the vertical direction in both TiN layers 22 and 24, respectively.
Since the high oxygen concentration layers 22b and 24a of both TiN layers 22.24 are located in the center of the whole, both TiN layers 22.24
The grain boundaries 27 and 28 of the high oxygen concentration layers 22b and 24
The metal wiring layer 26 becomes discontinuous at the point A, and the metal wiring layer 26 becomes Si.
It is prevented from reaching the impurity diffusion layer 17 of the substrate 1.

By the way, as described above, the first TiN layer 22 is a high oxygen concentration layer 22a on the front and back sides, respectively.

22b and a low oxygen concentration layer 22c between them,
The same applies to the second TiN layer 24, and since a thick low oxygen concentration layer is located between each thin high oxygen concentration layer, both TiN layers 24
The sheet resistance of the N layer 22.24 is about 13Ω/mouth,
While the sheet resistance of the conventional TiN layer increases from 8Ω/hole to 150Ω10 due to the heat treatment during the process as described above, this value is very small.

On the other hand, there is a concern that the resistance in the vertical direction of both TiN layers 22.24, that is, the contact resistance, will increase, but in reality there is almost no increase;
4 high oxygen concentration layer 22a.

This is because the thicknesses of the layers 22b, 24a, and 24b are small, and for example, the specific resistance of these layers is
The high oxygen concentration layers 22a, 22b, 24a have a specific resistance of 8 mΩ, which is 100 times the specific resistance of 80 μΩ (up to).

Even if the total thickness of the TiN layers 22.24b is assumed to be 50 am and the contact portion has a size of 1 μm...×1 μm, both TiN layers 22.
The contact resistance of No. 24 is only about 4 Ω at most, and in reality, due to the three-dimensional current wraparound phenomenon, the cross-sectional area of the contact section becomes effectively larger than 18 m x 1 μm, and the contact resistance becomes even smaller than 4 Ω. It seems that there is no adverse effect on device characteristics in practical terms.

By the way, as a sample, 130,000 contact holes with a size of 18 m x 1 μm were formed on the n1 type impurity diffusion layer of a p-type Si substrate, and each hole was filled with 20 nm thick Ti, 1100 nm thick TIN, and 0 A thermal acceleration test was conducted at 450° C. for 10 hours on a product in which .5 μm of pure Al was sequentially deposited, and the junction leakage current distribution at the pn junction was investigated, as shown in FIG.

At this time, 1100n of TiN is shown in FIG. 1(g) l: 1. Corresponding to the second TiN layer 22.24, for comparison, the leakage current distribution for a sample with a conventional structure in which a small amount of oxygen was added during the deposition of 1100n TiN is shown in Fig. 8. Figure 9 shows the leakage current distribution for a sample that was later subjected to heat treatment similar to the heat treatment using the lamp annealing device described above, with each figure (a) before heating and each figure (b) after heating at 450°C for 10 hours. Each figure shows the leakage current distribution after heating.

In addition, if the cross section of the sample in FIG. 9 is illustrated, it will be as shown in FIG. 10, for example, and the same reference numerals as in FIG.
It is an iN layer, and has a structure in which a low oxygen concentration layer 29c is located between high oxygen concentration layers 29a and 29b on the front side of the back surface 1 by heat treatment.

As is clear from Fig. 7, pn before and after heating.
The leakage current of the junction hardly changes, and the result is equivalent to that of the conventional structure with high oxygen concentration and high sheet resistance TiN shown in Figure 8, and the diffusion of AI in the wiring layer toward the substrate side is reliably prevented. I can see that it is being done.

On the other hand, in the case of FIG. 9, T
It can be seen that when only one layer of iN is used, the leakage current increases significantly after heating at 450° C. for 10 hours, and the diffusion of A1 into the substrate cannot be sufficiently prevented, resulting in a small barrier effect.

Here, the broken line in FIG. 9 indicates that the leakage current is 5×110 This shows that it is higher than OA.

As described above, since the barrier metal layer 25 has a multilayer structure by alternately stacking high oxygen concentration layers and low oxygen concentration layers,
The high oxygen concentration layer can provide a high barrier property against diffusion of metal atoms such as AI in the metal wiring layer 26 into the substrate 10, and the low oxygen concentration layer can reduce the sheet resistance of the entire barrier metal layer 25. Thus, a barrier metal layer 25 having high barrier properties and low sheet resistance can be obtained.

Note that in order to ensure the adhesion of the metal wiring layer 26, the first
As shown in FIG. 1, the conditions during the heat treatment are controlled so that a high oxygen concentration layer is not formed on the surface side of the second TiN layer 24, for example, the oxygen concentration of the second TiN layer 24 is lowered, and the heat treatment is performed. In addition to further lowering the water and oxygen concentrations contained in the atmospheric gas during heat treatment, the sample temperature is taken out into the atmosphere after it has become sufficiently low after heat treatment, and the metal wiring layer 26 is formed directly on the low oxygen concentration layer 24c. It may be configured as follows.

In addition, as described above, another method for manufacturing the barrier metal layer is to add oxygen when forming a TiN film by the DC magnetron method in an (Ar + N 2 ) gas atmosphere with a flow rate ratio of 1:1. TiN may be continuously formed as a barrier metal layer by alternately repeating the process of forming a film without adding 2 to 3% oxygen and the process of forming a film with 2 to 3% oxygen. It is possible to form a barrier metal layer with a multilayer structure in which oxygen concentration layers and low oxygen concentration layers are laminated alternately, making it possible to obtain high barrier properties by discontinuing grain boundaries and suppressing increases in sheet resistance. be able to.

Further, in the above embodiment, the barrier property of the metal wiring layer 26 against diffusion of AI into the substrate 1 was explained.
Of course, similar high barrier properties can be obtained against diffusion of other materials such as Cu, Au, and Ag.

In addition, the material of the barrier metal layer is not limited to the above-mentioned TiN, but also nitrides, carbides, and ferrides of high-melting point metals such as Ti, Ta, W, and Mo, and among these high-melting point metals, W, Needless to say, Mo alone, TiW, etc. may be used.

〔Effect of the invention〕

As described above, according to the present invention, the barrier metal layer
Since high oxygen concentration layers and low oxygen concentration layers are alternately laminated to form a multilayer structure, it is possible to obtain a barrier metal layer that has high barrier properties against diffusion of metal atoms in the metal wiring layer into the substrate and low sheet resistance. , it is possible to improve the characteristics and reliability of a semiconductor device.

In addition, as a manufacturing method for such a barrier metal layer, there is a step of forming a low oxygen concentration layer for the barrier metal, and a process of heat-treating the low oxygen concentration layer in an atmosphere containing oxygen to form a high oxygen concentration layer on the low oxygen concentration layer. By repeating this step multiple times, it is possible to easily form a barrier metal layer having a multilayer structure of a high oxygen concentration layer and a low oxygen concentration layer.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of each step of an embodiment of a semiconductor device and a method for manufacturing the same according to the present invention, FIG. 2 is a sectional view of a part of each step of FIG. 1, and FIGS. 3(a) to (C) ) is a diagram showing the spectrum of Auger electron spectroscopy in the middle of the process of Figure 1,
5 and 5 are graphs of the relationship between the total pressure and the O/Ti and N/Ti composition ratios during the formation of the TiN layer shown in FIG. 1, respectively, and FIG. 6 shows the barrier obtained by the process shown in FIG. 1. Cross-sectional view schematically showing the crystal structure of the metal layer, FIG. 7(a)
, (b) are Ti obtained by the process shown in Fig. 1, respectively.
Leakage current of pn junction before and after thermal acceleration test of N layer, 8th
Figures (a) and (b) and Figure 9 (a) and (b) show the p of the TiN layer before and after the thermal acceleration test compared with Figure 7.
10 is a cross-sectional view of the test sample of FIG. 9, FIG. 11 is a cross-sectional view of another embodiment, FIG. 12 is a cross-sectional view of a conventional semiconductor device, and FIG. Figure and 1st
Figure 4 is a sectional view for explaining the operation of Figure 12, and Figure 15.
Figures (a) and (b) are leakage current distribution diagrams of the pn junction before and after the thermal acceleration test when the oxygen concentration in the barrier metal layer is high in Figure 12, and Figure 16 (a) and (b) are the leakage current distribution diagrams when the oxygen concentration in the barrier metal layer is high. FIG. 4 is a leakage current distribution diagram of a pn junction before and after a thermal acceleration test when the concentration is low. In the figure, 10 is a Si substrate, 22 is a first TiN layer,
24 is a second TiN layer, 22a, 22b. 24a and 24b are high oxygen concentration layers, 22c and 24c are low oxygen concentration layers, 25 is a barrier metal layer, and 26 is a metal wiring layer. Note that the same reference numerals in each figure indicate the same or corresponding parts. Figure 1 (Part 1)

Claims (2)

[Claims] (1) A barrier metal layer formed on a semiconductor substrate and having a multilayer structure in which high oxygen concentration layers and low oxygen concentration layers are alternately laminated, and a metal wiring layer formed on the barrier metal layer. A semiconductor device characterized by: (2) In a method for manufacturing a semiconductor device in which a semiconductor device is manufactured by forming a barrier metal layer on a semiconductor substrate and forming a metal wiring layer on the barrier metal layer, when forming the barrier metal layer, for barrier metal. A semiconductor device characterized in that a step of forming a low oxygen concentration layer and a step of heat-treating the low oxygen concentration layer in an atmosphere containing oxygen to form a high oxygen concentration layer in the low oxygen concentration layer are repeated multiple times. manufacturing method.