JPH0270456U - - Google Patents
Info
- Publication number
- JPH0270456U JPH0270456U JP15026788U JP15026788U JPH0270456U JP H0270456 U JPH0270456 U JP H0270456U JP 15026788 U JP15026788 U JP 15026788U JP 15026788 U JP15026788 U JP 15026788U JP H0270456 U JPH0270456 U JP H0270456U
- Authority
- JP
- Japan
- Prior art keywords
- header
- semiconductor chip
- power supply
- electrode pads
- supply terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Description
第１図および第２図は本考案に依る半導体装置
を説明する上面図および断面図、第３図および第
４図は従来の半導体装置を説明する上面図および
断面図である。
1 and 2 are a top view and a sectional view illustrating a semiconductor device according to the present invention, and FIGS. 3 and 4 are a top view and a sectional view illustrating a conventional semiconductor device.
Claims (1)
前記半導体チツプを載置するヘツダーと前記ヘツ
ダーに隣接し且つ前記電極パツドとボンデイング
ワイヤにより接続された複数のリードとを有する
半導体装置において、前記ヘツダー上に設けた絶
縁層を介して前記半導体チツプを載置し、前記リ
ードの一本を前記ヘツダーに沿つて延在させて反
対側のリードと連結し、前記半導体チツプ上の一
方の電源端子となる前記電極パツドと前記ヘツダ
ーとをボンデイングワイヤで接続し、他方の電源
端子となる前記電極パツドと前記連結したリード
とをボンデイングワイヤで接続して電源配線と兼
用することを特徴とする半導体装置。 (2) 前記半導体チツプとしてダイナミツクラン
ダムアクセスメモリを用い、前記半導体チツプ上
の両側に異なる種類の同一の電源端子となる前記
電極パツドを設け、前記同一の電源端子の電極パ
ツドを近くの前記ヘツダーおよび連結したリード
に夫々ボンデイングワイヤに接続することを特徴
とした請求項１記載の半導体装置。[Claims for Utility Model Registration] (1) A semiconductor chip having a plurality of electrode pads, a header on which the semiconductor chip is placed, and a plurality of leads adjacent to the header and connected to the electrode pads by bonding wires. In the semiconductor device, the semiconductor chip is placed on the header through an insulating layer provided on the header, one of the leads is extended along the header and connected to the lead on the opposite side, and the semiconductor chip is placed on the header through an insulating layer provided on the header. The electrode pad serving as one of the upper power terminals and the header are connected with a bonding wire, and the electrode pad serving as the other power supply terminal and the connected lead are connected with a bonding wire so that the header also serves as power supply wiring. A semiconductor device characterized by: (2) A dynamic random access memory is used as the semiconductor chip, the electrode pads of different types serving as the same power supply terminal are provided on both sides of the semiconductor chip, and the electrode pads of the same power supply terminal are connected to the nearby header. 2. The semiconductor device according to claim 1, wherein the connected leads are connected to bonding wires, respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15026788U JPH0270456U (en) | 1988-11-17 | 1988-11-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15026788U JPH0270456U (en) | 1988-11-17 | 1988-11-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0270456U true JPH0270456U (en) | 1990-05-29 |
Family
ID=31423259
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15026788U Pending JPH0270456U (en) | 1988-11-17 | 1988-11-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0270456U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS629654A (en) * | 1985-07-05 | 1987-01-17 | Nec Corp | Mounting package for ic device |
-
1988
- 1988-11-17 JP JP15026788U patent/JPH0270456U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS629654A (en) * | 1985-07-05 | 1987-01-17 | Nec Corp | Mounting package for ic device |
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