JPH0257744B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention uses a frame synchronization system, particularly in digital communication, to form a digital signal on a transmission path into a frame structure for high-speed transmission within an exchange, and extract a status signal for each channel and output it to the main part of the exchange. Regarding frame synchronization method.

Currently, the internal speed of the digital exchange is 2.048Mbps.
High-speed transmissions with signal transmission speeds such as (referred to as 2M method) and 8.192 Mbps (referred to as 8M method) are mainly used. On the other hand, the mainstream local transmission lines in Japan and the United States are 1.544 Mbps (referred to as 1.5M method) and 6.312 Mbps (referred to as 6.3M method). Therefore, for example, a transmission interface between a 1.5M transmission path and a 2M switching center is required.
This example will be explained below.

Digital exchanges digitize telephone voices at 8kHz, which is twice the analog voice frequency band.
The sampled 125 μs (1 second/8 kHz) is made into one frame and encoded with 8 bits to ensure audio quality. Therefore, in the 2M and 1.5M systems, 256 bits (2.048M/8K) and 193 bits (1.544M/8K) are allocated to each frame, respectively.
The number of time slots in 8-bit units is 32 each.
(256 bits/8 bits) and 1 bit with a remainder of 24 (193 bits/8 bits). The first bit of each frame is used as an F signal for frame synchronization. The 32 time slots of the 2M system use 2 time slots for control/monitoring signals and the remaining time slots.
Thirty time slots are used for transmitting information such as voice, thus corresponding to thirty telephone channels.
The 1.5M system uses 24 time slots, excluding 1 bit, which is the F signal, to correspond to 24 telephone line channels.
1 out of 8 bits per channel every 6 frames
By stealing bits and using them for control and monitoring signals, signals other than voice can be carried on the transmission path while minimizing the deterioration in voice quality. As explained above,
There are 30 channels of 2M system within the exchange, and the transmission line is
Since it is a 1.5M system with 24 channels, we measured the usage efficiency of these common divisors of 6 channels and the current telephone service, non-telephone service, and transmission line to achieve a speed of 384Kbps.
Normally, a line group is formed using a unit of line setting (equivalent to six telephone line channels).

First, examples of frame configurations of the 2M system and 1.5M system will be explained with reference to FIGS. 1 and 2.

Figure 1 shows an example of the structure of one frame in the 2M system.
In Fig. 1, eight frames #0 to #7 form one multiframe, and time slots TS0 to TS31 of each frame have time slots.
Channels CH1 to CH3 sequentially except for TS0 and TS16
0 is assigned. Line group HG1 for line setting unit
~ Channels CH1 to CH30 assigned to HG5
are distributed, and according to Figure 1, for example, a line group
HG1 is channel CH1, CH6, CH11, CH1
6, CH21, CH26 included. time slot
The bit sequence _b1 of TS0 is the first bit position of one frame and is assigned to the lower signal for frame synchronization. Each of the bit sequences _b4 to _b8 of time slot TS0 is a state frame STF1 to STF5 corresponding to a line group HG1 to HG5, respectively.
Each of them is assigned. Each state frame
STF1 to STF5 contain frame head signals FH and status signals ST1 to ST indicating the call status of each of the six channels assigned to the line groups (HG1 to HG5).
30. Alarm signal A for each line group (HG1 to HG5)
(Normal: "1", alarm: "0"). Also, bit sequence _b3 of time slot TS0 is an alarm signal for all line groups (HG1 to HG5).
Assigned as AL (“0” for normal, “1” for alarm).

Figure 2 shows an example of the structure of one frame in the 1.5M system.
In Figure 2, 12 frames #1 to #12 form one multiframe, the first bit position of each frame is assigned to the F signal for frame synchronization, and the frame starts from the next bit of this F signal. Channels CH1 to CH24 are sequentially allocated to each time slot TS0 to TS23, respectively.
10 of frames #1 to #5 and frames #7 to #11
Each channel of audio contained in a frame uses all 8 bits, but frames #6 and #12
A state signal ST- of a channel belonging to the multiframe is assigned to the bit sequence _b8 of each channel. According to Figure 2, line group HG1 in the 1.5M system includes channels CH1 to CH6,
Line groups HG2, HG3, and HG4 are each channels
CH7～CH12, CH13～CH18・CH19～
Including CH24, each line group HG1 to HG4
channels CH1 to CH6, and line groups
Channels CH1 to CH6 for each HG1 to HG4
State frames STF1 to STF4 are formed including state signals ST1 to ST6 corresponding to the respective state signals ST1 to ST6.

Next, FIG. 3 shows an example of the configuration of functional blocks only on the input side of the exchange at the connection point between the exchange and the transmission line, and the transmission line interface of the exchange will be explained. In FIG. 3, a transmission path 10 is connected to a transmission interface section 13 of an exchange 12 via a frame alignment section 11 by a connection path 14. In FIG. The transmission line 10 is a 24-channel PCM line shown in FIG. 2 based on the 1.5M system. The frame alignment unit 11 synchronizes and aligns temporally misaligned frames arriving from each of the plurality of transmission paths 10, and separates the 24 channels by route as already described in FIG. A predetermined 6 lines forming a line bundle of
Line groups HG1 to HG4 are formed for each channel, and the usage status of each channel (CH-) is extracted as a status signal (ST-) from the bit sequence _b8 of frames #6 and #12, and line groups HG1 to HG are formed.
A frame head signal FH and an alarm signal A are added to each of the frames STF1 to STF4. The line groups HG1 to HG4 included in each of the plurality of transmission lines 10 of the 1.5M system shown in FIG. 2 are the line groups HG1 to HG5 included in each of the plurality of connection lines 14 of the 2M system shown in FIG. The lines are taken out from the group of lines that were ready at the time of taking out and assigned with irregular sequence numbers. The transmission interface unit 13 of the exchange 12 mainly has an intra-office interface transmission code conversion function, and converts the status frame (STF) from the transmission signal received from the connection path 14 by serial bit transmission of the 2M system shown in FIG. position,
By synchronizing the frames with the time signal within the exchange received via the signal line CLK, a status signal (ST-) for identification and control of the exchange is extracted and sent via the signal line ST. The data symbols placed on the channel are sent by link 15 to a main switch (not shown).

Each of FIGS. 4a and 4b represents the 24-channel state frames STF1 to STF explained in FIG.
4 is assigned to the 30-channel status frames STF1 to STF5 explained in FIG. 1, the frame head signal FH of the status frame (STF-)
Examples of the allocation positions of the status signals ST1 to ST6 are shown in the case where the function of aligning the status signals ST1 to ST6 is not provided and when the function is provided. In the previous explanation for Figure 3, usually
In the 2M system connection path 14, an irregular status signal pattern as shown in FIG. 4a is obtained.

Further, FIG. 5 shows an example of the configuration of a transmission line coupling section in an exchange having a larger capacity than that shown in FIG. 3.
Transmission path 20, frame alignment section 21, and connection path 24
Each unit is the transmission line 1 shown in Figure 3.
0, the frame alignment section 11, and the connection path 14, respectively, and the only difference in FIG. 5 is that there are more of them. The transmission interface unit 23 mainly has an intra-office interface transmission code conversion function, and the 30 channels of 2M system transmission signals are multiplexed into, for example, 8M system 120 channels by the multiplexing unit 26. connected to. The status signal detection unit 28 extracts the status frame (STF-) from the transmission signal on the connection path 27 and sends the status signal (ST-) for controlling the exchange to the signal line.
ST and the data code via link 25.

Detection of the status signal (ST-) is performed at a highly multiplexed location inside the exchange, because when integrated circuits are used, the ratio of 24, 30, and 120 channel transmission paths is 5:4:1, respectively. Therefore, the number of integrated circuit facilities for detecting status signals provided for each transmission path can be reduced.

Next, an example of a conventional frame synchronization method will be explained with reference to FIG.

FIG. 6 is a functional block diagram showing an example of the configuration of a transmission interface section in the case of a small-scale transmission line facility such as a private branch exchange. In Figure 6,
The frame synchronization alignment circuit 30 includes a signal conversion circuit 31,
Frame synchronization circuit 32 and frame alignment circuit 33
The signal conversion circuit 31 converts the signal for controlling the exchange from the input transmission signal at a speed of 2.048 Mbps according to the transmission method of the connection line 14 into a scale internal interface transmission code and outputs the signal. The frame synchronization circuit 32 identifies and extracts the frame position from the input transmission signal, and notifies the frame alignment circuit 33 of the frame position. Frame alignment circuit 33
The counter 34 reads out the time signal CLK in the exchange.
Link 1 receives the input frame data signal according to the exchange control time by receiving it via link 1.
Send to 5. The read counter 34 instructs the frame alignment circuit 33 to synchronize frames #0 to #7 of the multi-frame explained with reference to FIG.
The time position of is determined. Further, the STF synchronization circuit 36 extracts the status signals ST1 to ST30 from the bit sequences _b4 to _b8 of the time slot TS0 outputted from the frame alignment circuit 53, and generates the status frame STF1.
- Summarize each of STF5 and send a frame head signal for each status frame STF1 to STF5.
Identify the FH and therefore this frame head signal
Status signals ST1 to ST6 and alarm signal A following FH
can be taken out. The selection circuit 37 selects the state frame.
Each signal in STF1 to STF5 is taken out in accordance with the order of control operations of the exchange and output to the buffer storage circuit 38. The buffer storage circuit 38 temporarily stores the signal input from the selection circuit 37 so that it can be taken out at a predetermined time of exchange control, and outputs it to the signal line ST.

In the above explanation, the state frame (STF-) is synchronized by the state signal detection unit 28 in FIG. 5 or the state signal detection unit 28 in FIG.
This function is performed by the STF synchronization circuit 36, and the frame alignment units 11 and 21 in FIGS. 3 and 5 do not include this function. Hence the state frame (STF−)
is the frame head signal as shown in Figure 4a.
The FH position can remain irregular. However, as is known in the public domain (for example, Publication No. 1796 at the National Conference of the Institute of Electronics and Communication Engineers in 1981), a temporary memory circuit is built into the frame alignment section where the transmission path is terminated, and the fourth
Each state frame (STF-) as shown in Figure b
It is easy to align the positions of the frame head signals FH of the frames and combine them into the time slot TS0 of frame #0 of the multi-frame as shown in FIG. However, state frame (STF) synchronization in a plurality of frame alignment units such as a high-capacity station is usually not achieved between frame alignment units even if the frame alignment units themselves are synchronized.

As explained above, the conventional frame synchronization method has a status frame (STF) synchronization circuit inside the exchange after the transmission interface section.
When the number of transmission lines is small, such as in an in-house switching network, and there is no need for multiple frame matching units or high multiplexing in the future, it is uneconomical to provide a status frame synchronization circuit for each connection line. There was a problem.

The purpose of the present invention is to eliminate the above-mentioned problems by aligning the frame head signals of the status frames at the frame matching section at the end of the transmission path and by eliminating the synchronization circuit for each status frame from the transmission interface section on the transmission connection path within the exchange. The object of the present invention is to provide a frame synchronization method that eliminates the problem and is economical.

The frame synchronization method according to the present invention is a frame synchronization method for a received transmission frame in which a status signal used for switching equipment control is extracted from a received digital code transmission signal and outputted to the switching equipment. aligning the irregular frame phases of the frames, then extracting transmission signals of a plurality of channels as a unit of line setting from the first transmission frame whose frame phases are aligned, and extracting a status signal for each channel for the plurality of channels; a frame alignment unit that arranges the channel transmission signal and the status signal at predetermined positions to form a second transmission frame, and configures a plurality of the second transmission frames into a predetermined multiframe and outputs the same; a frame synchronization and alignment means for identifying the frame position of the second transmission frame, synchronously aligning it with the time in the exchange, and outputting it to the exchange; A multi-frame synchronization means that identifies the state signal and extracts and outputs the state signal included in the multi-frame from a predetermined position within the multi-frame; and a transmission interface section having a buffer storage means for temporarily storing the data until it is retrieved at the time of.

Next, the present invention will be described by way of examples with reference to the drawings. FIG. 7 is a functional block diagram showing an embodiment of the frame synchronization method of the present invention. In FIG. 7, the signal conversion circuit 3 of the frame synchronization alignment circuit 30
1. The frame synchronization circuit 32 and frame alignment circuit 33 are the same as those shown in FIG. 6, and their explanations will be omitted. The read counter 44 is connected to the frame alignment circuit 33 by the time signal CLK in the exchange.
The MF synchronization circuit 46 is instructed to synchronize the output of the frames and to capture the status signal (ST-) of each frame. The MF synchronization circuit 46 synchronizes the multi-frame (MF) with the notification from the read counter 44, and outputs the status signal (ST-) of each frame ordered at a predetermined position as shown in FIG.
is taken in from the transmission signal on the link 15, temporarily stored in the buffer storage circuit 48, and sent to the control section (not shown) of the exchange via the signal line ST.

Figure 8 shows the 7th part in the transmission interface section of Figure 3.
2 is a flowchart showing the flow of operations when the diagram is applied. FIG. 8 will be explained with reference to FIGS. 3 and 7. In the 1.5M transmission signal received from the transmission path 10, the F signal is identified in the frame alignment section 11 (operation step) and one multiframe is temporarily stored. During this storage, the transmission signals in the multiframe are grouped together for each line group, and the frame heads FH of the status frames (STF-) are aligned (operation step).
The temporarily stored transmission signals are then assembled into a predetermined 2M transmission signal frame (as shown in FIG. 1) and sent to the exchange 12 via the connection 14 (operating step). In the transmission interface section 13 of the exchange 12, the 2M system transmission signal received by the signal conversion circuit 31 is converted into an in-office interface transmission code for convenience of exchange control (operation step). Next, the F signal of the 2M system transmission signal is identified by the frame synchronization circuit 32, and the 2M system transmission signal is temporarily stored in the frame alignment circuit 33 for each frame (operation step). Since the frame alignment circuit 33 sends out frames according to the instructions of the read counter 44, the MF
Frame #0 of the signal "0" is identified, the state signal ST- is extracted from the signal at a predetermined time, and is temporarily stored in the buffer storage device 48 (operation step). The temporarily stored status signal ST- is taken out via the signal line ST at a predetermined time under exchange control (operation step).

In the above example, examples of transmission speeds of 1.544Mbps and 2.048Mbps were shown, but 6.312Mbps and
A speed such as 8.192Mbps may be used.

As explained above, according to the present invention, when the status frames are synchronized within the multi-frame of the transmission frame, the transmission interface section of the exchange can be made economical by extracting the status signal just by synchronizing the multi-frames. This has the effect of being able to be converted into

[Brief explanation of drawings]

Figures 1 and 2 are 2M and 1.5M respectively.
Fig. 3 is a functional block diagram showing an example of the structure of the transmission line input side of the exchange; Fig. 4a
and b are a format diagram showing an example of the signal configuration of the status frame for each line setting unit in FIG. 1, FIG. FIG. 7 is a functional block diagram showing one embodiment of the conventional frame synchronization system and the present invention, respectively, and FIG. 8 is a flowchart showing the normal operation flow according to FIG. 11... Frame alignment unit, 12... Switching machine, 1
3...Transmission interface section, 14...Transmission line,
30... Frame synchronization alignment circuit (frame synchronization alignment means), 46... MF synchronization circuit (multiframe synchronization means), 48... Buffer storage circuit (buffer storage means), MF... Multiframe, ST... Status signal , STF...Status frame.

Claims (1)

[Claims] 1. In a frame synchronization method for received transmission frames in which a status signal used for switching equipment control is extracted from a received digital code transmission signal and output to the switching equipment, irregular frame phases of the first transmission frame received from multiple transmission paths are detected. Then, from the first transmission frame whose frame phases are aligned, the transmission signals of a plurality of channels as a line setting unit are extracted, and the status signals for each channel are extracted for the plurality of channels, and the transmission signals and status signals of the plurality of channels are extracted. a frame alignment unit that arranges the input frames at predetermined positions to form a second transmission frame, and configures a plurality of the second transmission frames into a predetermined multi-frame and outputs the input second transmission frame; Frame synchronization and alignment means identifies the frame position of the frame and synchronizes it with the time within the exchange and outputs it to the exchange; intercepts the transmission signal output from the frame synchronization and alignment means, identifies the multiframe, and synchronizes the frame position within the multiframe. multi-frame synchronization means for extracting and outputting the status signal contained in the multi-frame from a predetermined position of the multi-frame synchronization means, and the status signal output from the multi-frame synchronization means until it is extracted at a predetermined time necessary for controlling the exchange. , and a transmission interface section having buffer storage means for temporarily storing data.