JPH025540A - Formation of bonding of bump electrode - Google Patents
Formation of bonding of bump electrodeInfo
- Publication number
- JPH025540A JPH025540A JP63157303A JP15730388A JPH025540A JP H025540 A JPH025540 A JP H025540A JP 63157303 A JP63157303 A JP 63157303A JP 15730388 A JP15730388 A JP 15730388A JP H025540 A JPH025540 A JP H025540A
- Authority
- JP
- Japan
- Prior art keywords
- bump electrode
- electrode
- bump
- bonding
- electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000015572 biosynthetic process Effects 0.000 title abstract description 3
- 229910052751 metal Inorganic materials 0.000 claims abstract description 25
- 239000002184 metal Substances 0.000 claims abstract description 25
- 239000004065 semiconductor Substances 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 claims abstract description 10
- 229910052738 indium Inorganic materials 0.000 abstract description 9
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 abstract description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 5
- 239000011248 coating agent Substances 0.000 abstract description 5
- 238000000576 coating method Methods 0.000 abstract description 5
- 229910052802 copper Inorganic materials 0.000 abstract description 5
- 239000010949 copper Substances 0.000 abstract description 5
- 230000000694 effects Effects 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000010397 one-hybrid screening Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/81201—Compression bonding
- H01L2224/81203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81395—Bonding interfaces outside the semiconductor or solid-state body having an external coating, e.g. protective bond-through coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01049—Indium [In]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01077—Iridium [Ir]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はバンプ電極結合方法に関し、特に一対の半導体
チップを相互のバンプ電極同士と対向させて結合するバ
ンプ’、［ｆｉ結合方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a bump electrode bonding method, and more particularly to a bump', [fi bonding method for bonding a pair of semiconductor chips with their bump electrodes facing each other.
近年、半導体基板状に赤外゛線検出素子が配置されてい
る光電変換用半導体チップと、検出信号を処理する回路
が形成されたシリコンＩＣ半導体チップとをバンプした
ハイブリット型赤外線イメージセンサ−が知られている
。こうしたバンプ電極結合は、例えば、特開昭５９−１
５５１６２号公報に示されているように、両チップのそ
れぞれ対応する位置にインジウム等の軟質金属からなる
円柱状のバンプ電極を形成し、目合わせして熱圧着して
いた。In recent years, a hybrid infrared image sensor has become known, which is a bumped photoelectric conversion semiconductor chip in which an infrared ray detection element is arranged on a semiconductor substrate, and a silicon IC semiconductor chip in which a circuit for processing a detection signal is formed. It is being Such bump-electrode coupling is known, for example, from Japanese Patent Application Laid-Open No. 59-1
As shown in Japanese Patent No. 55162, cylindrical bump electrodes made of a soft metal such as indium were formed at corresponding positions on both chips, aligned and thermocompression bonded.
上述した従来のバンプ電極結合の形成方法では、対応す
るバンプ電極同士が必ずＩ〜も充分には機械的、電気的
に結合されていなかった。すなわち、インジウム等の軟
質金属は酸化され易いため、表面に酸化被膜が形成され
ており、円柱の端部であるバンプ電極の接合面では加熱
と加圧をｌ〜でも酸化被膜を押ｌ〜付けるだけで破れに
＜＜、結合の邪魔をしてしまう、こう１〜た不充分な結
合は両チップ間の剥離、導通不良どいった故障や、接触
抵抗の増加からくるノイズの増大といった特性の劣化を
招く欠点がある。特に、一つのハイブリ・ソド型赤外線
イメージセンザーチップでバンプ電極の接続数は数千点
以上あり、結合率、８すなわち充分に結合された接続点
の割合を高めることができないという欠点があった。In the above-described conventional method for forming bump-electrode connections, corresponding bump electrodes are not always sufficiently mechanically and electrically connected to each other. In other words, since soft metals such as indium are easily oxidized, an oxide film is formed on the surface, and even if heat and pressure are applied to the bonding surface of the bump electrode, which is the end of the cylinder, the oxide film cannot be pressed. Inadequate bonding can cause failures such as peeling between both chips, poor conduction, and increased noise due to increased contact resistance. There are drawbacks that lead to deterioration. In particular, the number of bump electrode connections in one hybrid infrared image sensor chip is several thousand or more, which has the disadvantage that it is not possible to increase the bonding rate of 8, that is, the ratio of sufficiently bonded bonding points. .
本発明の目的は、バンプ電極同士の結合が充分に行え、
結合率を向上させることが可能な半導体装置の製造方法
を提供することにある６〔課題を解決するための手段〕
本発明のバンプ電極結合の形成方法は、各々の表面に複
数のバンプ電極を設けた一対の半導体チップを対応する
前記バンプどうし対向させて結合させるバンプ電極結合
の形成方法において、軟質金属からなる第１のバンプ電
極に、硬質金属に前記軟質金属を被覆させた前記第１の
バンプ電極より小さい径の第２のバンプ電極が食い込む
ように結合させることを含んで構成される。The purpose of the present invention is to enable sufficient bonding between bump electrodes,
An object of the present invention is to provide a method for manufacturing a semiconductor device that can improve the bonding rate.6 [Means for Solving the Problems] The method for forming a bump electrode bond of the present invention includes forming a plurality of bump electrodes on each surface. In the method for forming a bump-electrode bond in which a pair of provided semiconductor chips are bonded to each other by facing each other, the first bump electrode is made of a soft metal, and the first bump electrode is made of a hard metal coated with the soft metal. The second bump electrode has a diameter smaller than that of the bump electrode.
本発明のバング電極結合の形成方法は、一方の第】のバ
ンプ電極は軟質金属で、他方の第２のバンプ電極は第１
のバンプ電極より径を小さくし、硬質金属に軟質金属を
被覆させたものであるため、両者を加圧すると、第２の
バンプ電極は第１のバンプ電極にスパイク状に食い込み
、その際、酸化膜を破り取っていくため、両バンプ電様
の接続部は清浄な金属面が現れ、充分な熱圧着が行われ
る。In the method of forming a bump electrode bond of the present invention, one bump electrode is made of a soft metal, and the other second bump electrode is made of a first bump electrode.
The diameter of the bump electrode is smaller than that of the first bump electrode, and the hard metal is coated with a soft metal. Since the film is torn off, a clean metal surface is exposed at the connection between the two bumps, and sufficient thermocompression bonding is performed.
次に、本発明の実施例について図面を参照Ｉ〜で説明す
る。Next, embodiments of the present invention will be described with reference to the drawings.
第１図（ａ）〜（ｅ）は本発明の一実施例を説明するた
めの工程順に示したバンプ電極の断面図、第２図、第３
図はそれぞれ本発明の一実施例を説明するためのバンプ
電極の斜視図及び断面図である。第２図に示すように、
結合すべき一対の半導体チップ１，２の各々の対応する
電極接続部に第１のバンプ電極４ａ及び第２のバンプ電
極４ｂを設置する。この時、第３図に示すように、一方
の半導体チップ１に形成する第１のバンプ電ｆｆ１４ａ
は、円柱状の軟質金属であるインジウム電極３であり、
他方の半導体チップ２の第２のバンプ電極４ｂは、硬質
金属である銅電極５にインジウム被覆６を被覆し７且、
その径を第１のバンプ電、棒３より小さくしたものであ
る、次に、両半導体千ツブ】−１２を向い合わせ、各々
のバンプ電極４ａ、４ｂが所定の対応する位置となるよ
う、目合わ仕する０次に、第１１図（ａ＞に示すように
、これらを加熱後、各々の対応しているバンプ電極４ａ
、＝１ｂが接触している状態から、第１図（Ｃ）に示す
ように、第２のバンプ電極が第１のバンプ電極に食い込
Ｘ７だ状態に変形するまで加圧することにより、熱圧着
、すなわちバンプ電極結合の形成が完了する。この時、
本発明では、上記の変形中に、第１図（ｂ）に示すよう
に、酸化被膜７が破れて、バンプ電極の接合部８に清浄
な金属表面が現れるため、この接合部で充分な熱圧着結
合が行われる。FIGS. 1(a) to 3(e) are cross-sectional views of bump electrodes shown in the order of steps for explaining one embodiment of the present invention, FIGS.
The figures are a perspective view and a sectional view of a bump electrode, respectively, for explaining one embodiment of the present invention. As shown in Figure 2,
A first bump electrode 4a and a second bump electrode 4b are installed at corresponding electrode connection portions of each of the pair of semiconductor chips 1 and 2 to be bonded. At this time, as shown in FIG. 3, the first bump electrode ff14a formed on one semiconductor chip 1 is
is an indium electrode 3 which is a cylindrical soft metal,
The second bump electrode 4b of the other semiconductor chip 2 is formed by coating a copper electrode 5, which is a hard metal, with an indium coating 67, and
The diameter of the bump electrode is smaller than that of the first bump electrode 3.Next, the two semiconductor electrodes 4a and 4b are placed facing each other, and the bump electrodes 4a and 4b are placed at predetermined corresponding positions. Next, as shown in FIG. 11 (a), after heating these, each corresponding bump electrode 4a is
, = 1b are in contact with each other, by applying pressure until the second bump electrode bites into the first bump electrode and transforms into the state of X7, as shown in FIG. 1(C). , that is, the formation of the bump electrode bond is completed. At this time,
In the present invention, during the above deformation, as shown in FIG. 1(b), the oxide film 7 is broken and a clean metal surface appears at the bump electrode joint 8, so that sufficient heat is generated at this joint. A crimp bond is made.
尚、以上説明した実施例ではバンプ電極の接続点数は９
点と少ないが、これが数千点以」二の数であっても同様
な効果を得ることができる。更に、軟質金属としてイン
ジウムの他に、アンチモン。In the embodiment described above, the number of connection points of the bump electrodes is 9.
The number of points is small, but even if the number is several thousand or more, the same effect can be obtained. In addition to indium, antimony is also used as a soft metal.
ビスマス、鉛、亜鉛等でも同様に適用でき、又、硬質金
属として銅やニッケル等を用いることができる。Bismuth, lead, zinc, etc. can be similarly applied, and copper, nickel, etc. can also be used as the hard metal.
以上説明したように、本発明は、軟質金属からなる第１
のバンプ電極に、硬質金属に軟質金属を被覆させ、且、
第１のバンプ電極より小さい径の第２のバンプ電極が食
い込むように結合させることにより、バンプ電極表面に
形成ｉ−でいる酸化被膜を破ることができるため、これ
らの接合部において充分な熱圧着が行われ、機械的、電
気的に充分結合された、結合率の高く接触抵抗の低いバ
ンプ電極結合を形成することが可能となる効果がある。As explained above, the present invention provides a first
The bump electrode has a hard metal coated with a soft metal, and
By joining the second bump electrode, which has a smaller diameter than the first bump electrode, by biting into it, it is possible to break the oxide film formed on the surface of the bump electrode, so that sufficient thermocompression bonding can be achieved at these joints. This has the effect of making it possible to form a bump-electrode bond that is mechanically and electrically well-coupled, has a high coupling rate, and has low contact resistance.
第１図（ａ）〜（ｅ）は本発明の一実施例を説明するだ
めの工程順に示したバング電極の断面図、第２図。第３
図はそれぞれ本発明の一実施例を説明するためのバンプ
電極の斜視図及び断面図である。
】、２・・・半導体チップ、３・・・−インジウム電極
、４ａ・・・第１のバンプ電極、４ｂ・・・第２のバン
プ電極、５・・・銅電極、６・・・インジウム被覆、７
・・・酸化被膜、８・・・接合部。FIGS. 1(a) to 1(e) are sectional views of a bang electrode shown in the order of steps for explaining an embodiment of the present invention, and FIG. Third
The figures are a perspective view and a sectional view of a bump electrode, respectively, for explaining one embodiment of the present invention. ], 2... Semiconductor chip, 3...-Indium electrode, 4a... First bump electrode, 4b... Second bump electrode, 5... Copper electrode, 6... Indium coating ,7
... Oxide film, 8... Joint part.
Claims (1)
ップを対応する前記バンプどうし対向させて結合させる
バンプ電極結合の形成方法において、軟質金属からなる
第１のバンプ電極に、硬質金属に前記軟質金属を被覆さ
せた前記第１のバンプ電極より小さい径の第２のバンプ
電極が食い込むように結合させることを含むことを特徴
とするバンプ電極結合の形成方法。In a method for forming a bump-electrode bond in which a pair of semiconductor chips each having a plurality of bump electrodes provided on each surface are bonded with the corresponding bumps facing each other, a first bump electrode made of a soft metal is bonded to a hard metal with the soft metal. A method for forming a bump-electrode bond, the method comprising the step of bonding so that a second bump electrode having a smaller diameter than the first bump electrode coated with metal bites into the bond.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63157303A JP2555875B2 (en) | 1988-06-24 | 1988-06-24 | Method for forming bump electrode bond |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63157303A JP2555875B2 (en) | 1988-06-24 | 1988-06-24 | Method for forming bump electrode bond |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH025540A true JPH025540A (en) | 1990-01-10 |
| JP2555875B2 JP2555875B2 (en) | 1996-11-20 |
Family
ID=15646715
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63157303A Expired - Fee Related JP2555875B2 (en) | 1988-06-24 | 1988-06-24 | Method for forming bump electrode bond |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2555875B2 (en) |
Cited By (11)
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|---|---|---|---|---|
| US5466635A (en) * | 1994-06-02 | 1995-11-14 | Lsi Logic Corporation | Process for making an interconnect bump for flip-chip integrated circuit including integral standoff and hourglass shaped solder coating |
| US5523697A (en) * | 1993-09-03 | 1996-06-04 | Micron Technology, Inc. | Testing apparatus for engaging electrically conductive test pads on a semiconductor substrate having integrated circuitry for operability testing thereof |
| US5585282A (en) * | 1991-06-04 | 1996-12-17 | Micron Technology, Inc. | Process for forming a raised portion on a projecting contact for electrical testing of a semiconductor |
| US5849633A (en) * | 1994-03-07 | 1998-12-15 | Micron Technology, Inc. | Electrically conductive projections and semiconductor processing method of forming same |
| US6617688B2 (en) | 2001-03-27 | 2003-09-09 | Nec Electronics Corporation | Semiconductor device and flat electrodes |
| US7112468B2 (en) | 1998-09-25 | 2006-09-26 | Stmicroelectronics, Inc. | Stacked multi-component integrated circuit microprocessor |
| JP2007165671A (en) * | 2005-12-15 | 2007-06-28 | Renesas Technology Corp | Method for manufacturing semiconductor device |
| WO2010143369A1 (en) * | 2009-06-10 | 2010-12-16 | 株式会社日立製作所 | Semiconductor device and fabricating method therefor |
| JP2011049306A (en) * | 2009-08-26 | 2011-03-10 | Honda Motor Co Ltd | Method for predicting connection resistance value |
| WO2012120245A1 (en) * | 2011-03-10 | 2012-09-13 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Connection component provided with hollow inserts |
| WO2016064350A1 (en) * | 2014-10-23 | 2016-04-28 | Agency For Science, Technology And Research | Method of bonding a first substrate and a second substrate |
-
1988
- 1988-06-24 JP JP63157303A patent/JP2555875B2/en not_active Expired - Fee Related
Cited By (35)
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| US5585282A (en) * | 1991-06-04 | 1996-12-17 | Micron Technology, Inc. | Process for forming a raised portion on a projecting contact for electrical testing of a semiconductor |
| US6614249B1 (en) | 1993-09-03 | 2003-09-02 | Micron Technology, Inc. | Methods of forming apparatuses and a method of engaging electrically conductive test pads on a semiconductor substrate |
| US5523697A (en) * | 1993-09-03 | 1996-06-04 | Micron Technology, Inc. | Testing apparatus for engaging electrically conductive test pads on a semiconductor substrate having integrated circuitry for operability testing thereof |
| US7330036B2 (en) | 1993-09-03 | 2008-02-12 | Micron Technology, Inc. | Engagement Probes |
| US7116118B2 (en) | 1993-09-03 | 2006-10-03 | Micron Technology, Inc. | Method and apparatus for testing semiconductor circuitry for operability and method of forming apparatus for testing semiconductor circuitry for operability |
| US7098475B2 (en) | 1993-09-03 | 2006-08-29 | Micron Technology, Inc. | Apparatuses configured to engage a conductive pad |
| US7026835B2 (en) | 1993-09-03 | 2006-04-11 | Micron Technology, Inc. | Engagement probe having a grouping of projecting apexes for engaging a conductive pad |
| US6124721A (en) * | 1993-09-03 | 2000-09-26 | Micron Technology, Inc. | Method of engaging electrically conductive test pads on a semiconductor substrate |
| US6127195A (en) * | 1993-09-03 | 2000-10-03 | Micron Technology, Inc. | Methods of forming an apparatus for engaging electrically conductive pads and method of forming a removable electrical interconnect apparatus |
| US6833727B2 (en) | 1993-09-03 | 2004-12-21 | Micron Technology, Inc. | Method and apparatus for testing semiconductor circuitry for operability and method of forming apparatus for testing semiconductor circuitry for operability |
| US6686758B1 (en) | 1993-09-03 | 2004-02-03 | Micron Technology, Inc. | Engagement probe and apparatuses configured to engage a conductive pad |
| US6670819B2 (en) | 1993-09-03 | 2003-12-30 | Micron Technology, Inc. | Methods of engaging electrically conductive pads on a semiconductor substrate |
| US6392426B2 (en) | 1993-09-03 | 2002-05-21 | Micron Technology, Inc. | Methods of forming apparatuses and a method of engaging electrically conductive test pads on a semiconductor substrate |
| US6380754B1 (en) | 1993-09-03 | 2002-04-30 | Micron Technology, Inc. | Removable electrical interconnect apparatuses including an engagement proble |
| US6462571B1 (en) | 1993-09-03 | 2002-10-08 | Micron Technology, Inc. | Engagement probes |
| US6573740B2 (en) | 1993-09-03 | 2003-06-03 | Micron Technology, Inc. | Method of forming an apparatus configured to engage an electrically conductive pad on a semiconductive substrate and a method of engaging electrically conductive pads on a semiconductive substrate |
| US6657450B2 (en) | 1993-09-03 | 2003-12-02 | Micron Technology, Inc. | Methods of engaging electrically conductive test pads on a semiconductor substrate removable electrical interconnect apparatuses, engagement probes and removable engagement probes |
| US6255213B1 (en) | 1994-03-07 | 2001-07-03 | Micron Technology, Inc. | Method of forming a structure upon a semiconductive substrate |
| US5849633A (en) * | 1994-03-07 | 1998-12-15 | Micron Technology, Inc. | Electrically conductive projections and semiconductor processing method of forming same |
| US6441320B2 (en) | 1994-03-07 | 2002-08-27 | Micron Technology, Inc. | Electrically conductive projections having conductive coverings |
| US6248962B1 (en) | 1994-03-07 | 2001-06-19 | Micron Technology, Inc. | Electrically conductive projections of the same material as their substrate |
| US6093643A (en) * | 1994-03-07 | 2000-07-25 | Micron Technology, Inc. | Electrically conductive projections and semiconductor processing method of forming same |
| US5869787A (en) * | 1994-03-07 | 1999-02-09 | Micron Technology, Inc. | Electrically conductive projections |
| US5872404A (en) * | 1994-06-02 | 1999-02-16 | Lsi Logic Corporation | Interconnect bump for flip-chip integrated circuit including integral standoff and hourglass shaped solder coating |
| US5466635A (en) * | 1994-06-02 | 1995-11-14 | Lsi Logic Corporation | Process for making an interconnect bump for flip-chip integrated circuit including integral standoff and hourglass shaped solder coating |
| US7112468B2 (en) | 1998-09-25 | 2006-09-26 | Stmicroelectronics, Inc. | Stacked multi-component integrated circuit microprocessor |
| US6617688B2 (en) | 2001-03-27 | 2003-09-09 | Nec Electronics Corporation | Semiconductor device and flat electrodes |
| JP2007165671A (en) * | 2005-12-15 | 2007-06-28 | Renesas Technology Corp | Method for manufacturing semiconductor device |
| JP4742844B2 (en) * | 2005-12-15 | 2011-08-10 | ルネサスエレクトロニクス株式会社 | Manufacturing method of semiconductor device |
| WO2010143369A1 (en) * | 2009-06-10 | 2010-12-16 | 株式会社日立製作所 | Semiconductor device and fabricating method therefor |
| JP2010287640A (en) * | 2009-06-10 | 2010-12-24 | Hitachi Ltd | Semiconductor device and manufacturing method thereof |
| JP2011049306A (en) * | 2009-08-26 | 2011-03-10 | Honda Motor Co Ltd | Method for predicting connection resistance value |
| WO2012120245A1 (en) * | 2011-03-10 | 2012-09-13 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Connection component provided with hollow inserts |
| FR2972569A1 (en) * | 2011-03-10 | 2012-09-14 | Commissariat Energie Atomique | CONNECTING COMPONENT HAVING HOLLOW INSERTS |
| WO2016064350A1 (en) * | 2014-10-23 | 2016-04-28 | Agency For Science, Technology And Research | Method of bonding a first substrate and a second substrate |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2555875B2 (en) | 1996-11-20 |
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