JPH0249577B2 - SHUTSURYOKUSEIGYOKAIRO - Google Patents

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to an output control circuit that can arbitrarily change the input that determines the output control by selecting the input based on the data currently under output control. be.

[Prior art]

Figure 1 shows a conventional output control circuit, where 1 is a flip-flop, and 2, 5, and 8 are pulse generation circuits that generate pulses in the "L" direction (from "L" to "H") when the voltage changes in the positive direction. , 3, 6, 9 are two-input
A flip-flop consisting of NAND gates,
4, 7, and 10 are two-input AND gates.
Y ₀ , Y ₁ , and Y ₂ are output signals, which are controlled by the input signals X ₀ , X ₁ , and X ₂ .

To explain its operation, when the Q terminal of the flip-flop 1 becomes "H" by the start signal 101, the flip-flop 3 is inverted through the pulse generating circuit 2, and the output signal from the AND gate 4 is inverted.
_Y0 becomes "H" and the output signal _Y0 remains "H" until the input signal _X0 changes to "L". input signal
When _X0 becomes "L", the flip-flop 6 is inverted through the pulse generation circuit 5, and the AND gate 7 is inverted.
The output signal _Y1 becomes "H". Output signal Y ₁
remains "H" until the input signal _X1 changes to "L". Next, when the input signal _X1 becomes "L", the flip-flop 9 is inverted through the pulse generating circuit 8, and the output signal _Y2 from the AND gate 10 becomes "H". Output signal Y ₂ is “L” when input signal X ₂ is
It remains "H" until it changes to .

The thus controlled output signals Y ₀ , Y ₁ , and Y ₂ were used to operate motors and electromagnetic valves to control the machine.

In the case of the above conventional control, the input signal for controlling the output signal Y ₀ is X ₀ , the input signal for controlling the output signal Y ₁ is X ₁ , and the output signal for controlling the output signal Y ₂ is X ₂ was fixed, making it extremely difficult to respond to changes in machine operation.

[Summary of the Invention] The present invention has been made to eliminate the above-mentioned drawbacks, and includes a memory that generates a required signal according to a predetermined program according to the output of a counter that inputs to a decoder. The present invention provides an output control circuit that can select an input based on the data being controlled.

[Embodiments of the invention]

FIG. 2 is a circuit diagram showing an embodiment of the present invention. In this figure, 11 is an up-down counter, and terminals A to D are the power supply of the IC, and are connected to the common side of, for example, 5V. is a borrow terminal (also represents a signal. The same applies to other symbols), is an initial setting terminal, and CD is a countdown input terminal. 12 is a pulse generation circuit, 13 is a counter that counts the output of the pulse generation circuit 12, and 14 is a 2-bit binary 4
The line decoder outputs signals Y ₀ to _{Y 3} to control the device to be controlled according to the output value of the counter 13.
Outputs. 15 is a programmable memory in which various digital patterns are written in advance according to a predetermined program;
A specific digital pattern is generated depending on the output value of the counter 13. 16 is an R-S type flip-flop, 17, 18, 19, 20, 2
1 is a 4-line to 1-line type data selector for selecting one of the input signals X ₀ to X ₃ for control to be applied to the up-down counter 11; It becomes possible to operate after receiving the digital pattern of
Any one of the input signals _X0 to _X3 is applied to the up-down counter 11, and the up-down counter 11 is counted down according to the number of pulses of that signal.

Next, the operation will be explained.

When the start signal 101 is input, the Q terminal of the flip-flop 16 becomes H and becomes operational, and since the output signals A ₀ and B ₀ of the counter 13 are both "L", only the Y ₀ output of the decoder 14 is outputted as "H". The state is as follows. The output signal A ₀ of the counter 13,
B ₀ is connected to the memory 15 and the terminals A ₀ , A ₁ , S _A , and S _B of the data selector 17, respectively.
Now, if the program of the memory 15 programs the signals of the terminals D _{0 and} D ₁ in the same way as the address "H" and "L" in response to the address input to the terminals A 0 and A ₁ , the data selector 17 The signal at the output terminal Y of the data selector 17 is output as _is , and the signal at the output terminal Y of the data selector 17 is connected to the countdown input terminal CD of the up-down counter 11. Since the up-down counter 11 is used for countdown due to the change of the input signal _X0 from "L" to "H", a borrow signal is output.
The counter 13 is counted up by "1" through this pulse generating circuit 12, and A ₀ → "H", B ₀
→ becomes “L”. Therefore, Y ₀ becomes "L" and only the output Y ₁ becomes "H". A ₀ →“H”, B ₀ →
Since the output signal Y of the data selector 17 becomes "L", the signal D ₁ of the data selector 17 is output as is, and when the input signal X ₁ changes from "L" to "H", Y ₁ → “L”, Y ₂ →
It becomes “H”. Thereafter, the output signals Y ₂ and Y ₃ can be controlled by changing the input signals X ₂ and X ₃ from "L" to "H" according to the states of the output signals A ₀ and B ₀ . When the stop signal 102 is input to the flip-flop 16, the above operation is stopped.

The above is a case where the program in the memory 15 is programmed to output the same data as the outputs A ₀ and B ₀ that determine the input address, but the program in the memory 15 is an input signal necessary for output control. By programming as shown below corresponding to X ₀ , X ₁ , X ₂ , and X ₃ , it becomes possible to control the output with any input.

That is, since the outputs A ₀ , B ₀ of the counter 13 are connected to the terminals A ₀ , A ₁ of the memory 15, the address “A ₀ , A ₁ ” of the memory 15 is “1,”
1”, the data output terminal of memory 15
If the memory 15 is programmed so that D ₀ and D ₁ are "1, 1", the data selector 17 is connected to the outputs A ₀ and B ₀ of the counter 13, so
In a state where the input of the terminal D ₃ of the data selector 17 is outputted to the output terminal Y of the data selector 17, the terminals S _A and S _B of the data selector 21 connected to the terminal D ₃ are "1, 1". ” Therefore, a change in the input signal X ₃ is transmitted to the terminal D ₃ of the data selector 17 through the output terminal Y of the data selector 21.

In this way, the terminals A ₀ and A ₁ of the memory 15 and the terminal
If you program so that D ₀ and D ₁ are the same,
_{Input signals X 0 , _ _ _}
It can be the same as connecting directly without going through 21.

Also, for the terminals A ₀ and A ₁ of the memory 15,
D ₀ and D ₁ , for example, when A ₀ and A ₁ are "0, 0"
If D ₀ and D ₁ are programmed to be “1, 0”, the input signal X ₁ is transmitted from the data selector 18 to the terminal D ₀ of the data selector 17 .

At this time, for A ₀ and A ₁ “0, 0”, D ₀ and D ₁
If it is set to "0, 1", the input signal X ₂ is similarly transmitted.

Furthermore, if D ₀ and D ₁ are set to "1, 1" while A ₀ and A ₁ are "0, 0", the input signal X ₃ is transmitted synchronously.

Similarly, when A ₀ and A ₁ are "1, 0", D ₀ and D ₁
If you program it so that it becomes "0,0", "1,0", "0,1", "1,1", the data selector 17
_The input signals X ₀ , X ₁ , X ₂ ,
It will be the same as when X ₃ is connected.

By the way, the output control circuit is normally configured with the number of output points and input points determined, so if the required number of output points and input points are prepared using the circuit configuration shown in FIG. It is possible to realize an output control circuit that can arbitrarily change the input that determines the output.

If such an output control device is used, it is possible to respond to changes in machine operation by simply changing the data in the programmable memory, without changing the hardware input signal wiring.

〔Effect of the invention〕

As described in detail above, the present invention has the advantage that inputs can be automatically set because the output of a predetermined memory is called up using the output of a counter that controls a decoder and the next determination is made.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a conventional output control circuit, and FIG. 2 is a circuit diagram showing an embodiment of the present invention. In the figure, 11 is an up-down counter, 12 is a pulse generation circuit, 13 is a counter, 14 is a decoder, 15 is a memory, 16 is a flip-flop, 1
7, 18, 19, 20, and 21 are data selectors.

Claims (1)

[Claims] 1. An up-down counter that is controlled by an input signal, a pulse generation circuit that operates based on the output of this up-down counter and outputs pulses, a counter that counts the output of this pulse generation circuit, and a counter that counts the output of this pulse generation circuit. It has a decoder that outputs a signal for controlling the device to be controlled, and further generates a specific digital pattern among various digital patterns written in advance according to a predetermined program according to the output value of the counter. and a data selector that becomes operable upon receiving the specific digital pattern from the memory and applies an input signal to the up-down counter.