JPH02295157A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPH02295157A JPH02295157A JP1116320A JP11632089A JPH02295157A JP H02295157 A JPH02295157 A JP H02295157A JP 1116320 A JP1116320 A JP 1116320A JP 11632089 A JP11632089 A JP 11632089A JP H02295157 A JPH02295157 A JP H02295157A
- Authority
- JP
- Japan
- Prior art keywords
- island
- resin
- pellet
- hole
- semiconductor pellet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 第５図に、従来の樹脂封止牛導体装置の代表例を示す。[Detailed description of the invention] [Industrial application field] FIG. 5 shows a typical example of a conventional resin-sealed conductor device.
アイランド３に接合材２により半導体ベレット１を固定
し、この半導体ペレット４と外部リード５１・・・をボ
ンディング線６１により電気的に接合され、全体を樹脂
で封止されている。A semiconductor pellet 1 is fixed to the island 3 by a bonding material 2, and the semiconductor pellet 4 and external leads 51 are electrically bonded by a bonding wire 61, and the whole is sealed with resin.
表面実装される樹脂封止半導体装置では、吸湿した状態
で、高温（２００〜２ ６ ０ ℃程度）に之さらされ
るか、この時樹脂クラックや、樹脂と半導体ベレット、
｛耐脂とアイランド、及び樹脂とリード間にすきまが生
じ、耐湿性が悪くなる。このため最近では、樹脂の向上
がなされ、樹脂とペレット、アイランド、リードとの密
着強度が大櫂に良くなっている。Surface-mounted resin-sealed semiconductor devices are exposed to high temperatures (approximately 200 to 260°C) while absorbing moisture, or are exposed to resin cracks, resin and semiconductor pellets, etc.
{Gaps are created between the grease and the island, and between the resin and the leads, resulting in poor moisture resistance. For this reason, resins have recently been improved, and the adhesion strength between the resin and pellets, islands, and leads has become extremely good.
上述した従来の樹脂封止半導体装置は、封止円１指と−
′４′導体ベレット、リード、アイランドとの密着強度
が強くなったために、吸湿されて高ストレスを受けると
、接合材の所ではがれが生じ、又はこれによりベレッＩ
・クラックが発生するという欠点かある。The conventional resin-sealed semiconductor device described above has a sealing circle with one finger and -
'4' Because the adhesion strength between the conductor bellet, lead, and island has become stronger, when moisture is absorbed and high stress is applied, the bonding material may peel or this may cause the bellet I.
・There is a drawback that cracks occur.
本発明の樹２脂封止生導体装置は、アイランドのべレッ
トマウント領域に貫通孔を有し、該貫通孔を通して、封
止樹脂と半導体ベレットが密イ「［２でいるというもの
である。The two-resin-sealed raw conductor device of the present invention has a through hole in the pellet mount area of the island, and the sealing resin and semiconductor pellet are tightly connected through the through hole.
次に、本発明について図面を参照して説明する．
第１図は、本発明の実施例《１》の断面図、第２図（ａ
）はこの実施例のアイランドの上面図、第２図（ｂ）は
第２図（ａ）のｘ−ｘ’線断面図である。Next, the present invention will be explained with reference to the drawings. Figure 1 is a sectional view of Example <1> of the present invention, and Figure 2 (a
) is a top view of the island of this embodiment, and FIG. 2(b) is a sectional view taken along line xx' in FIG. 2(a).
アイランド３は、゜ト！数個の貫通孔７を有している。Island 3 is ゜to! It has several through holes 7.
アイランド３の貫通孔７は、封止樹脂６で充てんされ、
半導体ベレット１と封止樹脂６の密着により、半導体ベ
レット１の固定を強固なものになっており、吸湿された
状態でエストレスが加わっても、従来のような接合部で
のはがれを防止している。２は金ペースト又は銀ペース
ト等をアイランドに塗布し、半導体ベレットを搭載した
のち焼成してなる接合材である．
第２図（ａ）及び（ｂ）は、本発明の実施例（２）のア
イランドの上面図及び断面図である．この実施例では、
アイランド３に設けた貫通孔７が円形をしており、さら
にアイランド３の側面へ抜けている．
このように、本発明では、貫通孔の形状は特に限定せず
．さらに、貫通方向も特に限定せず、ペレットマウント
領域から、その領域外へ向けて貫通．していれば良い。The through hole 7 of the island 3 is filled with a sealing resin 6,
Due to the close contact between the semiconductor pellet 1 and the sealing resin 6, the semiconductor pellet 1 is firmly fixed, and even if stress is applied in a moisture-absorbed state, peeling off at the joint like in the conventional method is prevented. There is. 2 is a bonding material made by applying gold paste, silver paste, etc. to the island, mounting a semiconductor pellet, and then firing it. FIGS. 2(a) and 2(b) are a top view and a cross-sectional view of the island of Example (2) of the present invention. In this example,
A through hole 7 provided in the island 3 is circular and extends to the side of the island 3. Thus, in the present invention, the shape of the through hole is not particularly limited. Furthermore, the direction of penetration is not particularly limited, and the penetration direction is from the pellet mount area to the outside of that area. It's fine if you do.
第３図（ａ）及び（ｂ）は、本発明の実施例《３》のア
イランドの上面図及び断面図である。FIGS. 3(a) and 3(b) are a top view and a sectional view of the island of Example <3> of the present invention.
この実施例では、アイランド３に設けた貫通孔７がテー
パーを有している。このように、貫通孔内のテーパー等
も特に限定しないものとする。In this embodiment, the through hole 7 provided in the island 3 has a taper. In this way, the taper in the through hole and the like are not particularly limited.
又、貫通孔の個数もアイランドの中央部に比較的大きな
ものを１個設けるようにしてもよい。Also, one relatively large number of through holes may be provided in the center of the island.
以上説明したように、本発明は、アイランドのべレット
マウント領域に貫通孔を設け、この貫通孔を埋める封止
樹脂で半導体ペレットを固定することにより、吸湿した
状態での熱ストレス耐量を向上し、表面実装に適した樹
脂封止半導体装置を供給できる効果がある。As explained above, the present invention improves thermal stress resistance in a moisture-absorbed state by providing a through hole in the pellet mount area of the island and fixing the semiconductor pellet with a sealing resin that fills the through hole. This has the effect of supplying a resin-sealed semiconductor device suitable for surface mounting.
第１図は本発明の実施例（１》の樹脂封止半導体装置の
断面図、第２図（ａ），（ｂ）はそのアイランドの上面
図及び断面図、第３図（ａ）及び（ｂ）は本発明の実施
例《２》のアーイランドの上面図及び断面図、第４図（
ａ）及び（ｂ）は本発明の実施例（３）のアイランドの
上面図及び断面図、第５図は、従来の樹脂封止半導体装
置の断面図である。
１・・・半導体ペレット、２・・・接合材、３・・・ア
イランド、４ｉ，’４ｊ・・・ボンディング線、５ｉ，
５，ｊ・・・外部リード、６・・・封止樹脂、７・・・
アイランド・の貫通孔。FIG. 1 is a sectional view of a resin-sealed semiconductor device according to the embodiment (1) of the present invention, FIGS. 2(a) and (b) are a top view and a sectional view of the island, and FIGS. 3(a) and ( b) is a top view and a cross-sectional view of the island of Example <<2>> of the present invention, and Fig. 4 (
a) and (b) are a top view and a cross-sectional view of an island according to Example (3) of the present invention, and FIG. 5 is a cross-sectional view of a conventional resin-sealed semiconductor device. DESCRIPTION OF SYMBOLS 1... Semiconductor pellet, 2... Bonding material, 3... Island, 4i,'4j... Bonding wire, 5i,
5, j... External lead, 6... Sealing resin, 7...
Island through hole.
Claims (1)
貫通孔を通して、封止樹脂と半導体ペレットが密着して
いることを特徴とする樹脂封止半導体装置。A resin-sealed semiconductor device having a through hole in a pellet mount area of the island, through which a sealing resin and a semiconductor pellet are in close contact.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1116320A JPH02295157A (en) | 1989-05-09 | 1989-05-09 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1116320A JPH02295157A (en) | 1989-05-09 | 1989-05-09 | Resin-sealed semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02295157A true JPH02295157A (en) | 1990-12-06 |
Family
ID=14684064
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1116320A Pending JPH02295157A (en) | 1989-05-09 | 1989-05-09 | Resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02295157A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008300587A (en) * | 2007-05-31 | 2008-12-11 | Renesas Technology Corp | Semiconductor device and manufacturing method thereof |
-
1989
- 1989-05-09 JP JP1116320A patent/JPH02295157A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008300587A (en) * | 2007-05-31 | 2008-12-11 | Renesas Technology Corp | Semiconductor device and manufacturing method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5972738A (en) | PBGA stiffener package | |
| JP2000269166A (en) | Manufacture of integrated circuit chip and semiconductor device | |
| JPH04363031A (en) | Semiconductor device | |
| JPH02295157A (en) | Resin-sealed semiconductor device | |
| JPH02125454A (en) | Resin-sealed semiconductor device | |
| JPS62229949A (en) | Manufacture of resin-sealed semiconductor | |
| JPH03149865A (en) | Lead frame | |
| JPH0547988A (en) | Semiconductor device | |
| JPS6313337A (en) | Process of mounting semiconductor element | |
| JP2589520B2 (en) | Method for manufacturing resin-encapsulated semiconductor device | |
| JPS6245133A (en) | Pellet mounting method | |
| JP3145892B2 (en) | Resin-sealed semiconductor device | |
| JPH09283661A (en) | Resin-sealed semiconductor device | |
| JPH07288262A (en) | Semiconductor device | |
| JP2752950B2 (en) | Semiconductor device and manufacturing method thereof | |
| JPH09223767A (en) | Lead frame | |
| JPS6018938A (en) | Case for semiconductor device | |
| JPH02292850A (en) | Lead frame | |
| JPH027469Y2 (en) | ||
| JPS61125028A (en) | Semiconductor device | |
| JPH08306744A (en) | Electronic device | |
| JPH01122143A (en) | Semiconductor device | |
| JPH01171251A (en) | Pin grid array package | |
| JPH05308088A (en) | Semiconductor device and manufacturing method thereof | |
| JPS6147649A (en) | Semiconductor device and manufacture thereof |