JPH0229179A - High efficiency coding device for picture signal - Google Patents

Abstract

PURPOSE:To prevent the lowering of compressiblity by a noise component and to improve restored picture quality by removing the noise component by a non-linear filter before executing adaptive variable sampling. CONSTITUTION:Noise removing circuits 103 and 105 to compose the non-linear filter are provided at the front step of an adaptive variable sampling circuit 106. Further, as the composition of the non-linear filter, the composition to selectively output the intermediate value between the value of an object picture element and that of a reference picture element around the object picture element can be used. Compared with a low-pass filter, neither an adder circuit nor a multiplier circuit is necessary for these noise removing circuits, hardware is simplified, and rounding in the change of a signal is minimized. Thus, the lowering of the compressibility by the noise can be prevented, and the picture quality can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a highly efficient encoding device for an image signal such as a television signal, and particularly to one using subsampling.

[Summary of the invention]

In this invention, a high-efficiency encoding device for an image signal compresses the amount of transmitted data compared to the amount of original data by subsampling a plurality of pixels having a temporal or spatial arrangement. A noise removal circuit having a filter configuration is provided at the front stage of the adaptive variable sampling circuit, so that the data amount compression function of the adaptive sampling circuit can be fully demonstrated.

As the noise removal circuit, a filter that outputs an intermediate value between the values of a plurality of reference pixels and the value of a pixel of interest can be used. In addition, as another configuration of the noise removal circuit, the maximum value and the minimum value are detected between the value of the reference pixel and the value of the pixel of interest, and the value of the pixel of interest and the maximum value and minimum value or the maximum value and the minimum value are , and select the intermediate value between the value of the pixel of interest and the maximum and minimum values, or the maximum and minimum values with offsets added respectively. You can use the one that outputs .

The adaptive variable sampling circuit includes a circuit that transmits the value of a first pixel regularly located among a plurality of pixels in a predetermined number of bits, and a pixel of interest of a second pixel other than the first pixel. A circuit that calculates a predicted value of a second pixel; and a circuit that transmits data of the second pixel using a number of bits less than a predetermined number of bits according to a prediction error between the value of the pixel of interest and the predicted value of the second pixel. It consists of

[Conventional technology]

When transmitting a digital video signal, a known method for compressing the amount of data to be transmitted compared to the original amount of data is to thin out pixels by subsampling and lower the subsampling frequency. As one type of subsampling, it has been proposed that image data is thinned out by two, and a subsampling point and a 2-bit flag indicating the position of the subsampling point used during interpolation are transmitted. When one pixel data of a digital video signal is 8 bits, adding 2 bits of the flag results in 5 bits per pixel, and the compression ratio becomes (5/8).

In this conventional subsampling, since the subsampling pattern is always the same, there is a problem in that the restored image quality is noticeably degraded in areas such as the outline of an object in the image.

In particular, we set the subsampling rate higher than η (then
The drawback was that the image quality deteriorated significantly.

In order to solve the above-mentioned problems, the applicant of the present application, as described in Japanese Patent Application No. 110098/1983,
Divide one image into many two-dimensional blocks, find the difference (dynamic range) between the maximum and minimum values of multiple pixel data in this block, and set the subsampling period according to the dynamic range of the block. A variable encoding method is proposed. That is, the dynamic range is small.

As for the block, it is determined that it is a flat image, and the subsampling period is lengthened, for example (1/8),
Furthermore, blocks with a relatively large dynamic range are judged to be images with changes, and the subsampling period is set to (y2), and furthermore, blocks with an extremely large dynamic range are judged to be images with large changes. Therefore, no subsampling is performed.

As mentioned above, a high-efficiency encoding device that selectively switches the subsampling period according to the dynamic range sets the subsampling period in units of blocks, so it is possible to determine the quality of the restored image in each block. This had the disadvantage that block distortion was noticeable. Furthermore, there are limits to the types of subsampling cycles that can be selected, and the adaptability to image characteristics is insufficient.

A high-efficiency encoding device for image signals that solves these problems, does not cause block-by-block deterioration, can form arbitrary subsampling patterns that are adapted to image characteristics, and can obtain good restored images. This is proposed by the applicant. For example, in the specification of Japanese Patent Application No. 62-208957,
Transmits regularly located basic pixels among a plurality of pixels having a temporal or spatial arrangement, and uses the basic pixels to transmit the first
When the prediction error of the interpolated prediction is large, the original pixel signal is transmitted, and when the prediction error is small, it is replaced with the interpolated value, and then either the basic pixel, the original pixel signal, or the interpolated value is transmitted. is used to perform interpolated prediction with a second density that is finer than the first density, and when the prediction error of the interpolated prediction is large, the original pixel signal is transmitted, and when the prediction error is small, the adaptive value is replaced with the interpolated value. A variable sampling device is disclosed.

Furthermore, Japanese Patent Application No. 62-85210 discloses an adaptive variable sampling device similar to the one described above, which is capable of real-time processing by omitting the process of replacing with interpolated values. has been done.

[Problem to be solved by the invention]

The adaptive variable sampling device described above is applied, for example, to the transmission of high-definition television signals. High-definition television signals have stronger correlation between pixels than standard television signals and are easier to compress. However, the output signal of a video camera for high-definition television signals is
There is a problem with poor S/N. For signals with poor S/N,
When adaptive sampling is used, the prediction error becomes large due to noise, and as a result, the number of pixels to be thinned out decreases, and the compression rate does not become high enough.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a highly efficient encoding device for image signals that solves the problem of reduction in compression rate due to noise and improves image quality.

[Means to solve the problem]

The present invention includes a circuit that extracts a plurality of peripheral pixels of a pixel of interest from a plurality of pixels having a temporal or spatial arrangement as a reference pixel; The adaptive variable sampling circuit includes a noise removal circuit that selectively outputs a value, and an adaptive variable sampling circuit provided after the noise removal circuit. a circuit for transmitting the value of a pixel in a predetermined number of bits, and a circuit for calculating a predicted value of a pixel of interest of a second pixel with respect to a pixel of interest of a second pixel other than the first pixel;
and a circuit that transmits data regarding the second pixel using a number of bits smaller than a predetermined number of bits in accordance with a prediction error between the value of the pixel of interest and the predicted value of the second pixel.

In addition, in the present invention, as a noise removal circuit provided at the front stage of the adaptive variable sampling circuit similar to the above, the maximum value and the minimum value are detected among the values of a plurality of reference pixels and the value of the pixel of interest, The value of the pixel of interest and the maximum value and minimum value or the value of the maximum value and minimum value with an offset added to each other are compared, and the value of the pixel of interest and the maximum value and minimum value or the maximum value and minimum value are determined. A configuration is applied that selectively outputs intermediate values between the values to which offsets are added.

[Operation] A nonlinear filter is provided before the adaptive variable density sampling device to remove noise. As the nonlinear filter, a configuration can be used that selectively outputs an intermediate value between the value of the pixel of interest and the values of reference pixels around the pixel of interest. Compared to a low-pass filter, this noise removal circuit has the advantage that it does not require an addition circuit or a multiplication circuit, has simpler hardware, and has less rounding of signal changes.

Furthermore, as a noise removal circuit, the maximum value and the minimum value are detected between the value of the reference pixel and the value of the pixel of interest, and the maximum value and the minimum value or the value obtained by adding an offset to each of the maximum value and the minimum value are detected. When the value of the pixel of interest exceeds the maximum (tiI
(or a value with an offset added to the maximum value) or a minimum value (or a value with an offset added to the minimum value), and when the value of the target pixel is between these upper and lower values,
A configuration that outputs the value of the pixel of interest as is can be used. The latter noise removal circuit has the advantage that signal changes are less blunt than the former noise removal circuit.

In an adaptive variable sampling device, for example, the first pixel located in every (4×4) pixel of the digital video signal is always transmitted without being thinned out.

The second pixels other than the first pixels are thinned out by subsampling or transmitted as they are. This determination is made depending on the size of the predicted error when the thinned out pixels are interpolated by surrounding pixels on the receiving side. That is, when the prediction error is large, decimation is not possible and the original data is transmitted; when the prediction error is small, decimation is possible and the original data is not transmitted. The second pixel data and the first pixel data whose transmission/thinning is controlled in this way are transmitted. One bit of control data for controlling transmission/thinning is added to each sample of the second pixel data. On the receiving side,
It is determined whether interpolation is necessary by looking at the control data.

The transmission/thinning decision based on the prediction error is made using the original data in which the prediction error is large and not thinned out, or the interpolated value in which the prediction error is small and is thinned out. This determination corresponds to the processing performed on the receiving side. However, the original data may always be used to determine whether to transmit or thin out the data. In the latter case, real-time processing is possible and suitable for processing moving images.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. This description is given in the following order.

a, Configuration of one embodiment, Example of noise removal filter C, Other example of noise removal filter d, Subsampling encoder e, Subsampling decoder f6 Modified example a, Configuration of one embodiment FIG. 1 shows the present invention. The overall configuration of one embodiment is shown. In FIG. 1, a digital video signal in which one sample is quantized to 8 bits, for example, is supplied to an input terminal indicated by 101. This digital video signal is sent to delay circuit 1.
02.

The delay circuit 102 is composed of two sample delay circuits, and as shown in FIG. 3, the delay circuit 102 supplies three consecutive pixels Pa on the same line.

Data on Pb and Pc can be obtained simultaneously. In FIG. 3, solid lines indicate lines within the first field, and dashed lines indicate lines within the second field.

The data of these pixels Pa, Pb, and Pc are supplied to a horizontal noise removal filter 103.

The noise removal filter 103 includes three pixels Pa.

The structure is such that the levels of Pb and Pc data are compared and pixel data at the center level is selectively output. The output signal of the noise removal filter 103 is transmitted to the delay circuit 10.
4.

The delay circuit 104 is composed of two line delay circuits, and as shown in FIG. 3, three pixels Pd and Pb are aligned in the vertical direction within the same field.

Pe data is taken out from delay circuit 104 at the same time. Strictly speaking, data different from the original data is processed by the noise removal filter 103 in the previous stage, so the data different from the original data is sent to the delay circuit 1.
It may occur from 04 onwards.

The data of these pixels Pd, Pb, and Pe are supplied to a vertical noise removal filter 105. Similar to the horizontal noise removal filter 103, the noise removal filter 105 is configured to compare the levels of the data of the three pixels Pd, Pb, and Pe, and selectively output the data at the center level. ing.

The output signal of the vertical noise removal filter 105 is supplied to a subsampling encoder 106. The subsampling encoder 106 performs variable density subsampling processing, as will be described later.

b. An example of a noise removal filter The horizontal noise removal filter 103 has the configuration shown in FIG. This configuration is similar to that disclosed in Japanese Utility Model Application Publication No. 59-50014 proposed by the applicant of the present application. The vertical noise removal filter 105 also has the same configuration as that in FIG. 2, although it is not shown. The delay circuit 102 simultaneously supplies data of pixels Pa, Pb, and Pc. The pixel Pb is the pixel of interest (that is, the pixel targeted for processing), and the other pixels Pa and Pc are reference pixels.

The data of pixels Pa and Pb are supplied to the comparator 111, and the data of pixels Pa and Pc are supplied to the comparator 112.
The data of pixels Pb and Pc are supplied to the comparator 113. Comparator 111.112,1
At step 13, the levels of the two input data are compared, and three output signals are generated depending on the level relationship.

For example, when (Pa>Pb), the comparator 111
It generates an output signal of (100), generates an output signal of (010) when (Pa=Pb), and generates an output signal of (001) when (Pa<Pb). Output signals similar to those of comparator 111 are generated from other comparators 112 and 113, respectively. These comparators 1
A total of 9 bits of output signal of 11,112°113 is RO
Supplied to M115.

The ROM 115 has a determination function, determines an intermediate value among the three pieces of data, and supplies a control signal to the selector 114. The selector 114 has pixels Pa, Pb, and Pc.
data is supplied, and one piece of data is selectively taken out to the output terminal 116 in response to a control signal from the ROM 115. If two of the three data have the same level, one of the two data is selected, and if the three data have the same level,
One of the three pieces of data is selected. Since pixel data having an intermediate value is selected, when the local correlation of the image is high and the change in the image signal is monotonous,
Noise can be effectively removed.

C. Other examples of noise removal filters Other examples of noise removal filters are shown in FIGS. 4 and 5. These configurations are based on the patent application filed in 1983, which was previously proposed by the applicant.
Specification No. 2-187083 and Japanese Patent Application No. 1987-19222
This is the same as that described in Specification No. 7.

In the configuration shown in FIG. 4, an input digital video signal from an input terminal 121 is supplied to a delay circuit 122. In the configuration shown in FIG. The delay circuit 122 has a configuration that combines a sample delay circuit and a horizontal delay circuit, and as shown in FIG.
Pixels Pa, Pc, Pd, and Pe on the upper, lower, left, and right sides of the center are taken out from the delay circuit 122 at the same time. Pixel Pb is a pixel of interest (i.e., a pixel targeted for processing),
Other pixels Pa, Pc, Pd, and Pe are reference pixels.

Data of a reference pixel among the five pixel data from the delay circuit 122 is supplied to the maximum value and minimum value detection circuit 123, and data of the pixel of interest is supplied to the selection circuit 124.

The detected maximum value MAX is supplied to the selection circuit 124 and the comparison circuit 125, and the detected minimum value MIN is supplied to the selection circuit 124 and the comparison circuit 126. Output signals from these comparison circuits 125 and 126 are supplied to a determination circuit 127.

A control signal is generated from the determination circuit 127 to the selection circuit 124, and in accordance with this control signal, the value of the pixel of interest, either the maximum value MAX or the minimum value MIN, is selected and taken out to the output terminal 128. When the value of the pixel of interest pb is expressed as Lb, the selection circuit 124 operates as follows.

When MAX<Lb The maximum value MAX is selected.

When MIN≦Lb≦MAX The pbO value Lb of the pixel of interest is selected.

When M I NIL b.

The minimum value MIN is selected.

The noise removal filter shown in FIG. 4 can remove noise that has no spatial correlation, similar to the noise removal filter shown in FIG. 2. As shown in Figure 6, a noise removal filter that selects the above-mentioned intermediate value (see Figure 2)
In this case, the level range of the output signal to be selected is limited to that shown by 143. However, in the noise removal filter shown in FIG. 4, the level range of the output signal is expanded to a level range 142 between the maximum value MAX and the minimum value MIH.
The signal distortion caused by noise removal can be made smaller than in the above-described noise removal circuit.

FIG. 5 shows still another example of the noise removal filter, which has the same configuration as FIG. 4. In FIG. 5, a one-dimensional filter is configured, and data of three consecutive pixels on the same line are simultaneously taken out from a delay circuit 132 connected to an input terminal 131. The data of the reference pixels on both sides are supplied to the maximum value and minimum value detection circuit 133, and the data of the center pixel of interest is supplied to the selection circuit 134. The detected maximum value is supplied to an addition circuit 135, and the detected minimum value is supplied to a subtraction circuit 136. These adder circuits 13
5 and the subtraction circuit 136 are supplied with offset data Δ from a terminal 137.

The respective output signals of the adder circuit 135 and the subtracter circuit 136 are supplied to the selection circuit 134 and comparison circuits 138 and 139. The comparison circuits 13B and 139 are supplied with the value of the pixel of interest, and the output signals of the comparison circuits 138 and 139 are supplied to the determination circuit 140. The output signal of the determination circuit 140 is supplied to the selection circuit 134 as a control signal.

The selection circuit 134 performs the same selection operation as the noise removal filter shown in FIG. Compared to the noise removal filter shown in FIG. 4, the noise removal filter shown in FIG. It is given more importance than the maximum value MAX and the minimum value MIN, and noise can be effectively removed.

d. Subsampling Encoder Referring to FIG. 7, the subsampling encoder 106 provided on the image signal transmission side (or recording side in the case of a VTR or the like) will be described. In FIG. 7, for example, a digital video signal is supplied to an input terminal indicated by 1.

This digital video signal has noise components removed by the above-described noise removal filter.

Input terminal 1 has a line delay circuit 2.3 indicated by LD.
．． 4.5 cascade connections are connected. Further, sample delay circuits 6 and 7 indicated by SD are connected in series to the input terminal 1, sample delay circuits 8 and 9 are connected in series to the output side of the line delay circuit 2, and the output of the line delay circuit 3 is connected in series. Sample delay circuits 10, 11, 12 and 13 are connected in series on the output side of line delay circuit 4, sample delay circuits 14 and 15 are connected in series on the output side of line delay circuit 5, and sample delay circuit 16 is connected on the output side of line delay circuit 5. and 17 are connected in series. These line delay circuits 2.3.4.5 are
Sample delay circuits 6. each having a delay amount of one horizontal period;
7.8, . . . , 17 each have a delay amount of one sampling period.

Line delay circuits 2 to 5 and sample delay circuits 6 to 17 simultaneously extract data of a plurality of pixels included in a predetermined two-dimensional area of a televised image.

Subsampling according to this embodiment will be explained with reference to FIG. FIG. 8 shows a part of a two-dimensional (field or frame) area of an input digital video signal, where the pixel spacing in the horizontal direction corresponds to the sampling period, and the pixel spacing in the vertical direction corresponds to the line spacing. ing.

Symbols attached to each pixel in Figure 8 (Δ, ・, mouth, ×, O
) each represents a difference in interpolation processing. First, O
represents basic pixels located every 4 lines and every 4 pixels. One basic pixel out of every 16 pixels is always transmitted without being thinned out. Pixels other than the basic pixel are compared with the average value of two pixels, as described below, and are thinned out when the difference (prediction error) between the original pixel data and the average value is less than a threshold value. Conversely, if the prediction error exceeds the threshold, it is transmitted.

(2) Pixel 2, represented by Δ, is compared with the average value of pixel data located in the upper and lower lines, respectively.

For example, pixel a2 has an average value C+A(al+-a3)]
compared to

(2) Pixels represented by .: Compare with the average value of the pixels located on the upper and lower lines separated by two lines.

For example, pixel a3 is compared with the average value ('4(al+a5)).

- Pixel represented by mouth: Compare with the average value of pixels located two pixels apart on the left and right.

For example, pixel C3 is compared with the average value (%(a3+e3)).

■ Pixels represented by ×: Compare with the average value of pixels adjacent to the left and right.

For example, pixel b2 is compared with the average value [η(a2+c2)].

The output side of the sample delay circuit 11 in FIG.
and the gate circuit 27. selector 18 and 1
9 has five input terminals, first to fifth, and sequentially sends the input data supplied to each of these five input terminals to the output terminal by a selection signal from the terminal 20 synchronized with the sampling clock. Output selectively.

The output data of the sample delay circuit 7 is supplied to the first input terminal of the selector 18, and the output data of the sample delay circuit 17 is supplied to the first input terminal of the selector 19. Therefore, if the pixel of interest is a pixel represented by Δ,
The input data supplied to the first input terminals of selectors 1 and 19 are selected. The output data of the sample delay circuits 9 and 15 are supplied to second input terminals of the selectors 18 and 19, respectively. Therefore, when the pixel of interest is a pixel represented by *, the input data supplied to the second input terminals of each of the selectors 18 and 19 is selected. The output data of the line delay circuit 3 and the sample delay circuit 13 are supplied to the third input terminals of the selectors 18 and 19, respectively. Therefore, when the pixel of interest is a pixel represented by a mouth, the input data supplied to the third input terminals of the selectors 18 and 19 are selected. selector 18 and 1
Sample delay circuits 10 and 1 are connected to the fourth input terminal of 9.
Two output data are respectively supplied. Therefore, when the pixel of interest is a pixel represented by an x, the input data supplied to the fourth input terminals of each of the selectors 18 and 19 is selected. The output data (target pixel) of the sample delay circuit 11 is supplied to the fifth input terminals of the selectors 18 and 19. Therefore, when the target pixel is a basic pixel represented by O,
Both selectors 18 and 19 select basic pixels.

The output data of the selectors 18 and 19 are supplied to an adder circuit 21, and the output signal of the adder circuit 21 is supplied to an η multiplier circuit 22. Therefore, the A-multiplying circuit 21 generates average value data of the two pixel data selected by the selectors 18 and 19, respectively.

This average value data and the data of the pixel of interest from the sample delay circuit 11 are supplied to the subtraction circuit 23.
The difference data from is converted into an absolute value in the absolute value conversion circuit 24. The output data of this absolute value conversion circuit 24 is supplied to a comparison circuit 25 and compared with a threshold value from a terminal 26.

As described above, the output data of the absolute value converting circuit 24 represents the prediction error that occurs when interpolation is performed using the average value of two pixels. If this prediction error is less than the threshold value, it means that the pixel can be thinned out, so the control data (1 bit) from the comparator circuit 25 becomes ++ 1 +
It is considered to be +. On the other hand, if the prediction error exceeds the threshold value, this means that interpolation cannot be performed satisfactorily on the receiving side, so the control data from the comparator circuit 25 is set to "0".

The on/off of the gate circuit 27 is controlled by this control data. When the control data is 0'', the gate circuit 2'7 is turned on and the original pixel data is taken out to the output terminal 28, and when the control data is 1'', the gate circuit 2'7 is turned on and the original pixel data is taken out to the output terminal 28.
7 is turned off and the original pixel data is not taken out to the output terminal 28. Further, the control data is taken out to the output terminal 29 and transmitted together with the subsampled video data. That is, the output terminal 28 of the subsampling encoder
．． 29 (corresponding to the output terminal 107 in FIG. 1) is connected to a framing circuit (not shown), and in this framing circuit, pixel data and control data are combined, and in the case of pixel data to be transmitted. In this case, 9 bits of data are transmitted per pixel, and in the case of pixel data to be thinned out, only 1 bit of control data is transmitted per pixel.

As described above, subsampling is performed for each pixel depending on whether the prediction error is large or not. That is, transmission/thinning is adaptively controlled not on a block-by-block basis but on a pixel-by-pixel basis, which is the smallest unit. In addition, when determining whether to perform thinning based on the prediction error, actual data is used instead of interpolated data, so repeated processing can be avoided.
Real-time processing is possible.

e. Subsampling Decoder FIG. 9 shows a subsampling decoder provided on the receiving side (in the case of a VTR or the like, on the reproducing side). In FIG. 9, a received digital video signal is supplied to an input terminal indicated at 31, and a sampling clock synchronized with the received data is supplied to an input terminal indicated at 32.

The input terminal 31 includes line delay circuits 33, 34, 35 .
36 are connected in series. Serial to parallel conversion circuits 41, 42, 43, 44, and 45 are connected to the input terminal 31 and the output side of each of the line delay circuits 33 to 36, respectively. These serial-to-parallel conversion circuits 41 to 45 sequentially receive received data of different lines according to the sampling clock, and the output signal of the X frequency dividing circuit 37 is used to
Four pixel data are latched, and five pixel data are generated in parallel when the next pixel data is input. Therefore, at a certain timing, the pixels shown in FIG. 8 are output from each of the serial to parallel conversion circuits 41 to 45. For example, from the line delay circuit 36 (al, b
The four pixel data (1, C1, di) are latched into the serial-to-parallel conversion circuit 45, and five pixel data including the next pixel data e1 are generated from the serial-to-parallel conversion circuit 45 at the same time.

Among the output signals of the series → parallel conversion circuits 41 to 45, a
5-~e5 and e1-e4 are peripheral pixel data used for interpolation, and excluding these pixels < (4
X4=16) pixels are subjected to interpolation. 51.5
2.53...68.69 each indicate an interpolation circuit, and each has the same configuration. FIG. 10 specifically shows the configuration of the interpolation circuit 51.

The interpolation circuit 51 has input terminals 91, 92 and 93 and an output terminal 94, and the input terminal 91 is supplied with pixel data C3 (including 1-bit control data) to be interpolated. Terminals 92 and 93 are supplied with peripheral pixel data e5 and a5 necessary for interpolation. Input terminal 9
The pixel data from 2 and 93 are supplied to an adder circuit 95, and the output signal of the adder circuit 95 is supplied to an A multiplier circuit 96.

The output signal of this A-multiplier circuit 96 is an interpolated value in average value interpolation. Pixel data from the input terminal 91 and the output signal of the A multiplication circuit 96 are supplied to a selector 97.

The selector 97 is controlled by 1-bit control data included in the pixel data from the input terminal 92, and when the control data is "1" (thinned), the selector 97 selects the output signal of the A-multiplying circuit 96. When the control data is “0” (transmission), the selector 97 selects the pixel data from the input terminal 91. The output signal of the selector 97 is obtained at the output terminal 94.

When the original pixel data is a thinned-out pixel, the interpolation circuits 51 to 69
The interpolated values obtained from each are shown below.

Interpolation circuit 51: c5→'A (a 5 + e 5 )
Interpolation circuit 52: e4-+'/A(e3+e5
) Interpolation circuit 53: c4→%(c3+c5) Interpolation circuit 54: a4→'A(a3+a5) interpolation circuit 5
5: d, 4→y2 (c 4 + e 4) interpolation circuit 5
6: b 4 = 'A (a 4 + c 4 )
Interpolation circuit 57: e3→η(el+e5) interpolation circuit 58
: a3-'A (a1+a5) interpolation circuit 59:
c3-++A (a3+e3) interpolation circuit 60:
d3-'A (c3+e3) interpolation circuit 6
1: b3-'A (a3+c3) interpolation circuit 62: e2→y2(e1+e3)
Interpolation circuit 63: c2-% (c1+c3) interpolation circuit 64: a2→% (al+a3) interpolation circuit 65:
d2→'A (c2+e2) interpolation circuit 66: b2→'
A(a2+c2) interpolation circuit 67: cl→! 4(a1+e
l) Interpolation circuit 68: d 1→% (c 1 +e
1) Interpolation circuit 69: bl→'A (a 1 + c 1)
Among the output signals from the interpolation circuits 51 to 69 described above, (4
The 16 pixel data included in the range of
3.74 respectively.

The four pixel data after interpolation are latched in these parallel-to-serial conversion circuits 71 to 74, respectively, by the output signal of the frequency divider circuit 37. In addition, parallel → serial conversion circuit 71 ~
74 outputs serial restored data in synchronization with the sampling clock from the terminal 32. Note that the pixel data written in FIG. 9 will of course be different at the time when the next clock from the X frequency divider circuit 37 is generated.

That is, the pixel data a1, a2, a3, a4, a5 of the serial to parallel conversion circuits 41 to 45 are the pixel data e1,
Replaced by e2, e3, e4, e5.

The restored data from the parallel to serial conversion circuit 71 is supplied to the line delay circuit 75, and the output data of the line delay circuit 75 and the restored data from the parallel to serial conversion circuit 72 are supplied to the selector 76. The output data of the selector 76 is supplied to a line delay circuit 77, and the output data of the line delay circuit 77 and the restored data from the parallel to serial conversion circuit 73 are supplied to a selector 78. The output data of the selector 7th is supplied to the line delay circuit 79, and the output data of the line delay circuit 79 and the restored data from the parallel to serial conversion circuit 74 are supplied to the selector 80. These line delay circuits 7
5.77.79 and selector 76.78.80 are provided to convert the order of the restored data to the same order as television scanning, and the output terminal 81 of selector 80 has the order of television scanning. Restored data is obtained.

f. Modification In this invention, when transmitting interpolated values, original data is replaced with interpolated values, prediction errors are detected using the interpolated values, and selection of transmission and thinning is determined based on the prediction errors. It's okay.

Further, the present invention can also be applied when used in combination with other high-efficiency codes. The applicant divides the screen into a large number of blocks, calculates the dynamic range for each block, divides this dynamic range into a number of areas determined by a fixed or variable number of bits, and divides the screen into a large number of blocks to which the pixel data after minimum value removal belongs. A dynamic range code (referred to as ADRC) that transmits a code signal corresponding to the area
is proposed first.

As shown in FIG. 11, a subsampling encoder 152 similar to that described above is connected to an input terminal -151 to which a digital video signal is supplied, and an ADRC encoder 153 is connected to the subsampling encoder 152. The ADRC encoder 153 converts the transmitted pixel data into a code signal with a smaller number of bits than the original number of bits, and an output signal with a compressed amount of data is obtained at the output terminal 154.

As shown in FIG. 12, the decoder system corresponding to the encoder system shown in FIG. The subsampling decoder 157 has the same configuration as that shown in FIG. 9, and restored data is obtained at an output terminal 158.

Furthermore, the control data in the present invention may be encoded by run-length encoding.

[Effects of the Invention] According to the present invention, since noise components are removed using a nonlinear filter before performing adaptive variable sampling, the prediction error increases due to the noise components, and the number of pixels to be thinned out decreases. This can be prevented. Therefore, the compression ratio is prevented from becoming low due to noise components. By removing noise, noise in the image can be prevented from becoming noticeable. The adaptive sampling according to this invention is
Unlike the method of switching subsampling patterns on a block-by-block basis, it is possible to prevent noticeable deterioration of restored pixels on a block-by-block basis, and the subsampling is highly adaptable to the characteristics of the image, improving the quality of the restored image. Can be considered good.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of this invention, FIG. 2 is a block diagram of an example of a noise removal filter that can be used in this invention, and FIG. 3 is a route diagram showing the arrangement of pixels used to explain the noise removal filter. , FIG. 4 is a block diagram of another example of the noise removal filter that can be used in this invention, FIG. 5 is a block diagram of still another example of the noise removal filter that can be used in this invention, and FIG. 6 is a block diagram of another example of the noise removal filter that can be used in this invention. FIG. 7 is a block diagram of an example of a subsampling encoder that can be used in the present invention, FIG. 8 is a route map used to explain the sampling pattern, and FIG. 9 corresponds to the sampling encoder. A block diagram of a sampling decoder, FIG. 10 is a block diagram showing an example of a specific configuration of an interpolation circuit provided in the sampling decoder,
FIG. 11 is a block diagram of an example of an encoder system, and FIG. 12 is a block diagram of an example of a decoder system. Description of main symbols in the drawings 101: Input terminal, 103, TOS: Noise removal filter, 106: Sampling encoder, 107: Output terminal. -F Zetsusho 1 Figure 1 Figure 4 - Sign 7 Effects Fill 7 - Combine 1 Figure 2 Figure 3

Claims (2)

[Claims] (1) means for extracting a plurality of peripheral pixels of a pixel of interest of a plurality of pixels having a temporal or spatial arrangement as reference pixels; and among the values of the plurality of reference pixels and the value of the pixel of interest,
The adaptive variable sampling means includes a noise removal circuit that selectively outputs an intermediate value, and adaptive variable sampling means provided after the noise removal circuit, and the adaptive variable sampling means performs regular sampling among the plurality of pixels. means for transmitting the value of a first pixel located at a predetermined number of bits, and means for determining a predicted value of the pixel of interest of the second pixel with respect to the pixel of interest of the second pixel other than the first pixel. and means for transmitting data regarding the second pixel using a number of bits smaller than the predetermined number of bits according to a prediction error between the value of the pixel of interest of the second pixel and the predicted value. A high-efficiency encoding device for image signals. (2) means for extracting a plurality of peripheral pixels of a pixel of interest of a plurality of pixels having a temporal or spatial arrangement as reference pixels, and among the values of the plurality of reference pixels and the value of the pixel of interest,
The maximum value and minimum value are detected, and the value of the pixel of interest is compared with the maximum value and minimum value or the value obtained by adding an offset to the maximum value and minimum value, respectively, and the value of the pixel of interest is compared with the value of the pixel of interest. a noise removal circuit that selectively outputs an intermediate value between the maximum value and the minimum value or a value obtained by adding an offset to the maximum value and the minimum value; and a noise removal circuit provided at a subsequent stage of the noise removal circuit. adaptive variable sampling means, the adaptive variable sampling means transmitting the value of a first pixel regularly located among the plurality of pixels in a predetermined number of bits; With respect to a pixel of interest of a second pixel other than the pixel of pixel of interest, means for calculating a predicted value of the pixel of interest of the second pixel, and according to a prediction error between the value of the pixel of interest of the second pixel and the predicted value. and means for transmitting data regarding the second pixel using a number of bits smaller than the predetermined number of bits.