JPH02277230A - Constitution of electrode contact - Google Patents

Abstract

PURPOSE:To provide reliable electrode contacts to improve device reliability by forming contact holes with a stepped inner wall and depositing a conducting film over the main surface to form an electrode pattern. CONSTITUTION:A side wall of a contact hole looks like a step shape by an island-shaped part 12 and a part 141 of polycrystalline silicon films of two layers and by interlayer insulating films 13, 15 of two layer; in face, however, it is a gentle taper shape. An opening at the surface of the contact hole is fairly large and seems to be overlapped with a polycrystalline silicon film 4; however, it is insulated by the interlayer insulating films 13, 15; an operation of a device is not affected. Its size is sufficiently large in such a way that aluminum atoms uniformly invade to the inside at a vapor-deposition operation of aluminum; electrode are connected stably. Thereby, a high dielectric breakdown strength of an aluminum wiring part and the polycrystalline silicon films is obtained; it is possible to obtain an effect to enhance reliability of a device.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of configuring an electrode lead-out portion in a semiconductor integrated circuit device.

(Prior Art) With the recent progress toward higher density and higher integration of semiconductor integrated circuit devices, ultra-fine integrated elements and multilayer wiring have become major issues to be solved. In particular, it is difficult to miniaturize metal wiring, and there are many technical problems that must be solved in order to make the aluminum wiring used for boat fishing into fine wiring of 1 μm or less. , formation of contact holes, instability of connections due to deterioration of the aluminum evaporation coating inside the contact holes, or variations in the depth of contact holes at electrode extraction parts due to multilayer wiring, resulting in high aspect ratio contact holes. Examples include connection problems.

FIG. 3 is a sectional view illustrating the above-mentioned problems using an NMO8 type O8 resistor as an example, and (a) is a plan view;
b) The figure is a cross-sectional view taken along the line AA', and the figure (c) shows the equivalent circuit (see Kogyo Kenkyukai, "Paper Electronic Materials'', June 1986 issue, pages 22 to 27).

In the figure, 1 is a P-type silicon substrate, 2 is an element isolation region made of silicon dioxide, 3 is a gate insulating film, and 4 is a polycrystalline silicon film having N-type conductivity, which constitutes a gate electrode. 5
Numerals a and 5b are N-type diffusion regions as a source and drain, respectively, 6 is an interlayer insulating film made of flow glass, 7 is a contact hole, and 8a and 8b are aluminum alloy electrodes from the N-type diffusion regions 5a and 5b, respectively. Note that the description will be omitted with respect to the protective film on the surface.

In the above configuration, the opening of the contact hole 7 is y
=o, aμ, the cross-sectional area is 8μI12, the thickness of the interlayer insulating film 6 is 0.6μ, and the aspect ratio of the contact hole 7 is 0.75. It is technically quite difficult to form electrodes by vapor-depositing aluminum alloy into such tiny holes with high aspect ratios, and its success or failure will greatly affect the reliability of semiconductor integrated circuit devices. .

The distance X of the gate electrode from the polycrystalline silicon film 4 is 0.5
Since the contact hole 7 is so small as to be small, it is not possible to form a large contact hole 7, and in the end, aluminum is deposited on the current high aspect ratio contact hole 7, but in that case,
Uniform deposition is not possible, and the deposited film on the inner wall of the contact hole becomes thin, and microcracks are likely to occur at the bottom corners.

From the above, the diameter of the contact hole is 1.
When miniaturized to 0μI, aluminum atoms cannot sufficiently penetrate into the interior through evaporation.

Therefore, it is impossible to form an electrode with a stable connection using a uniform aluminum coating.

(9! Problems to be Solved by Akira) In view of the above-mentioned problems with the structure of the conventional electrode part, the present invention aims to improve the stability of the connection, which can be applied to the extraction of electrodes having a fine structure in high-density semiconductor integrated circuit devices. The purpose of the present invention is to provide a method for constructing an electrode structure that is easy to form and maintain.

(Means for Solving the Problems) The present invention solves the above problems by forming a polycrystalline silicon film on the surface of an impurity diffusion layer formed on the main surface of a semiconductor substrate during formation of a semiconductor integrated circuit device.

a selective etching process that leaves the etching in the form of an island in a region where a contact hole is to be formed; a selective etching process that removes the interlayer insulating film above the island-shaped portion after covering the interlayer insulating film; and opening the interlayer insulating film. A step of selectively removing the polycrystalline silicon III in the island-like portion using the portion as a mask to form a contact hole having a one-step inner wall, and depositing a conductive film on the upper part of the main surface and forming it into an electrode pattern. This is achieved through the process of forming.

(Function) According to the present invention having the above electrode configuration, the electrode can be stably taken out from the fine contact hole.

The reliability of a semiconductor integrated circuit device can be improved.

(Example) DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be explained below with reference to the drawings.

FIG. 1 is a diagram explaining the first embodiment of the present invention, in which NMO
This is a cross-sectional view of the manufacturing process in which electrodes are taken out from the source and drain diffusion regions of a 3-type O3 transistor, in which the same reference numerals are used for functional parts that are the same or equivalent to those in FIG. 3.

First, in FIG. 3(a), an element isolation region 2 made of silicon dioxide is formed on a P-type silicon substrate 1, and 3
4 is a gate insulating film, 4 is an N-type conductive polycrystalline silicon film,
5a and 5b are the sources respectively.

This is an N type diffusion region as a drain. In addition, 11 is a thin silicon dioxide film of about 200 layers, and 12 is a first polycrystalline silicon film involved in the formation of contact holes, and the film thickness is 0.
．． It is 5 μm.

Next, as shown in FIG. 3B, a first polycrystalline silicon film 12 is formed in an island-like portion 121 by selective photoetching in a region where a contact hole is to be formed.

In this case, the etching is completed by the underlying silicon dioxide film 11. Also, the contact hole should be 0.8μ on each side.
To obtain an opening of m, an etching pattern of 0.7 μm to 0.8 μm is formed. Since this pattern remains in the form of islands, it is easy to form.

Next, as shown in Figure (c), a BPSG film (Boroph-
An interlayer insulator 11113 made of an osphosilicate glass film (borous phosphosilicate glass film) was coated on the island-shaped portion 121 of the first polycrystalline silicon film, and a 0.5μI
Deposit and reflow at 900°C.

Next, as shown in Figure (d), the interlayer insulating film 13 is selectively photoetched to form an opening 71 that will become a part of the contact hole, and then the second polycrystalline silicon film 14 is etched.
is deposited to a thickness of 0.3 μm. The optimum film thickness is the total interlayer insulation film thickness (=interlayer insulation 11113 mentioned above and below).
．． 15 thicknesses).

Next, as shown in FIG. 3, a second polycrystalline silicon film 1 is formed.
4 to form an island-like portion 121 of the polycrystalline silicon film, and a second polycrystalline silicon film portion 14 overlapping the hole opening 71 is formed.
form 1. Next, a second interlayer insulating film 15 made of BPSGI is deposited to a thickness of 0.6 pm, reflowed at 900° C., and selectively photoetched to cover the second polycrystalline silicon film portion 141. A portion 72 of the contact hole is opened to expose the upper surface of the portion 141 of the second polycrystalline silicon film. Next, use the photomask 21 at that time.

The second polycrystalline silicon film portion 141 and the first polycrystalline silicon film island portion 121 are removed by selective plasma etching of the polycrystalline silicon film.

Furthermore, by etching the thin silicon dioxide film 11, the source and drain N-type diffusion layer regions 5a,
The electrode forming portion 5b is exposed.

Next, as shown in FIG. 1(f), an aluminum alloy film is deposited in the contact hole opened as described above, and it is selectively etched to form aluminum alloy electrodes 8a and 8b. After sintering, a plasma nitride film is formed. A surface protective film 16 of the device is formed by the following steps.

The side wall of the contact hole of the present invention formed as described above has an island-like portion 121 of a two-layer polycrystalline silicon film, a portion 141, and a two-layer interlayer insulating film 13, 15, as shown in emphasis. Although it looks like a step, it actually has a very gentle taper, and the opening on the surface of the contact hole is quite large, and although it seems to overlap the polycrystalline silicon film 4, it is insulated by the interlayer insulating film 13.15. Therefore, there is no effect on the operation of the device.

According to this embodiment, the island-shaped portion 12 of the polycrystalline silicon film
If the size of 1 is 0.8μ, the surface opening of the contact hole can be formed with a size of 2.0μ, which is sufficient for aluminum atoms to penetrate evenly into the interior during aluminum evaporation, making it a stable electrode. It becomes a connection. Further, the surface protection film 16 of the element can uniformly protect the inside of the contact hole by improving the shape of the contact hole.

In general, for contact holes with a diameter of 1 μm or less, if an aluminum-silicon alloy is used for electrode connection, silicon will precipitate and connection failures will likely occur.To avoid this, heat-resistant alloys such as molybdenum silicide and aluminum-silicon alloys are used. By growing a double-structure silicon alloy film, stable electrode connections can be made and connections can be improved. Also.

Even if there is a thin insulating film between the island portions 121 and 141 of the polycrystalline silicon film, the contact hole of the present invention can be formed by repeatedly etching the interlayer insulating film, the polycrystalline silicon film, the insulating film, etc. It is possible. Furthermore, in semiconductor integrated circuit devices that use a double-structure wiring structure with wiring made of a polycrystalline silicon film or a tungsten silicide film, the polycrystalline silicon film or metal silicide forming the wiring etc. is placed in the form of an island in the contact hole region. If these steps remain, the present invention can be carried out without requiring any additional steps.

FIG. 2 is a cross-sectional view of the construction process of an electrode portion in an N-channel MOS transistor explaining another embodiment of the present invention.

In the same figure (,), 51a and 51b are N channel M
This is an N-type diffusion region that forms the source and drain of the OS transistor, and a portion of the polycrystalline silicon film 4 is left in the island-like portion 41 at the same time as the gate electrode is formed in the region where the contact hole is to be formed.

Next, as shown in Figure (b), an interlayer insulating film 131 made of a BPSG film is deposited to a thickness of 0.5 μm, and after a 900° C. A photomask 21 is formed to overlap the island-shaped portion 41, and selective plasma etching is performed as shown in FIG.
As shown in c), the island-shaped portion 41 of the first polycrystalline silicon film
A part 171 of the contact hole region 17 is formed on the upper surface of the contact hole region 17, and the island-shaped portion 41 is removed using the photomask used at that time.

Further, the gate insulating film 3 is oxidized and etched to expose the electrode forming portions of the N-type diffusion regions 51a and 51b as sources and drains.

Next, since the bottom region of the contact hole opened as described above is not implanted with impurities as an N-type diffusion region, arsenic is ion-implanted from the opening to form an N-type impurity layer 52a.
, 52b. Next, an aluminum alloy film is deposited, a wiring pattern of aluminum alloy electrodes 8a, 8b is formed by photoetching as shown in FIG. (not shown) to complete the formation of the element. In addition,
In the above, the surface protective film was omitted.

In this embodiment as well, the side wall of the contact hole is likely to have a step-like shape as shown in the emphasized figure, but in an actual device, it is formed in a fairly gentle taper shape.

Further, although the size of the contact hole on the surface is not very large in the embodiment of the cylinder 1 described above, the electrode connection effect is sufficient. Note that when this method is applied to an N-channel MOS device, there is an advantage that it can be carried out without increasing the number of times the polycrystalline silicon film is formed.

In this example, after forming the contact hole,
Instead of the aluminum alloy electrodes 8a and 8b, a double-structured electrode of a polycrystalline silicon film containing phosphorus and a tungsten silicide film may be formed. In this case, the stress on the tungsten silicide film is alleviated by the gentle slope inside the contact hole, and the reliability of the wiring can be improved.

(Effects of the Invention) As is clear from the above description, according to the present invention, when forming an electrode having a fine structure of a high-density semiconductor device, a high Even when forming contact holes with different aspect ratios.

The opening area of the contact hole has been substantially enlarged, the coverage by vapor deposition of aluminum alloy has been improved, and stable electrode connection has become possible.Furthermore, the connection between aluminum wiring and polycrystalline silicon has been improved by a multilayer interlayer insulating film. A sufficient dielectric breakdown voltage of 30 V or more can be obtained, and the interlayer breakdown voltage is less dependent on mask alignment accuracy, which has the effect of improving the reliability of the device.

[Brief explanation of drawings]

FIG. 1 and FIG. 2 respectively show the first embodiment of the present invention. 3(a), (b), and (c) are a plan view, a sectional view, and an equivalent circuit diagram illustrating an electrode lead-out portion of a conventional semiconductor integrated circuit device. 1... P-type silicon substrate, 2... Element isolation region,
3... Gate insulating film, 4.12.14... Polycrystalline silicon film, 5a, 5b... N-type diffusion region, 8
a, 8b...aluminum alloy electrode, 13°15...
Interlayer insulation film. Patent applicant: Matsushita Electronics Co., Ltd. Figure Figure Figure a 1] Figure (a) (c)

Claims (4)

[Claims] (1) When forming a semiconductor integrated circuit device, the option of forming a polycrystalline silicon film on the surface of an impurity diffusion layer formed on the main surface of a semiconductor substrate and leaving it in the form of an island in the area where the contact hole is to be formed. an etching step, a selective etching step of removing the interlayer insulating film above the island-like portion after covering the interlayer insulating film, and removing the polycrystalline silicon film on the island-like portion using the opening of the interlayer insulating film as a mask. An electrode extraction section comprising the steps of selectively removing and forming a contact hole having a stepped inner wall, and depositing a conductive film on the upper main surface and forming it into an electrode pattern. How to configure. (2) The method for configuring an electrode lead-out portion according to claim (1), wherein the electrode pattern is made of a multilayer film of an aluminum alloy and a heat-resistant alloy. (3) When forming a semiconductor integrated circuit device, a first polycrystalline silicon film is formed on the surface of the impurity diffusion layer formed on the main surface of the semiconductor substrate, and the first polycrystalline silicon film is formed in the form of an island in the area where the contact hole is to be formed. a selective etching step to leave the first
After covering the polycrystalline silicon film with the first insulating film,
a selective etching step for removing the insulating film on the upper part of the island-shaped portion, and laminating a second polycrystalline silicon film on the first polycrystalline silicon film, and stacking the second polycrystalline silicon film on the first polycrystalline silicon film in an island shape. a process of repeating selective etching to selectively leave the insulating film overlapping the polycrystalline silicon film and covering it with a second insulating film, and removing the insulating film in a region covering the upper part of the polycrystalline silicon film; Remove the crystalline silicon film,
1. A method for configuring an electrode lead-out portion, comprising a selective etching step for forming an inner wall in a stepped shape, and a step for depositing a conductive film on a main surface to form an electrode pattern. (4) The method for configuring an electrode lead-out portion according to claim (3), wherein the electrode pattern is made of a multilayer film of an aluminum alloy and a heat-resistant alloy.